JPS631273Y2 - - Google Patents

Description

[Detailed description of the invention] This invention relates to a device that performs output control such as on/off according to a predetermined schedule and automates the heating and cooling of buildings and schools, time signals, etc. The present invention relates to a weak program system including a plurality of so-called weak programmers capable of performing the output control.

A weekly programmer is generally equipped with a plurality of output terminals, and each of these output terminals is equipped with means for storing a predetermined program to perform output control for each day of the week and each time of the week.

Normally, a memory is used as this storage means, but an input device is also provided as a means for writing and rewriting the memory so that programs can be stored according to the operator's intentions.

Furthermore, important elements constituting this week programmer include a clock counter and a readout circuit for reading out and outputting the stored contents corresponding to the current day of the week and time.

The conceptual block diagram of the weak programmer, which is mainly composed of these elements, is shown in Figure 1.In addition to the memory 1, input keys 2 as input means, clock counter 3, and readout circuit 4, there is also a display. Circuit 5 and, although not shown, a control circuit for controlling these elements is generally added.

Generally, the number of outputs is increased by connecting weak programmers having such a configuration, but when such a weak programmer system is configured, time synchronization of the mutual weak programmers is an extremely important element.

In view of the above points, it is an object of this invention to provide a weak programmer system that is easy to design and can easily synchronize the clock counters of the respective weak programmers constituting the weak programmer system.

Examples of this invention will be described below based on the drawings.

FIG. 2 is a block diagram of the main parts of a weak programmer that constitutes a weak programmer system that is an embodiment of this invention.

In the figure, 6 is a clock counter that stores the current time, and 7 is a switching circuit that selects whether the basic clock of the clock counter 6 is an external clock or a clock from an internal clock generation circuit 8, and a switch 9 is used. Connect.

Reference numeral 10 denotes an adjustment value setting switch for setting the time at which time is to be adjusted.
2. 13 is external adjust input terminal b
This gate circuit inputs the stored contents of the register 12 to the clock counter 6 when an adjust signal is input.

With the above configuration, if the time to set the clock is stored in the register 12 in advance using the switches 10 and 11, when the adjustment signal is input from the external adjustment input terminal b, the contents of the clock counter 6 will be the same as the contents stored in the register 12. Become.

Therefore, if the adjust signal from the external adjust input terminal b is made to output exactly at the time stored in the register 12, the clock counter 6 will be outputted at regular intervals, that is, every time the time stored in the register 12 arrives. The time will be adjusted accordingly.

For this reason, it is desirable that the device connected to the external adjust input terminal b is a device that keeps accurate time and outputs an adjust signal at an arbitrary time.

Incidentally, if the clock counter 6 and the register 12 each store the day of the week, it is also possible to adjust the clock counter 6 every week.

In addition, it does not matter which clock is selected by the changeover switch 9, and the external clock output terminal c is used so that any one of these clocks can be supplied as an external clock via the line amplifier 14.
is also provided.

Next, in addition to the above-mentioned elements, the device shown in the figure is also provided with a coincidence detection circuit 15 and an external adjust output terminal d, which generates an adjust signal for synchronization when a plurality of weak programmers operate in parallel. It is designed to function as a parent device.

That is, the contents of the clock counter 6 and the register 12 are constantly compared by the coincidence detection circuit 15, and when they match, the coincidence output is used as an adjustment signal and sent to the external adjustment output terminal d via the line amplifier 16.
is supplied to. Therefore, if the external adjust input terminal b of another weak programmer is connected to this external adjust output terminal d, the weak programmer having the former output terminal d can function as a parent unit.
The latter weak programmers having the input terminal b each function as a slave device. Further, in this case, several slave units can be connected in parallel to one base unit, and the clock counters of all slave units can be synchronized by an adjust signal from the base unit.

A clock adjustment device with such a configuration and function has different functions depending on how the week programmer is connected.
Several modes of use are possible.

FIG. 3 exemplarily illustrates the aspect of the above-mentioned weak programmer system, and FIG. 3A shows a configuration in which weak programmers are arranged in parallel, and FIG. 3B shows a configuration in which a plurality of weak programmers are arranged in a subordinate manner. Each configuration is shown below. Further, FIGS. 4A and 4B are diagrams showing the output timings of a plurality of weak programmers arranged in parallel and in a dependent arrangement, respectively.

In the weak programmer system shown in FIG. 3A, the input terminals a and b of the weak programmers WP2 to WPn are connected in parallel to the output terminals c and d of the weak programmer WP1. In addition, in the weak programmer system shown in FIG. 3B, the output terminals c,
Input terminal a of weak programmer WP2 to d,
b is connected, and the input terminals a and b of the weak programmer WP3 are connected to the output terminals c and d of the weak programmer WP2.
WP1 to WP3 are arranged in a subordinate manner. In either case, the weak programmer WP1 becomes the parent device, and the input terminals a and b of these parent devices are opened. Therefore, in the weak programmer WP1, which is the base unit, the clock counter 6 is not preset, and the clock counter operates as a clock that measures the current time, and when the time set in the register 12 reaches, its state is matched. Detection circuit 15
is detected and outputs the first adjust signal to external output terminal d.

When multiple weak programmers are connected as described above and switch 9 of only weak programmer WP1 is turned on, the weak programmer
The clock of the internal clock generating circuit 8 of the WP 1 can be used as the basic clock of the clock counter 6 of all the weak programmers making up the system. At this time, the line to which input terminal a and output terminal c of the weak programmer are connected becomes a clock line. Of course, it is also possible to use the internal clock generation circuit 8 for each weak programmer. more week programmer
In WP1, when the time of the clock counter 6 matches the time set in the register 12, an adjust signal is output from the output terminal d and inputted to the input terminal b of another weak programmer. In the case of the dependent arrangement shown in FIG. 3B, the adjust signal of the weak programmer WPn is input to the weak programmer WP(n+1).
This makes it possible to synchronize the time of all the weak programmers that make up the system.

For now, Week Programmer WP1~WP3
If all of these weak programmers WP1 to WP3 execute the same job (JOB),
If the time t1 is set in each register 12 of the three weak programmers, the three weak programmers will simultaneously execute the JOB when the clock counter 6 of the weak programmer WP1 measures the time t1, as shown in FIG. 4A.

Also, the setting time of register 12 of weak programmer WP2 is made to match the setting time of register 12 of weak programmer WP1, and the setting time of register 12 of weak programmer WP3 is set by (t1 - t2) from the setting time of weak programmers WP1 and WP2. If delayed, the weak programmers WP1 and WP2 execute the JOB at time t1, and the weak programmer WP3 executes the JOB when the clock counter 6 of the weak programmer WP1 counts time t2, as shown in FIG. 4B.

As described above, according to this invention, the clock of the internal clock generation circuit of the reference weak programmer can be used as the clock of the clock counters of all the weak programmers making up the system. When the time measured by the basic weak programmer's clock counter matches the time set in the register, an adjust signal is output, and all the weak programmers making up the system preset their clock counters. As a result, the clock counter of each weak programmer becomes the time set in the register. Therefore, the JOB execution timing in each weak programmer's system can be changed by changing the register setting time, eliminating the need to set the JOB execution timing using software. For this reason.
System design becomes easier, and operation timing once set can be easily changed.

[Brief explanation of the drawing]

Fig. 1 is a conceptual block diagram of the weak programmer, Fig. 2 is a block diagram of the main parts of the weak programmer that constitutes the weak programmer system that is an embodiment of this invention, and Fig. 3 A and B are the configuration of the weak programmer system. FIGS. 4A and 4B are diagrams illustrating the operation timing of the above-mentioned weak programmer system. 1...Memory, 3,6...Clock counter,
10... Adjustment value setting switch, 12... Register, 13... Gate circuit.

Claims (1)

[Claims for Utility Model Registration] In a weak programmer system configured by arranging a plurality of weak programmers in parallel or in a subordinate manner, the weak programmer has an input terminal and an output terminal through which signals are inputted and outputted to the outside. , an internal clock generation circuit, a clock counter that counts clock pulses from the internal clock generation circuit, an adjust value setting switch that sets the preset time of the clock counter, and an adjustment value setting switch that changes the contents of the clock counter when an adjust signal is input to the input terminal. gate means to set the preset time to the preset time set by the adjust value setting switch, and a match detection unit that compares the contents of the clock counter and the contents of the adjust value setting switch and outputs an adjust signal from the output terminal when they match. A weak programmer system characterized by comprising a circuit.