JPS63123000U - - Google Patents

Info

Publication number
JPS63123000U
JPS63123000U JP1256787U JP1256787U JPS63123000U JP S63123000 U JPS63123000 U JP S63123000U JP 1256787 U JP1256787 U JP 1256787U JP 1256787 U JP1256787 U JP 1256787U JP S63123000 U JPS63123000 U JP S63123000U
Authority
JP
Japan
Prior art keywords
signal
analog
digital
clock
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1256787U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1256787U priority Critical patent/JPS63123000U/ja
Publication of JPS63123000U publication Critical patent/JPS63123000U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案に係るデジタル波形記憶装置の
一実施例を示すブロツク図、第2図は従来のデジ
タル波形記憶装置の構成をしめすブロツク図であ
る。 1……アナログデジタル変換器、2……メモリ
、3……内部クロツク発生器、4,11……スイ
ツチ、5……制御器、10……検出器、12……
パターン発生器。
FIG. 1 is a block diagram showing an embodiment of a digital waveform storage device according to the present invention, and FIG. 2 is a block diagram showing the configuration of a conventional digital waveform storage device. DESCRIPTION OF SYMBOLS 1...Analog-digital converter, 2...Memory, 3...Internal clock generator, 4, 11...Switch, 5...Controller, 10...Detector, 12...
pattern generator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] アナログ信号が入力され、クロツクに同期して
このアナログ信号をデジタル信号に変換するアナ
ログデジタル変換器と、このアナログデジタル変
換器の出力信号が入力されこの信号を記憶するメ
モリと、前記クロツクが入力され、このクロツク
の周波数が所定の値を越えたことを検出する検出
器とを有し、前記検出器が前記クロツクの周波数
が所定の値を越えたことを検出すると、前記メモ
リに所定のパターンデータを記憶させることを特
徴とするデジタル波形記憶装置。
An analog-to-digital converter receives an analog signal and converts the analog signal into a digital signal in synchronization with a clock; a memory receives an output signal from the analog-to-digital converter and stores this signal; , a detector for detecting that the frequency of the clock exceeds a predetermined value, and when the detector detects that the frequency of the clock exceeds the predetermined value, predetermined pattern data is stored in the memory. A digital waveform storage device characterized by storing.
JP1256787U 1987-01-30 1987-01-30 Pending JPS63123000U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1256787U JPS63123000U (en) 1987-01-30 1987-01-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1256787U JPS63123000U (en) 1987-01-30 1987-01-30

Publications (1)

Publication Number Publication Date
JPS63123000U true JPS63123000U (en) 1988-08-10

Family

ID=30800817

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1256787U Pending JPS63123000U (en) 1987-01-30 1987-01-30

Country Status (1)

Country Link
JP (1) JPS63123000U (en)

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