JPS6312170A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make an interlayer insulating film thin, by using a double-layer structure, in which metal silicide, which is wrapped with BPSG, is mounted on polycrystalline silicon, as element electrodes and interconnections. CONSTITUTION:A silicon oxide film 12 is formed on the surface of a silicon substrate 11. Then, polycrystalline silicon 13 is deposited. High-melting-point metal silicide 14 of Mo and the like is further formed thereon. BPSG 15 and the like are deposited thereon. Then, photoresist 19 for a gate electrode pattern is formed. With the photoresist 19 as a mask, the BPSG 15, the high-melting- point metal silicide 14 and the polycrystalline silicon 13 are etched. The photoresist 19 is removed, and heat treatment is performed. The end part of the BPSG 15, which is processed in a eaves shape, undergoes reflow, and the high-melting-point metal silicide 14 is wrapped. Finally, a thin oxide film 17 is formed on the side surface of the polycrystalline silicon. Then, a second interconnection layer 16 is formed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, particularly a two-layer structure (polycide structure) in which metal silicide is placed on polycrystalline silicon.
The present invention relates to a method of manufacturing a semiconductor device using the semiconductor device as an element electrode or wiring.

[Conventional technology]

As semiconductor integrated circuits become larger and more densely packed, the width and thickness of interconnects tend to decrease, their length increases, and their resistance values rapidly increase. As one of the measures to maintain high speed,
Lower-resistance polycide structures are now being used to replace traditional polycrystalline silicon interconnects. For example, as shown in FIG. 2, a general two-layer structure in which a polycide structure consisting of polycrystalline silicon 23 and high melting point metal silicide 24 is used as the first wiring layer, and metal 26 is used as the second wiring layer is used.
In the case of layer wiring, it is customary to use a relatively thick silicon oxide film of about 0.5p deposited by low pressure vapor deposition (low pressure CVD) as the insulating film 25 between two layers. However, in many cases, an extremely thin insulating film with high dielectric strength is required between the first and second wiring layers. For example, when a capacitance is formed between two wiring layers, or when the two wiring layers serve as two transfer gates to which two different phase drive signals are applied in a charge-coupled device (CCD), etc. That's it. In all of these cases, a thin insulating film with high dielectric strength is required not only on the top surface but also on the side surfaces of the first wiring layer, but CVD films are not sufficient in terms of uniformity and dielectric breakdown strength. If the first wiring layer is made only of polycrystalline silicon, the silicon surface is oxidized by thermal oxidation to form a silicon oxide film that is uniform, thin, and has sufficient dielectric strength on both the side and top surfaces. can.

[Problems to be Solved by the Invention] However, in a polycide structure, the oxidation rates of polycrystalline silicon and metal silicide are different, and some metal materials constituting the silicide cannot be oxidized depending on the type of metal material. Furthermore, even if oxidation is possible, the dielectric breakdown strength of the resulting oxide film is inferior to that of a thermally oxidized film of polycrystalline silicon. Furthermore, the uniformity of the oxide film thickness depends on the uniformity of the silicide itself, making it difficult to reduce the thickness of the oxide film.

The present invention aims to solve the above-mentioned problems of the polycide structure.

[Means for solving problems]

The present invention involves a process of depositing polycrystalline silicon on a semiconductor substrate or an insulating film provided on the semiconductor substrate, a process of forming metal silicide on the polycrystalline silicon, and a process of depositing metal silicide on the polycrystalline silicon. a step of depositing a silicon oxide film with a high etching temperature, and a step of sequentially etching the silicon oxide film, metal silicide, and polycrystalline silicon using a photoresist having an arbitrary pattern shape as an etching mask;
A semiconductor device comprising the steps of selectively etching only the side surfaces of the metal silicide, heat-treating under temperature conditions where the silicon oxide film flows, and oxidizing the side surfaces of the polycrystalline silicon. This is a manufacturing method.

〔Example〕

Representative embodiments of the present invention will be described with reference to the drawings. In FIG. 1(a), a silicon oxide film 12, which will become a gate insulating film, is formed on the surface of a silicon substrate 11 by thermal oxidation to a thickness of 200 mm, and then by CVD to a thickness of 20 mm.
00 polycrystalline silicon 13 is deposited.

Furthermore, a high melting point metal silicide 14 such as molybdenum (Mo) is formed directly on it using a sputtering method, or by applying heat treatment after depositing the high melting point metal to react with the polycrystalline silicon surface. BPSG (Boro-pho
sphosphosilicate Glass) 15 etc.
Deposit 2000 people using the VO method. Next, a photoresist 19 having a gate electrode pattern is formed through a general photoresist process. In FIG. 1(b), reactive ion etching (RI) is performed using this resist pattern as a mask.
In method E), first the BPSG 15, then the high melting point metal silicide 14, and then the polycrystalline silicon 13 are anisotropically etched, and the side walls of the high melting point metal silicide 14 are also selectively etched. Selective etching of the sidewalls of the high melting point metal silicide 14 can be performed at any time after the BPSG etching, and according to RIH in a CCU4 and 02 mixed gas atmosphere, Mo silicide is sidewalled simultaneously during polycrystalline silicon etching. Etching is also possible. 900℃ after removing photoresist
BPSG1 processed into an eave shape by heat treatment at a temperature of
5 is reflowed to enclose the high melting point metal silicide 14 as shown in FIG. 1(c). FIG. 1(d) shows that an oxide film 17 is formed on the side surface of polycrystalline silicon by thermal oxidation method.
Next, a state in which a second layer of wiring 16 is formed is shown.

〔Effect of the invention〕

According to the present invention, it is possible to cover a polycide structure with a thin silicon oxide film having sufficient dielectric breakdown strength without directly thermally oxidizing the high-melting point metal silicide surface, thereby narrowing the distance between higher-order wiring layers. This is effective when it is necessary to thin the interlayer insulating film.

[Brief explanation of drawings]

FIGS. 1(a) to 1(d) are cross-sectional views showing an embodiment of the manufacturing method of the present invention in the order of steps, and FIG. 2 is a cross-sectional view showing a conventional multilayer wiring structure including a polycide structure. 11... Silicon substrate, 12... Silicon oxide film,
13... Polycrystalline silicon, 14... High melting point metal silicide, 15... BPSG, 16... Wiring, 17.
...Silicon oxide film, 19...Photoresist Figure 1 Figure 1 Figure 2

Claims (1)

[Claims] (1) The process of depositing polycrystalline silicon on a semiconductor substrate or an insulating film provided on the semiconductor substrate, the process of forming metal silicide on the polycrystalline silicon, and the process of depositing metal silicide on the polycrystalline silicon, and further adding fluidity at high temperature. a step of depositing a silicon oxide film with a high silicon oxide film, a step of sequentially etching the silicon oxide film, metal silicide, and polycrystalline silicon using a photoresist in an arbitrary pattern as an etching mask, and selectively etching only the side surfaces of the metal silicide. A method for manufacturing a semiconductor device, comprising the steps of etching, heat treatment under temperature conditions that cause the silicon oxide film to flow, and oxidizing side surfaces of polycrystalline silicon.