JPS63120424U - - Google Patents

Info

Publication number
JPS63120424U
JPS63120424U JP1129387U JP1129387U JPS63120424U JP S63120424 U JPS63120424 U JP S63120424U JP 1129387 U JP1129387 U JP 1129387U JP 1129387 U JP1129387 U JP 1129387U JP S63120424 U JPS63120424 U JP S63120424U
Authority
JP
Japan
Prior art keywords
converter
sine wave
signal generators
wave signal
sum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1129387U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1129387U priority Critical patent/JPS63120424U/ja
Publication of JPS63120424U publication Critical patent/JPS63120424U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案によるA/Dコンバータ試験
装置のブロツク図、第2図は周波数がわずかに異
なる2つの正弦波信号を加算した時の波形図、第
3図は第2図に示した波形のヒストグラム、第4
図は周波数の差の大きい2つの正弦波信号を加算
した時の波形図、第5図は従来のA/Dコンバー
タ試験装置のブロツク図、第6図は正弦波信号の
ヒストグラムである。
Figure 1 is a block diagram of the A/D converter test device based on this invention, Figure 2 is a waveform diagram when two sine wave signals with slightly different frequencies are added, and Figure 3 is the waveform shown in Figure 2. histogram, 4th
The figure is a waveform diagram when two sine wave signals having a large difference in frequency are added, FIG. 5 is a block diagram of a conventional A/D converter test device, and FIG. 6 is a histogram of the sine wave signal.

Claims (1)

【実用新案登録請求の範囲】 A 2個以上の正弦波信号発生装置と、 B 該2個以上の正弦波信号発生装置から発生す
る正弦波信号を加算してA/Dコンバータに供給
する加算手段と、 C 該A/Dコンバータから出力されるデジタル
信号から、A/Dコンバータのダイナミツク特性
を測定する手段と、 を具備してなることを特徴とするA/Dコンバ
ータ試験装置。
[Claims for Utility Model Registration] A: Two or more sine wave signal generators; B: Adding means for adding the sine wave signals generated from the two or more sine wave signal generators and supplying the sum to an A/D converter. An A/D converter testing device comprising: C. means for measuring dynamic characteristics of an A/D converter from a digital signal output from the A/D converter.
JP1129387U 1987-01-28 1987-01-28 Pending JPS63120424U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1129387U JPS63120424U (en) 1987-01-28 1987-01-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1129387U JPS63120424U (en) 1987-01-28 1987-01-28

Publications (1)

Publication Number Publication Date
JPS63120424U true JPS63120424U (en) 1988-08-04

Family

ID=30798375

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1129387U Pending JPS63120424U (en) 1987-01-28 1987-01-28

Country Status (1)

Country Link
JP (1) JPS63120424U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0313007A (en) * 1989-06-12 1991-01-22 G D S:Kk Fluency processing type d-a converter

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5631226A (en) * 1979-08-22 1981-03-30 Fujitsu Ltd Characteristic measuring system of digital communication system
JPS6066523A (en) * 1983-08-24 1985-04-16 フエランテイ・ピーエルシー Device and method for testing linearity of transfer function of analog input circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5631226A (en) * 1979-08-22 1981-03-30 Fujitsu Ltd Characteristic measuring system of digital communication system
JPS6066523A (en) * 1983-08-24 1985-04-16 フエランテイ・ピーエルシー Device and method for testing linearity of transfer function of analog input circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0313007A (en) * 1989-06-12 1991-01-22 G D S:Kk Fluency processing type d-a converter

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