JPS6311795Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a vertical deflection circuit, and more particularly to a vertical deflection circuit comprising a circuit for clamping an abnormal voltage applied to an output terminal of a power amplifier connected to a deflection yoke.

FIG. 1 is a diagram showing a conventional clamp circuit in which when the emitter potential of an NPN transistor 4 in the circuit rises above the collector potential, the voltage increase is fixed at the collector potential. That is, in response to an increase in the emitter potential of the NPN transistor 4, the diode 5, which is connected between the collector and the emitter in a steady state so as to be reverse biased, is forward biased and conducts, so that the emitter potential becomes equal to the collector potential. +Clamped by diode forward voltage. However, the clamp current flowing through the diode 5 at this time increases as the energy component of the rise in emitter potential increases.
The current capacity of the diode 5 needs to be adjusted accordingly. This means that, especially when integrated circuits are considered, increasing the diode area is disadvantageous because it increases the pellet area, and the clamp current flowing through the diode 5 becomes equal to the emitter current of the transistor 4. In this case, diode 2 would require the same area as transistor 1.

Figure 2 shows the clamp circuit used in this invention.
This circuit has the same function as the conventional clamp circuit shown in the figure, and is characterized by the fact that it can be constructed using diodes with a smaller area even with a large clamp current.

In other words, the function of the clamping diode 5 in FIG.
The figure shows an equivalent circuit diagram in that case. At this time, the clamping operation is performed when the emitter potential of the NPN transistor 4 in FIG. 2 rises and exceeds the collector potential, and the potential relationship between the collector and emitter is reversed. Transistor 4 begins reverse transistor operation. By adding a diode 5 to drive the base current of the reverse transistor 4, the clamp current flows from the collector to the emitter of the reverse transistor 4 in FIG. The base drive current of is sufficiently supplied by the diode 5. Therefore, the output terminal 2, that is, the emitter electrode clamping potential of the transistor 4 in FIG. 3 is the collector potential+the forward voltage of the diode 5×2. In the clamp circuit according to the present invention, since the clamp current flows through the transistor 4 as described above, the clamp diode 5 only needs to flow the base drive current of 1/hFE of the reverse direction transistor of the transistor 4, and the current By reducing the capacitance, the area of the clamp diode can be significantly reduced, and when it is integrated into an integrated circuit, the pellet area can be reduced by making the transistor 4 in Fig. 2 have a structure that increases the reverse direction hFE. This contributes to the downsizing of the

According to the present invention, since such a clamp circuit is used in the vertical deflection circuit, it is possible to obtain a vertical deflection circuit that is inexpensive and suitable for integration into an integrated circuit.

A vertical deflection circuit using an SEPP type power output circuit will be described below as a specific embodiment of the present invention.

FIG. 4 shows the application of the clamp circuit according to the present invention to the vertical deflection output circuit of a television receiver, which includes a preamplifier 2 for voltage amplifying the sawtooth wave from the input terminal, and further transistors 4, 8, 9,
This circuit consists of an SEPP type power amplifier circuit that supplies a sufficient sawtooth wave current to the vertical deflection yoke, which is composed of 10, 11 diodes 6, 7, and 12 and serves as a load, and has the function of vertically scanning a cathode ray tube. be.

Considering the characteristics as a vertical deflection circuit,
When a sawtooth wave current is supplied to the deflection yoke of the load, a flyback pulse higher than the power supply voltage is generated at the output terminal due to the back electromotive force caused by the coil's self-induction due to the sudden rise in the retrace period. However, its size is determined by the impedance of the deflection yoke and the deflection current. For this reason, a clamp circuit for clamping the flyback pulse at a certain voltage is usually added to the output terminal, and in most conventional circuits, a clamp diode 13 is connected between the output terminal and the power supply with a broken line in Fig. 4. This clamps the flyback pulse near the power supply voltage. At this time, since a clamp current corresponding to the maximum value of the deflection current flows through the clamp diode 13 from the deflection yoke 15 toward Vcc, the diode 1
The current capacity of 3 must be comparable to that of the output transistors 9 and 11, and in the case of an integrated vertical deflection output circuit with a built-in clamp diode, the current capacity of the clamp diode in the pellet area must be The area ratio occupied by becomes large,
This leads to larger pellets.

However, in the clamp circuit used in the present invention, that is, the combination of the diode 5 and the output transistor 9, if the hFE of the reverse direction transistor of the output transistor 9 during the retrace period is, for example, 10, the clamp diode 5 In other words, the maximum value of the base drive current of the reverse direction transistor 9 is 1/10 of the deflection current, and the current capacity of the clamp diode 5 is 1/10 of that of the output transistors 9 and 11. Even when circuitized, it greatly contributes to pellet size reduction and is extremely economical.

Strictly speaking, in the clamp circuit used in the present invention, the clamp voltage is higher than the conventional one by the forward voltage of the diode, but this does not pose a problem in practice. For example, when driving a circuit with Vcc = 12 volts, although there are differences depending on the coil, it is quite normal for a flyback pulse with a peak value of about 50 volts to occur, so the forward voltage of the diode This does not affect the effectiveness of the clamp circuit to any degree.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a conventional clamp circuit. FIG. 2 is a circuit diagram showing an embodiment of the clamp circuit used in the present invention. FIG. 3 is an electrical equivalent circuit diagram of FIG. 2.
FIG. 4 is a circuit diagram showing an embodiment of a vertical deflection output circuit for a television receiver according to the present invention. 1, 14, 18... Capacitor, 2... Preamplifier, 3... Constant current source, 4, 8, 9, 10, 11
...Transistor, 4...Reverse direction transistor, 5, 6, 7, 12, 13...Diode, 1
6, 17...Resistor, +14,18...Capacitor,
15...Deflection yoke.

Claims (1)

[Scope of utility model registration request] The output stage of the power amplifier includes a power amplifier for amplifying a sawtooth input signal, a power supply terminal for supplying power to the power amplifier, and a vertical deflection coil connected to an output terminal of the power amplifier. is connected to the output terminal, the collector is connected to the power supply terminal, the output transistor receives the sawtooth wave input signal at the base, and the base-emitter is connected between the base and emitter of the output transistor.
A vertical deflection circuit characterized by a PN junction diode connected in the opposite direction to the PN junction.