JPS63110740A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS63110740A
JPS63110740A JP61258906A JP25890686A JPS63110740A JP S63110740 A JPS63110740 A JP S63110740A JP 61258906 A JP61258906 A JP 61258906A JP 25890686 A JP25890686 A JP 25890686A JP S63110740 A JPS63110740 A JP S63110740A
Authority
JP
Japan
Prior art keywords
semiconductor device
bonding electrode
bonding
electrode
boundary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61258906A
Other languages
Japanese (ja)
Inventor
Yoshimitsu Toda
戸田　好光
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61258906A priority Critical patent/JPS63110740A/en
Publication of JPS63110740A publication Critical patent/JPS63110740A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/10155—Shape being other than a cuboid
    • H01L2924/10156—Shape being other than a cuboid at the periphery
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/10155—Shape being other than a cuboid
    • H01L2924/10157—Shape being other than a cuboid at the active surface

Abstract

PURPOSE:To realize the high integration of a semiconductor device in such a way that a wiring part of a bonding electrode for the semiconductor device is extended from the surface to the side via a sloped part formed at a boundary between the side and the surface. CONSTITUTION:A bonding electrode 2 for a semiconductor device 1 is formed not only in the surface of the device but also on the side of the device; in addition, the boundary part between the surface and the side of the semiconductor device 1 is shaped to be a sloped part 4 so that a wiring operation between a bonding electrode 3 on the side and an electrode inside the semiconductor device can be made easily. The bonding electrode 2 on the surface is connected to an external lead 6 at a lead frame by using a thin wire 5 of a metal such as aluminum or the like; the bonding electrode 3 on the side is connected directly to an external lead 7 by thermocompression bonding via the sloped part 4 at the boundary. By this method, even when the number of external leads is increased, it is possible to add the bonding electrode without expanding the area of the semiconductor device.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体素子のボンディング用電極に直接また
は金属細線を介して外部リード付は金行った半導体装置
に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device in which external leads are attached to bonding electrodes of semiconductor elements directly or via thin metal wires.

〔従来の技術〕[Conventional technology]

従来半導体素子のボンディング用電極は、半導体素子表
面に配置され、リードフレームの外部リードとボンディ
ング・ワイヤーによジ接続てれ、外部リード付けがなさ
れていた。Conventionally, bonding electrodes for semiconductor devices have been placed on the surface of the semiconductor device and connected to external leads of a lead frame by bonding wires to provide external leads.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

半導体素子が高集積化さ牡、よって多数の外部リードを
必要とする場合、当然多数のボンディング用電極が必要
となり、半導体素子の面積を大きくしてしまうという欠
点がある。When a semiconductor element is highly integrated and therefore requires a large number of external leads, a large number of bonding electrodes are naturally required, which has the disadvantage of increasing the area of the semiconductor element.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点に対し本発明では、半導体素子のボンディン
グ用電極金素子の表面だけでなく、素子の側面にも設け
、かつ、側面のボンディング電極と半導体素子内部電極
との配線を容易にするため、半導体素子の表面と側面と
の間境界部分を斜面としている。In order to solve the above problems, the present invention provides a bonding electrode for a semiconductor element not only on the surface of the gold element but also on the side of the element, and in order to facilitate wiring between the bonding electrode on the side and the internal electrode of the semiconductor element. The boundary between the front surface and the side surface of the semiconductor element is a slope.

〔美施例〕[Beautiful example]

次に、本発明について図面全参照して説明する。 Next, the present invention will be explained with reference to all the drawings.

第１図は本発明の一実施例に係る半導体素子と外部リー
ド付けを説明する九めの概略斜視図である。図において
、１は半導体素子、２は表面のボンディング用！極、３
は側面のボンディング用電ｑ＊、’４は側面のボンディ
ング用電極３につながっている配線が形成されていると
ころの側面と表面との間の境界の斜面である。表面のボ
ンディング用ｆｉ＆ａ２は、従来と同じようにアルミ等
の金属ＩＪ線５でリードフレームの外部リード６と接続
される。側面ボンディング電極３は、外部リード７と熱
圧着で直接接続さ扛る。その後所要の樹脂封止などの外
装を施して半導体−Ｊ＆置の完成品とする。FIG. 1 is a ninth schematic perspective view illustrating a semiconductor element and external lead attachment according to an embodiment of the present invention. In the figure, 1 is for the semiconductor element and 2 is for surface bonding! pole, 3
is the bonding electrode q* on the side surface, and '4 is the slope of the boundary between the side surface and the surface where the wiring connected to the bonding electrode 3 on the side surface is formed. The bonding fi&a 2 on the front surface is connected to the external lead 6 of the lead frame with a metal IJ wire 5 made of aluminum or the like, as in the conventional case. The side bonding electrode 3 is directly connected to the external lead 7 by thermocompression bonding. Thereafter, the required exterior packaging such as resin sealing is applied to produce a completed semiconductor-J & equipment product.

〔発明の効果〕〔Effect of the invention〕

以上説明し九ように本発明の半導体装置では、外部リー
ドが増えても、半導体素子の面積を大きくする事なくボ
ンディング用電極を付加できる。As explained above, in the semiconductor device of the present invention, even if the number of external leads increases, bonding electrodes can be added without increasing the area of the semiconductor element.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明の一実施例に係る半導体素子と、この素
子への外部リード付けを説明するための概略斜視図であ
る。 １・・・・・・半導体素子、２・・・・・・素子表面の
ボンディング用′ＪＬ極、３・・・・・・側面ボンディ
ング用電極、４・・・・・・側面と表面の境界部胴面、
５・・・・・・金属細線、６．７・・・・・・外部リー
ド。FIG. 1 is a schematic perspective view for explaining a semiconductor device according to an embodiment of the present invention and external lead attachment to this device. 1...Semiconductor element, 2...'JL pole for bonding on the surface of the element, 3...Electrode for side bonding, 4...Boundary between side surface and surface Trunk surface,
5...Thin metal wire, 6.7...External lead.

Claims (1)

【特許請求の範囲】[Claims] 半導体素子上に設けられたボンディング電極と直接また
は金属細線を介して外部リードが接続された半導体装置
において、前記ボンディング電極は前記半導体素子の表
面および側面に設けられ、かつ前記側面のボンディング
電極の配線は側面と表面との境界部が斜面とされ、この
斜面部を経て表面から側面に導かれていることを特徴と
する半導体装置。In a semiconductor device in which an external lead is connected to a bonding electrode provided on a semiconductor element directly or via a thin metal wire, the bonding electrode is provided on the surface and side surface of the semiconductor element, and the wiring of the bonding electrode on the side surface is A semiconductor device characterized in that the boundary between the side surface and the front surface is a slope, and the semiconductor device is led from the surface to the side surface via this slope.
JP61258906A 1986-10-29 1986-10-29 Semiconductor device Pending JPS63110740A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61258906A JPS63110740A (en) 1986-10-29 1986-10-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61258906A JPS63110740A (en) 1986-10-29 1986-10-29 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS63110740A true JPS63110740A (en) 1988-05-16

Family

ID=17326673

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61258906A Pending JPS63110740A (en) 1986-10-29 1986-10-29 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS63110740A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5533664A (en) * 1993-09-07 1996-07-09 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device
US8840516B2 (en) 2010-11-04 2014-09-23 Toyota Jidosha Kabushiki Kaisha Dynamic damper device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6118164A (en) * 1984-07-04 1986-01-27 Mitsubishi Electric Corp Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6118164A (en) * 1984-07-04 1986-01-27 Mitsubishi Electric Corp Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5533664A (en) * 1993-09-07 1996-07-09 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device
US8840516B2 (en) 2010-11-04 2014-09-23 Toyota Jidosha Kabushiki Kaisha Dynamic damper device

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