JPS6310463B2 - - Google Patents

Info

Publication number
JPS6310463B2
JPS6310463B2 JP58167161A JP16716183A JPS6310463B2 JP S6310463 B2 JPS6310463 B2 JP S6310463B2 JP 58167161 A JP58167161 A JP 58167161A JP 16716183 A JP16716183 A JP 16716183A JP S6310463 B2 JPS6310463 B2 JP S6310463B2
Authority
JP
Japan
Prior art keywords
power
data
memory
count value
restored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58167161A
Other languages
Japanese (ja)
Other versions
JPS6057450A (en
Inventor
Osamu Arai
Ryoichi Nakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furuno Electric Co Ltd
Original Assignee
Furuno Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furuno Electric Co Ltd filed Critical Furuno Electric Co Ltd
Priority to JP58167161A priority Critical patent/JPS6057450A/en
Publication of JPS6057450A publication Critical patent/JPS6057450A/en
Publication of JPS6310463B2 publication Critical patent/JPS6310463B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1415Saving, restoring, recovering or retrying at system level
    • G06F11/1441Resetting or repowering
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/32Monitoring with visual or acoustical indication of the functioning of the machine
    • G06F11/324Display of status information
    • G06F11/325Display of status information by lamps or LED's

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Direct Current Feeding And Distribution (AREA)

Description

【発明の詳細な説明】 (a) 技術分野 この発明は電源遮断検出時に各種処理データを
バツテリバツクアツプされたメモリに退避させる
電子機器の電源遮断時処理装置に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field The present invention relates to a power-off processing device for electronic equipment that saves various processing data to a battery-backed-up memory when a power-off is detected.

(b) 従来技術とその欠点 瞬時停電等の電源遮断によつてデータが破壊さ
れるのを防止するには、一般に電源遮断を検出し
たときにそのときの処理データをバツテリバツク
アツプされたメモリに退避しておく必要がある
が、従来の電源遮断時処理装置は電源遮断を検出
したときにCPUを単にデータ退避処理モードに
移すに過ぎなかつた。このため入力電源のオフ時
から内部電圧が低下してCPUが動作しなくなる
までの時間が極端に短い場合にはデータ退避が正
しく行われないことになるが、そのような場合で
も、電源復帰時にCPUは退避していたデータが
正しいものとして処理を続行していく欠点があつ
た。
(b) Prior art and its disadvantages In order to prevent data from being destroyed due to a power interruption such as a momentary power outage, generally when a power interruption is detected, the processed data at that time is stored in a battery backed-up memory. It is necessary to save the data, but conventional power-off processing devices simply shift the CPU to data save processing mode when a power-off is detected. Therefore, if the time from when the input power is turned off until the internal voltage drops and the CPU stops operating is extremely short, data will not be saved correctly, but even in such cases, when the power is restored, The drawback was that the CPU continued processing assuming that the saved data was correct.

(c) 発明の目的 この発明の目的は、電源遮断時からCPUが動
作を停止するまでの時間をカウンタによつて監視
することにより、電源復帰時に電源遮断時のデー
タ退避が正確に行われたかどうかを外部に表示で
きるようにし、退避データが信頼性のあるものか
どうかをオペレータが容易に判定することのでき
る電子機器の電源遮断時処理装置を提供すること
にある。
(c) Purpose of the Invention The purpose of the present invention is to monitor the time from when the power is shut off until the CPU stops operating using a counter, thereby making it possible to check whether the data at the time of the power shutoff has been accurately saved when the power is restored. To provide a power-off processing device for electronic equipment, which allows an operator to easily determine whether saved data is reliable or not by displaying it externally.

(d) 発明の構成および効果 この発明は要約すれば、電源遮断検出後CPU
の動作が停止するまで計数するカウンタと、その
カウンタの計数値を計数毎にバツテリバツクアツ
プされたメモリへ書き込む計数値書き込む手段
と、電源復帰時に前記メモリに記憶されている計
数値を読み出し、その計数値の値に応じてデータ
退避の信頼性度合を表示するデータ退避信頼性表
示手段とを備え、電源遮断時からCPUが実質的
に動作を停止するまでの時間をカウンタによつて
計数し、電源復帰時にその計数値が所定の値を越
えているかどうかを判定して信頼性の度合を示す
表示を行うようにしたものである。
(d) Structure and Effects of the Invention To summarize, the present invention can be summarized as follows:
a counter that counts until the operation stops, a count value writing means that writes the count value of the counter to a battery backed-up memory every time a count is made, and a count value that reads the count value stored in the memory when the power is restored; and a data evacuation reliability display means for displaying the reliability of data evacuation according to the value of the count value, and a counter counts the time from when the power is cut off until the CPU substantially stops operating, When the power is restored, it is determined whether the counted value exceeds a predetermined value and a display indicating the degree of reliability is displayed.

(e) 実施例 第1図はこの発明の実施例である電源遮断時処
理装置のブロツク図である。
(e) Embodiment FIG. 1 is a block diagram of a power-off processing device which is an embodiment of the present invention.

図において、a,bは電源入力端子であり、通
常時に入力する電源によつてパワーサプライ1が
動作電圧を形成する。CPU2、メモリ3、I/
O4およびその他の回路要素は上記パワーサプラ
イ1によつて形成される電圧によつて動作し、メ
モリ3はその電圧が動作しきい値以下になつたと
きバツテリEによつて記憶データを保持する。比
較器5は電源電圧の遮断を検出し、電源遮断を検
出したときにCPU2に対し電源遮断信号を出力
する。I/O4にはランプLA,LB,LCが接続
され、電源が復帰したときCPU2の出力に基づ
いて何れかのランプを点灯する。
In the figure, a and b are power input terminals, and the power supply 1 generates an operating voltage based on the power input during normal times. CPU2, memory 3, I/
O4 and other circuit elements are operated by the voltage generated by the power supply 1, and the memory 3 retains stored data by the battery E when the voltage falls below the operating threshold. The comparator 5 detects the interruption of the power supply voltage, and outputs a power interruption signal to the CPU 2 when the power interruption is detected. Lamps LA, LB, and LC are connected to I/O4, and when the power is restored, one of the lamps is turned on based on the output of CPU2.

次に第2図を参照して上記電源遮断時処理装置
の動作を説明する。
Next, the operation of the power-off processing device will be described with reference to FIG.

まず、比較器5が電源遮断を検出するとCPU
2に対し電源遮断信号を送出し、動作モードを電
源遮断処理モードに移す。CPU2はこのモード
に移ると、まずステツプn1(以下、ステツプni
を単にniという。)にてそのときの必要な処理デ
ータをバツテリバツクアツプされたメモリ3の所
定のエリアに退避する。このデータ退避に必要な
時間は通常数msecである。CPU2はデータの退
避を終了すると、続いてn2でCPU内に割り当
てた電源保持カウンタCを1にセツトする。さら
にカウンタCの内容をメモリ3のエリアMAにセ
ツトしn3、続いてカウンタCをインクリメント
し、再びn3を実行する。CPU2はこのn3,
n4の動作をパワーサプライ1から供給される電
圧が動作しきい値以下になるまで継続する。
First, when comparator 5 detects power interruption, the CPU
A power cutoff signal is sent to 2, and the operation mode is shifted to the power cutoff processing mode. When CPU2 moves to this mode, it first goes to step n1 (hereinafter referred to as step ni).
is simply called ni. ), the necessary processing data at that time is saved to a predetermined area of the battery backed up memory 3. The time required to save this data is usually several milliseconds. After the CPU 2 finishes saving the data, it then sets the power supply holding counter C allocated within the CPU to 1 at n2. Further, the contents of counter C are set in area MA of memory 3, n3, and then counter C is incremented, and n3 is executed again. CPU2 is this n3,
The operation of n4 is continued until the voltage supplied from the power supply 1 becomes below the operating threshold.

次に電源が復帰すると、CPU2は電源復帰モ
ードを実行する。最初にn5においてメモリ3の
エリアMAにセツトされているデータを読み出
し、続いて次の電源遮断に備えるためにそのエリ
アMAをクリアするn6。次に読み出したエリア
MAのデータが0であるかどうかを判定しn7、
0でなければさらにそのデータが予め設定してあ
る一定の値N未満であるかどうかを判定するn
8。そして、上記のデータが0である場合にはn
9でデータ退避が動作不完全である旨を知らせる
ランプLCを点灯し、上記データがN未満である
ときにはn10において、データ退避は行われた
が電源保持時間が不足である旨を知らせるランプ
LBを点灯する。さらに上記データがN以上であ
るときにはn11においてデータ退避が完壁に行
われた旨を表すランプLAを点灯する。したがつ
てオペレータはランプLCが点灯しているときに
は電源遮断前に実行していたジヨブを最初からや
り直す必要があることを認識することができ、ま
たランプLAが点灯しているときには電源遮断前
に実行していたジヨブを電源復帰後に継続して実
行可能であることを認識することができる。また
ランプLBが点灯しているときは、実行している
ジヨブの重要性によつて最初からジヨブをし直す
必要があるか或いはそのまま継続してよいかを判
断することになる。
Next, when the power is restored, the CPU 2 executes the power restoration mode. First, in n5, the data set in area MA of memory 3 is read out, and then in n6, that area MA is cleared in preparation for the next power cutoff. Next read area
Determine whether the data of MA is 0 or not n7,
If it is not 0, further determine whether the data is less than a certain value N set in advance.
8. And if the above data is 0, then n
At step 9, a lamp LC is lit to indicate that data saving is incomplete, and when the above data is less than N, a lamp is lit at step n10 to indicate that data has been saved but power retention time is insufficient.
Turn on LB. Further, when the data is equal to or greater than N, a lamp LA is turned on at n11 to indicate that the data has been completely saved. Therefore, when the lamp LC is on, the operator knows that the job that was running before the power was cut off needs to be restarted from the beginning, and when the lamp LA is on, the operator knows that the job that was running before the power is cut off must be restarted from the beginning. It is possible to recognize that the job that was being executed can be continued after the power is restored. When the lamp LB is lit, it is determined whether the job needs to be restarted from the beginning or whether it can be continued, depending on the importance of the job being executed.

このようにランプLA〜LCの何れかが点灯され
るためにオペレータは電源復帰後のCPUのジヨ
ブについて適切な選択をすることができる。
Since any of the lamps LA to LC is lit in this manner, the operator can make an appropriate selection regarding the CPU job after power is restored.

(f) 発明の効果 以上のようにこの発明によれば、電源遮断検出
後CPUの動作が停止するまでの時間をカウンタ
によつて計数するとともに、その計数値をバツテ
リバツクアツプされたメモリに記憶し、電源復帰
時にその計数値を読み出して退避データの信頼性
を表示するようにしたので、データの退避が正確
に行われたかどうかを電源復帰時に容易に判定す
ることができ、電源復帰後に電源遮断前のジヨブ
を継続して実行することができるかまたは電源遮
断前に実行していたジヨブを再び最初から実行し
直す必要があるかを適正に判断することができ
る。このためデータ退避が正しく行われていない
にもかかわらず電源復帰後に電源遮断前のジヨブ
を継続して実行したり、またはデータ退避が正し
く行われているにもかかわらず電源復帰後に再び
電源遮断前のジヨブを最初から実行したりするこ
とがなく、電源復帰時のCPUの動作が能率的に
なる利点がある。
(f) Effects of the Invention As described above, according to the present invention, a counter counts the time until the CPU stops operating after a power cut is detected, and the counted value is stored in a battery backed-up memory. However, when the power is restored, the count value is read out and the reliability of the saved data is displayed, so it is easy to determine whether the data has been saved correctly when the power is restored. It is possible to appropriately judge whether the job that was being executed before the power was shut off can be continued or whether the job that was being executed before the power was shut off needs to be executed again from the beginning. As a result, the job that was in use before the power was shut off may continue to be executed after the power is restored even though the data has not been correctly evacuated, or the job that was before the power was shut off may continue to be executed after the power is restored even though the data has been evacuated correctly. This has the advantage that the CPU operates more efficiently when the power is restored, without having to execute the job from scratch.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の実施例である電源遮断時処
理装置のブロツク図、第2図は同処理装置の動作
を示すフローチヤートである。 1…パワーサプライ、5…比較器(電源遮断検
出用)。
FIG. 1 is a block diagram of a power-off processing device according to an embodiment of the present invention, and FIG. 2 is a flowchart showing the operation of the same processing device. 1...Power supply, 5...Comparator (for power cutoff detection).

Claims (1)

【特許請求の範囲】 1 電源遮断検出時に各種処理データをバツテリ
バツクアツプされたメモリに退避させるようにし
た電子機器の電源遮断時処理装置において、 電源遮断検出後CPUの動作が停止するまで計
数するカウンタと、そのカウンタの計数値を計数
毎に前記メモリへ書き込む計数値書込み手段と、
電源復帰時に前記メモリに記憶されている計数値
を読み出し、その計数値の値に応じてデータ退避
の信頼性度合を表示するデータ退避信頼性表示手
段と、を備えてなる電子機器の電源遮断時処理装
置。
[Scope of Claims] 1. In a power-off processing device for an electronic device that saves various processing data to a battery-backed-up memory when a power-off is detected, counting is performed until the operation of a CPU stops after a power-off is detected. a counter; a count value writing means for writing the count value of the counter to the memory for each count;
When power is cut off for an electronic device, the device is equipped with a data save reliability display means for reading out the count value stored in the memory when the power is restored, and displaying the degree of data save reliability according to the value of the count value. Processing equipment.
JP58167161A 1983-09-08 1983-09-08 Processor in breaking of power supply of electronic equipment Granted JPS6057450A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58167161A JPS6057450A (en) 1983-09-08 1983-09-08 Processor in breaking of power supply of electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58167161A JPS6057450A (en) 1983-09-08 1983-09-08 Processor in breaking of power supply of electronic equipment

Publications (2)

Publication Number Publication Date
JPS6057450A JPS6057450A (en) 1985-04-03
JPS6310463B2 true JPS6310463B2 (en) 1988-03-07

Family

ID=15844547

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58167161A Granted JPS6057450A (en) 1983-09-08 1983-09-08 Processor in breaking of power supply of electronic equipment

Country Status (1)

Country Link
JP (1) JPS6057450A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0248868U (en) * 1988-09-30 1990-04-04
JPH02247571A (en) * 1989-03-20 1990-10-03 Yokogawa Electric Corp Waveform measuring instrument

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62278621A (en) * 1986-05-27 1987-12-03 Seiko Epson Corp Power supply device
US5637279A (en) * 1994-08-31 1997-06-10 Applied Science & Technology, Inc. Ozone and other reactive gas generator cell and system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0248868U (en) * 1988-09-30 1990-04-04
JPH02247571A (en) * 1989-03-20 1990-10-03 Yokogawa Electric Corp Waveform measuring instrument

Also Published As

Publication number Publication date
JPS6057450A (en) 1985-04-03

Similar Documents

Publication Publication Date Title
JPS5911998B2 (en) Data check method
JPS6310463B2 (en)
JPH0126086B2 (en)
JPH0236003B2 (en)
JPH0394352A (en) Data destruction area detecting processing system
JPS61141059A (en) Terminal equipment
JPS6121695Y2 (en)
JPH0546496A (en) Memory backup system for cpu
JPS59227094A (en) Electronic computer
JPS6043265A (en) Reading and writing system of data
JPS6252650A (en) Memory checking method
JP3757407B2 (en) Control device
JPS5850029A (en) Power failure detector
JPH06103480B2 (en) Blackout processor
JPS62137643A (en) Microprocessor operation back-up circuit
JPS6247722A (en) Starting method for terminal equipment
JP2001337849A (en) Method for collecting failure information in computer system
JPS6072044A (en) Inspecting system of backup memory
JPH0374712A (en) Information processor
JPS6256541B2 (en)
JPS60169953A (en) Abnormality detecting method of computer
JPH09297714A (en) Method and device for backing up data
JPH04352018A (en) Data processor
JPH0368035A (en) Information processor
JPH01144315A (en) Power interruption detecting