JPS63103143U - - Google Patents
Info
- Publication number
- JPS63103143U JPS63103143U JP19786486U JP19786486U JPS63103143U JP S63103143 U JPS63103143 U JP S63103143U JP 19786486 U JP19786486 U JP 19786486U JP 19786486 U JP19786486 U JP 19786486U JP S63103143 U JPS63103143 U JP S63103143U
- Authority
- JP
- Japan
- Prior art keywords
- light
- impedance
- receiving element
- circuit
- input device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000003287 optical effect Effects 0.000 claims description 9
- 238000001514 detection method Methods 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Position Input By Displaying (AREA)
Description
第1図は、本考案の光学式座標入力装置の一実
施例の回路図であり、第2図は、本考案の光学式
座標入力装置の他の実施例の回路図であり、第3
図は、従来の光学式座標入力装置の一例の回路図
である。
L1〜Ln:発光ダイオード、PT1〜PTn
:フオトトランジスタ、1:第1の切換回路、3
:第2の切換回路、6:可変インピーダンス回路
、7:インピーダンス検出回路、R6:抵抗、Q
3:トランジスタ、S:基準電圧、COMP:比
較器。
FIG. 1 is a circuit diagram of one embodiment of the optical coordinate input device of the present invention, FIG. 2 is a circuit diagram of another embodiment of the optical coordinate input device of the present invention, and FIG.
The figure is a circuit diagram of an example of a conventional optical coordinate input device. L1 to Ln : light emitting diode, PT1 to PTn
: Phototransistor, 1: First switching circuit, 3
: Second switching circuit, 6: Variable impedance circuit, 7: Impedance detection circuit, R 6 : Resistor, Q
3 : Transistor, S: Reference voltage, COMP: Comparator.
Claims (1)
設し、これらの複数組の発光素子と受光素子を切
換回路で順次選択的に切り換えて駆動し、前記切
換回路で選択された発光素子から出力される光信
号を対向する受光素子が受光したか否かをこの受
光素子のインピーダンス変化で検知し、選択され
た受光素子が前記光信号を受光しない信号に基づ
いて座標信号を得る光学式座標入力装置において
、前記受光素子と直列に可変インピーダンス回路
を介装し、前記受光素子のインピーダンスに応じ
た電圧の低下を検出するインピーダンス検出回路
を設け、このインピーダンス検出回路の検出信号
により前記可変インピーダンス回路のインピーダ
ンスを低下させるようにしたことを特徴とする光
学式座標入力装置。 (2) 前記可変インピーダンス回路を、抵抗とト
ランジスタを並列接続して構成し、前記インピー
ダンス検出回路を、前記受光素子の両端電圧と基
準電圧とを比較器で比較して、前記受光素子のイ
ンピーダンスの低下を検出するように構成したこ
とを特徴とする実用新案登録請求の範囲第1項記
載の光学式座標入力装置。[Claims for Utility Model Registration] (1) A plurality of sets of light-emitting elements and light-receiving elements are arranged facing each other, and the plurality of sets of light-emitting elements and light-receiving elements are sequentially and selectively switched and driven by a switching circuit, The switching circuit detects whether or not the opposing light-receiving element receives the optical signal output from the light-emitting element selected by the change in impedance of the light-receiving element, and converts the selected light-receiving element into a signal that does not receive the optical signal. In an optical coordinate input device that obtains coordinate signals based on the light receiving element, a variable impedance circuit is interposed in series with the light receiving element, and an impedance detection circuit is provided to detect a drop in voltage according to the impedance of the light receiving element, and this impedance detection An optical coordinate input device characterized in that the impedance of the variable impedance circuit is lowered by a detection signal of the circuit. (2) The variable impedance circuit is configured by connecting a resistor and a transistor in parallel, and the impedance detection circuit compares the voltage across the light receiving element with a reference voltage using a comparator to determine the impedance of the light receiving element. The optical coordinate input device according to claim 1, wherein the optical coordinate input device is configured to detect a decrease.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986197864U JPH0449715Y2 (en) | 1986-12-22 | 1986-12-22 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986197864U JPH0449715Y2 (en) | 1986-12-22 | 1986-12-22 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS63103143U true JPS63103143U (en) | 1988-07-04 |
JPH0449715Y2 JPH0449715Y2 (en) | 1992-11-24 |
Family
ID=31158021
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986197864U Expired JPH0449715Y2 (en) | 1986-12-22 | 1986-12-22 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0449715Y2 (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6146627U (en) * | 1984-08-29 | 1986-03-28 | シャープ株式会社 | flat display device |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59109648A (en) * | 1982-12-15 | 1984-06-25 | 松下電工株式会社 | Roof structure in rafter part |
-
1986
- 1986-12-22 JP JP1986197864U patent/JPH0449715Y2/ja not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6146627U (en) * | 1984-08-29 | 1986-03-28 | シャープ株式会社 | flat display device |
Also Published As
Publication number | Publication date |
---|---|
JPH0449715Y2 (en) | 1992-11-24 |
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