JPS6295838A - Connection structure for ceramic substrate - Google Patents

Connection structure for ceramic substrate

Info

Publication number
JPS6295838A
JPS6295838A JP23526385A JP23526385A JPS6295838A JP S6295838 A JPS6295838 A JP S6295838A JP 23526385 A JP23526385 A JP 23526385A JP 23526385 A JP23526385 A JP 23526385A JP S6295838 A JPS6295838 A JP S6295838A
Authority
JP
Japan
Prior art keywords
melting point
gas
point metal
metal
low melting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23526385A
Other languages
Japanese (ja)
Inventor
Junji Hayakawa
順二 早川
Kazumasa Arai
新井 和正
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Ltd
Hitachi Microcomputer Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Microcomputer Engineering Ltd filed Critical Hitachi Ltd
Priority to JP23526385A priority Critical patent/JPS6295838A/en
Publication of JPS6295838A publication Critical patent/JPS6295838A/en
Pending legal-status Critical Current

Links

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To remove the gas in a low-melting point metal effectively and selectively by forming the configuration of a part of a low-melting point connection part of the side of a ceramic substrate so as not to be able to develop affinity with the low-melting point metal. CONSTITUTION:A part capable of developing affinity with a low-melting point metal 4 in the center and its vicinity of a conductor 8 to be connected to the metal 4 and a part uncapable of affiliating with the metal 4 lacking part of the part are formed in the conductor 8. When gas is generated in the metal 4 at high temperature, the gas shifts in the 4 due to a difference in specific gravity. When the gas shifts to the side of a ceramic substrate 6, the gas heads toward a part in a large height direction. As that part is ready-formed in a structure wherein the part does not develop affinity with the metal 4, the gas comes into contact with a part in a metal 4-free state. The gas is extruded by the surface tension of the metal 4. Hereby, the gas in the metal 4 is removed.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明はフェイスダウン接続形集積回路装置に係り、荷
にセラミック基板の低融点金属接続部の構成法に関する
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a face-down integrated circuit device, and relates to a method of constructing a low melting point metal connection portion of a ceramic substrate to a load.

〔発明の背景〕[Background of the invention]

第7図は従来公知のフェイスダウン接続形集積回烙装置
の断面図で、第8図は低融点金属を除いたセラミック基
板側の平面図である。半導体チップ1のチップ内配線導
体2の上j舊の絶縁膜−3にスルーホールを設け、低峨
点金属4と親和する導体5ビ形成し、セラミック基板6
の基板内配線導体9に絶縁層7を形成して、低融点金属
と接続される導体8とにより低融点金属ヲ介して双方の
接続を行うものである。このような溝底は、一般に低融
点金属中に気体が発生した場合、あるいは既に取り込ま
れている場合に、高温下において低融点金属との比重の
違いによって気体は移動する。気体の移動する側がセラ
ミック基板側である時、第8図の平面で見た時中心付近
に存在する気体は比重の違いにより移動しながらやはり
第2図の中心付近に到達し固定する。低融点金属中の気
体の体積が大ぎな場合は、第8図の理想的な接続面積を
気体が絶縁体となって大巾に削dする結果となり、禾凄
触状態1発生したり、妥続信頓性の低下ビもたら丁。
FIG. 7 is a sectional view of a conventionally known face-down connection type integrated heating device, and FIG. 8 is a plan view of the ceramic substrate side with the low melting point metal removed. A through hole is provided in the upper insulating film 3 of the intra-chip wiring conductor 2 of the semiconductor chip 1, a conductor 5 which is compatible with the low-temperature metal 4 is formed, and a ceramic substrate 6 is formed.
An insulating layer 7 is formed on the wiring conductor 9 in the substrate, and the low melting point metal and the conductor 8 to be connected are connected to each other through the low melting point metal. Generally, when gas is generated in the low melting point metal or is already taken in, the gas moves through the groove bottom due to the difference in specific gravity between the low melting point metal and the low melting point metal at high temperatures. When the side on which the gas moves is the ceramic substrate side, the gas existing near the center when viewed from the plane of FIG. 8 moves due to the difference in specific gravity until it reaches near the center of FIG. 2 and is fixed. If the volume of gas in the low melting point metal is large, the ideal connection area shown in Figure 8 will become an insulator and the gas will significantly reduce the area, resulting in a cataclysmic situation 1 or compromise. The result is a decrease in confidence.

なおこの種の@酵として関連するものには、例えば特開
昭53−37583  号が挙げられる。
This type of @fermentation is related to, for example, JP-A-53-37583.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、低融点金属中に発生または既に取り込
まれた気体のうち大きな体fItヲ持つものの除去を低
融点金属と親和する導体の平面構造によって提供するこ
とにある。
It is an object of the present invention to provide for the removal of gases having a large volume fIt from among the gases generated or already incorporated into the low melting point metal by means of a planar structure of a conductor that is compatible with the low melting point metal.

〔発明の概要〕[Summary of the invention]

本発明の特徴は、セラミック基板に半導体チツプタ実装
する時に低融点賛属の中の気体によって未接続あるいは
未接続に近い状態が生じる場合があることを考慮し、セ
ラミック基板接続部の低融点金属と親和するために設け
られた接続部の形状を一部欠落させて低融点金属と親和
できない部分を形成したことにある。
The feature of the present invention is to take into account that when a semiconductor chip is mounted on a ceramic substrate, gas in the low-melting point metal may cause an unconnected or almost unconnected state. The reason is that the shape of the connecting portion provided for compatibility is partially removed to form a portion that is not compatible with the low melting point metal.

〔発明の実施例〕[Embodiments of the invention]

以下本発明の実施例を第1図〜第4図により・・詳細に
説明する。
Embodiments of the present invention will be described in detail below with reference to FIGS. 1 to 4.

第1図は、フェイスダウン接続される部分の半導体チッ
プとセラミック基板と低融点金属の断面図を示す。第2
図は低融点金属を除いたセラミック基板側の接続部の平
面図である。
FIG. 1 shows a cross-sectional view of a semiconductor chip, a ceramic substrate, and a low melting point metal in a face-down connected portion. Second
The figure is a plan view of the connection portion on the ceramic substrate side excluding the low melting point metal.

1は半導体チップ、2はチップ内配線導体、3は絶縁膜
、4は低融点金属、5はチップ内配線導体と低融点金属
と親和させる導体を示している。6はセラミック基板で
、7はセラミック基板の絶縁層、8は低融点金属と接続
される導体で、少くとも低融点金属と親和できる部分の
中゛心付近とさらに一部ン欠落して低融点金属と親和で
きない部分を形成している。9は基板内配線導体である
。10は低融点金属中にある気体である。
1 is a semiconductor chip, 2 is an in-chip wiring conductor, 3 is an insulating film, 4 is a low melting point metal, and 5 is a conductor that makes the in-chip wiring conductor compatible with the low melting point metal. 6 is a ceramic substrate, 7 is an insulating layer of the ceramic substrate, and 8 is a conductor to be connected to a low melting point metal, at least near the center of the part that can be compatible with the low melting point metal, and a further part is missing and the low melting point is removed. It forms a part that is incompatible with metal. 9 is a wiring conductor within the board. 10 is a gas present in the low melting point metal.

セラミック基板の接続部は、基板内配線導体の上の−N
を除いて絶縁膜を形成し、低融点金属と親和できる導体
を絶縁膜のない基板内配線導体上に形成する。低融点金
属は半導体チップ側に形成しであるものとする。半導体
チップをセラミック基板上に位置決めして接触させ、高
温炉を通過させて低融点金属を半導体チップ接続部とセ
ラミック基板接続の間で融解させて接続する。この高温
下において、低融点金属中に気体が生じた時あるいは既
に低融点金属中に気体が取り一部まれていた場合に、温
度上昇とともに膨張して大きな体積となる気体は第6図
の低融点金属の中を比重の違いによって移置する。
The connection part of the ceramic board is -N above the wiring conductor in the board.
An insulating film is formed on the insulating film, and a conductor that is compatible with the low melting point metal is formed on the wiring conductor in the substrate without the insulating film. It is assumed that the low melting point metal is formed on the semiconductor chip side. The semiconductor chip is positioned on and in contact with the ceramic substrate, and passed through a high temperature furnace to melt and connect the low melting point metal between the semiconductor chip connection portion and the ceramic substrate connection. At this high temperature, when gas is generated in the low melting point metal, or if some gas is already trapped in the low melting point metal, the gas expands and becomes large in volume as the temperature rises, as shown in Figure 6. Displaces inside melting point metals depending on the difference in specific gravity.

セラミック基板側に気体が移動する時第1図の高さ方向
の大なる部分に向かう。その部分が低融点金属と親和し
ない構造となっているため、気体は低融点金属の無い状
態の部分と接触する。
When the gas moves toward the ceramic substrate side, it moves towards the larger part in the height direction in FIG. Since that part has a structure that is not compatible with low melting point metals, the gas comes into contact with the part in a state where there is no low melting point metal.

この部分は低融点金属と親和しないので安定位置となら
ず、低融点金属と親和できない部分を伝わり、気体は低
融点金属の表面張力のために押し出される。これにより
低融点金属中の気体は除去できる。
This part does not have an affinity with the low melting point metal, so it cannot be in a stable position, and the gas is forced out due to the surface tension of the low melting point metal. This allows the gas in the low melting point metal to be removed.

高温下において低融点金属は液体又は液体に近い状態で
、低融点金属中の膨張した気体が移動できないほどの小
規模気体は接続抵抗を増大させる要因にはならず除去さ
せる必要はない。
At high temperatures, the low melting point metal is in a liquid or near-liquid state, and small-scale gases that cannot be moved by the expanded gas in the low melting point metal do not increase the connection resistance and do not need to be removed.

】 熱膨張して低融点金属中を比重の違いにより移動できる
ほどの気体は理想的な接続面fitヲ大巾に削減し半導
体チップとセラミック基板間の接続抵抗を増大する可能
性が大きく、この気体については効率よく選択的に除去
できる。
] A gas that can thermally expand and move through a low melting point metal due to the difference in specific gravity will greatly reduce the width of the ideal connection surface and will likely increase the connection resistance between the semiconductor chip and the ceramic substrate. Gases can be efficiently and selectively removed.

第3図は、第1図同様に半導体チップとセラミック基板
と低融点金属の断面図である。第4図は第2図と四様に
低融点金属を除いたセラミック基板側の平面図である。
FIG. 3 is a cross-sectional view of a semiconductor chip, a ceramic substrate, and a low melting point metal, similar to FIG. 1. FIG. 4 is a plan view of the ceramic substrate side with the low melting point metal removed in the same way as FIG. 2.

第3図、第4図はセラミック基板側の低融点金属と親和
できない部分の形状を基板内配線導体にも類似して形成
しである。これにより低融点金属中の気体の除去が可能
であると同時に、メッキ処理で低融点金属と親和する導
体を形成するS会にそのまま適用できる。
In FIGS. 3 and 4, the shape of the portion of the ceramic substrate that is not compatible with the low melting point metal is formed to be similar to that of the wiring conductor within the substrate. This makes it possible to remove the gas in the low melting point metal, and at the same time, it can be directly applied to the S-conductor which forms a conductor that is compatible with the low melting point metal through plating.

第5図は、第1図同様に半導体チップとセラミック基板
と低融点金属の断面図である。第6図は第2図と同様に
低融点金属を除いたセラミック基板側の平面図である。
FIG. 5 is a cross-sectional view of a semiconductor chip, a ceramic substrate, and a low melting point metal, similar to FIG. 1. FIG. 6 is a plan view of the ceramic substrate side with the low melting point metal removed, similar to FIG. 2.

第5図、第6図はセラミック基板l111の低融点金属
と親和できない部分の形状を絶縁層にて形成しである。
In FIGS. 5 and 6, the shape of the portion of the ceramic substrate l111 that is not compatible with the low melting point metal is formed using an insulating layer.

これにより低融点金属中の気体の除去が可能であると同
時に、メッキ処理で低融点金属と親和する導体を形成す
る場合にも適用できる。
This makes it possible to remove gas from low-melting point metals, and at the same time, it can also be applied to the formation of conductors that are compatible with low-melting point metals through plating.

〔発明の効果〕〔Effect of the invention〕

−以上説明したように本発明によれば、セラミック基板
側の低融点接続部の一部の形状を低融点金属と親和でき
ないように形成したので、低融点金属中の気体?効果的
に選択的に除去することが可能となり、接続抵抗を低減
したり、接続信頼性の低下を防ぐことが可能となる。
- As explained above, according to the present invention, the shape of a part of the low-melting point connection part on the ceramic substrate side is formed so that it is not compatible with the low-melting point metal, so that the gas in the low-melting point metal is not compatible with the low-melting point metal. It becomes possible to effectively and selectively remove it, and it becomes possible to reduce connection resistance and prevent a decrease in connection reliability.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第3図、第5図は本発明の一実施例のフェイス
ダウン接続形集積回路の断面図、第21図、第4図、第
6図は本発明による基板側の低融点金属接続図の平面図
、第7図及び第8図は従来のフェイスダウン接続形集積
回路の断面図及び基板側の低融点金属接続部の平面図で
ある。 3・・・絶縁膜、4・・・低融点金属、6・・・セラミ
ック基板、7・・・絶縁層、9・・・基板内配線導体。
1, 3, and 5 are cross-sectional views of a face-down connection type integrated circuit according to an embodiment of the present invention, and FIGS. 21, 4, and 6 are sectional views of a low melting point metal on the substrate side according to the present invention. The plan view of the connection diagram, FIGS. 7 and 8, are a sectional view of a conventional face-down connection type integrated circuit and a plan view of a low melting point metal connection portion on the substrate side. 3... Insulating film, 4... Low melting point metal, 6... Ceramic substrate, 7... Insulating layer, 9... In-board wiring conductor.

Claims (1)

【特許請求の範囲】[Claims] 1、半導体チップ上に設けた低融点金属接続部とフェイ
スダウン接続用のチップ接続部のあるセラミック基板に
おいて、セラミック基板側の低融点金属接続部の一部の
形状を低融点金属と親和できないように形成することに
よつて低融点金属接続部を構成することを特徴とするセ
ラミック基板接続構造。
1. In a ceramic substrate with a low melting point metal connection part provided on a semiconductor chip and a chip connection part for face-down connection, the shape of a part of the low melting point metal connection part on the ceramic substrate side is made so that it is not compatible with the low melting point metal. A ceramic substrate connection structure characterized in that a low melting point metal connection part is formed by forming a ceramic substrate connection structure.
JP23526385A 1985-10-23 1985-10-23 Connection structure for ceramic substrate Pending JPS6295838A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23526385A JPS6295838A (en) 1985-10-23 1985-10-23 Connection structure for ceramic substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23526385A JPS6295838A (en) 1985-10-23 1985-10-23 Connection structure for ceramic substrate

Publications (1)

Publication Number Publication Date
JPS6295838A true JPS6295838A (en) 1987-05-02

Family

ID=16983495

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23526385A Pending JPS6295838A (en) 1985-10-23 1985-10-23 Connection structure for ceramic substrate

Country Status (1)

Country Link
JP (1) JPS6295838A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01215034A (en) * 1988-02-24 1989-08-29 Matsushita Electric Ind Co Ltd Semiconductor device
US5477086A (en) * 1993-04-30 1995-12-19 Lsi Logic Corporation Shaped, self-aligning micro-bump structures
US5767580A (en) * 1993-04-30 1998-06-16 Lsi Logic Corporation Systems having shaped, self-aligning micro-bump structures

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01215034A (en) * 1988-02-24 1989-08-29 Matsushita Electric Ind Co Ltd Semiconductor device
US5477086A (en) * 1993-04-30 1995-12-19 Lsi Logic Corporation Shaped, self-aligning micro-bump structures
US5558271A (en) * 1993-04-30 1996-09-24 Lsi Logic Corporation Shaped, self-aligning micro-bump structures
US5767580A (en) * 1993-04-30 1998-06-16 Lsi Logic Corporation Systems having shaped, self-aligning micro-bump structures

Similar Documents

Publication Publication Date Title
US4893172A (en) Connecting structure for electronic part and method of manufacturing the same
JP4323303B2 (en) Substrate manufacturing method
JPH0441519B2 (en)
JPH07112041B2 (en) Method for manufacturing semiconductor device
JPH0245357B2 (en) KIBANNOSETSUZOKUKOZO
JPS6295838A (en) Connection structure for ceramic substrate
JP2780756B2 (en) Insert parts for electronic components
JPS6286834A (en) Semiconductor chip connecting structure
JPS57145367A (en) Three-dimensional semiconductor device
JPH06268086A (en) Semiconductor integrated circuit device and printed board mounted with same
JPS5830187A (en) Both-side printed board and method of connecting same
JPH0744018Y2 (en) Projection electrode structure
JPS61214548A (en) Tape carrier
JPH0318742B2 (en)
JPS62249465A (en) Semiconductor device
JPH01207961A (en) Semiconductor device
JPH02137247A (en) Semiconductor integrated circuit
JPS6032777Y2 (en) insulated terminal
JPS5956788A (en) Electric circuit part
JPS62216180A (en) Electric connector
JPH09283617A (en) Semiconductor device and manufacture thereof
JPS5853448U (en) temperature fuse
JPS6364918B2 (en)
JPS6233498A (en) Hybrid integrated circuit device
JPS58157184A (en) Hall element