JPS6293956A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To simplify the process of ion implantation and to form a channel stop region with facility by a method wherein a trench is filled with an impurity-containing insulating material and a heat treatment is accomplished for the impurity to be diffused for the formation of a channel stop region around the trench. CONSTITUTION:A thermal oxide film 22 is formed on a P-type Si substrate 21, a nitride film 23 is formed by CVD, and a photosensitive resin film 24 is formed thereon. Lithography is applied for the local removal of films 24, 23, 22 for the provision of a window 25. The Si substrate 21 in the window 25 is subjected to RIE etching for the formation of a trench 26. The film 24 is removed and, by the LPCVD method, a BSG (borosilicate glass) film 27 is grown containing 2-5wt% of B2O3. Etch-back is accomplished for the removal of the films, 27, 23, 22 from the active region. Heat treatment is performed for the formation of a gate oxide film 28 on the Si substrate 21 and, simultaneously, B ions are allowed to be diffused out of the BSG film 27 for the formation of a channel stop layer 29 covering the bottom and side walls of the trench 26.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for manufacturing a semiconductor device, and in particular, to a method for manufacturing a semiconductor device.
The present invention relates to a method for forming an isolation region of a type semiconductor device.

(Prior art) Conventionally, as a manufacturing method of MO3 semiconductor device, '198
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The configuration will be explained below using FIG. 4.

FIG. 2 is a manufacturing process diagram of such a conventional MO3 type semiconductor device.

First, as shown in FIG. 2(a), a thermal oxide film 12 and then a nitride film 13 are formed on a type silicon substrate 11, and a photosensitive resin film 14 for forming an element isolation pattern is formed.
Coating.

Next, using lithography technology, a window is opened in the field region, and the nitride film 13 and thermal oxide film 11212 are etched away.

Next, as shown in FIG. 2(b), the P-type silicon substrate 11 is etched using reactive ion etching (RIE) technology.
A trench 15 having a depth of about 0.6 Jm is formed in the trench. Thereafter, the photosensitive resin film 14 is removed using a resist ashing device or the like.

Next, as shown in FIG. 2(c), boron ions are implanted into the side walls of the trench at an angle of about 8 degrees with respect to the vertical direction of the silicon substrate 11 for channel stop.
sidewall) section. At this time, the ion implantation layer 16 is formed.

Next, low pressure CVD oxidation (LPCVD 5iOz) film 1
7 is formed on the entire surface, and a trench 15 is formed using this LPCVDSi.
Fill with O□ film 17.

Next, as shown in FIG. 2(e), in order to flatten the trench isolation region, an isolation region ncD is etched by an etching method.
L P CV D 5iOz film 17, nitride film 13, and thermal oxide film 12 are removed.

In this way, an element isolation region having a trench structure is formed.

(Problems to be Solved by the Invention) However, if the above conventional manufacturing method is used, (1)
) As the size and shape of the trench become smaller, there are parts of the side wall (side wall) where ions are not implanted even if ion implantation is performed at an angle.

(2) The ion implantation method using an angle has the problem that the implantation process is complicated and an implanted layer with good reproducibility cannot be obtained.

The present invention eliminates the problems described in 2 above, simplifies the one-time ion implantation for element isolation, and furthermore, the implanted layer within 1.1/inch is not affected by the trench shape, and L2 is stable. An object of the present invention is to provide a method for manufacturing a semiconductor device that can form a separation region.

(Means for Solving the Problems) In order to solve the above problems, the present invention, in a semiconductor manufacturing method, forms a window in an element isolation region using lithography technology, and then performs reactive ion etching (RI).
Form a trench in the element isolation region using E). Next, the trench is filled with a vapor phase grown (CVD) film doped with impurities and heat treated.The CVD film serves as a diffusion source, and the impurity is diffused into the bottom and sidewalls of the trench, forming a channel stop stone. This is how it was done.

(Function) According to the present invention, after the trench is formed, the trench is filled with an insulator containing an impurity, and then the impurity contained in the insulator is diffused by heat treatment to form a channel stop region on the outer periphery of the trench. Therefore, the ion implantation for forming the RFiff region for each element is simple, and the formation of the Rustknob layer can also be easily performed.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a manufacturing process diagram of an MO5 type semiconductor device showing one embodiment of the present invention.

As shown in Figure 1 (,1), first, the specific resistance is 3~
A thermally oxidized It922 having a thickness of 1008 to 300 thick is formed on a P-type silicon substrate 21 of 4Ω C11l, and then a nitride film 23 having a thickness of 1000 to 2000 thick is formed by CVD. Furthermore, in order to separate the active region and field region (element isolation region), nitride lI23F was added.
To! A photosensitive resin film 24 is applied by applying a photosensitive resin (resist).
form.

Next, as shown in FIG. 1(b), the photosensitive resin film 24 and the nitride film 2 in the element isolation region are formed using lithography technology.
3. The window 25 is formed by removing the thermal oxide film 22.

Next, as shown in FIG. 1(c), a trench 26 is formed by etching the silicon base of the window 25, which will become an isolation region, using reactive ion etching (RIE).

Next, the photosensitive resin film 24 is removed using an ashing device or the like. After this, by the LPCVD method, BS G (Boronsil
ica glass) film 27 is grown over the entire surface.

Next, as shown in FIG. 1(e), the BSG film 27 and the nitride film 23 in the active region are etched using an etch hack method.
, the thermal oxide film 22 is removed by etching.

Next, as shown in FIG. 1(f), oxidation is carried out at 900 DEG C. to 1000 DEG C. to form a gate oxide film of 200 to 500 thick on the P-type Noricon substrate 21 for two days.

At the same time, this oxidation causes poron in the BSG film 27 in the trench to be diffused, forming channel ston knobs jiJ29 at the base and sidewalls.

Hereinafter, according to a known method for manufacturing an MO5 type semiconductor device,
Proceed through the process step by step.

Note that (1) in the first embodiment, a P-type substrate is used, but an N-type substrate can also be used. (2) After forming the trench in the same manner as in the first embodiment, for example, instead of forming the BSG film, P 205 ?
PSG (Phosph) with a Q degree of 16 to 20% by weight.

The trench may be filled with a 5ilica Glass film.

Note that the present invention is not limited to the above embodiments,
Various modifications are possible based on the spirit of the present invention, and these are not excluded from the scope of the present invention.

(Effects of the invention) Explained in detail above, according to Ming,
1. A method for manufacturing a semiconductor device, which includes a step of forming an isolation region on a semiconductor board and filling the trench with an insulating material. What is the process of filling an insulator containing an insulator and then diffusing a rare impurity into the insulator described in iii by a Kuha process to form a channel I-knob region for external use in the trench? Therefore, it is possible to easily form a uniform channel stop layer on the base and sidewalls of a 1-trench.Particularly, even when the shape of the trenches is narrowed to 7L, it is possible to form a uniform channel stop layer.

(2) Since the ion implantation for channel stop is not done in one piece, the manufacturing process can be simplified [3].

As described above, the effects brought about by the present invention are significant.

[Brief explanation of drawings]

FIG. 1 is a manufacturing process diagram of a semiconductor device according to the present invention, and FIG. 2 is a manufacturing process diagram of a conventional semiconductor device. 21... Silicon substrate, 22... Thermal oxide film, 23...
...Nitride film, 24...Photosensitive resin film, 25...Window,
2G...trench, 27...BSG film, 28...
Gate oxide film, 29...Channel stop N. Patent applicant Oki Electric Industry Co., Ltd. (1 other person) Agent Patent attorney Mamoru Shimizu, 2nd year patent attorney
/-2゛δ゛Spit version Ikamoto Scream day FAj 291 (zushi ≦ Bushidokot,!Kimi] 1t's El imaginary L! S;Go Figure 1

Claims (3)

[Claims] (1) A method for manufacturing a semiconductor device including a step of filling a trench formed in a semiconductor substrate with an insulating material to form an isolation region, including: (a) after forming the trench, filling the trench with an insulating material containing an impurity; (b) Next, a step of diffusing impurities contained in the insulator by heat treatment to form a channel stop region on the outer periphery of the trench. (2) The insulator containing impurities in the filling process is PS.
The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is G. (3) The insulator containing impurities in the filling process is BS
The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is G.