JPS6290960A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6290960A
JPS6290960A JP23171685A JP23171685A JPS6290960A JP S6290960 A JPS6290960 A JP S6290960A JP 23171685 A JP23171685 A JP 23171685A JP 23171685 A JP23171685 A JP 23171685A JP S6290960 A JPS6290960 A JP S6290960A
Authority
JP
Japan
Prior art keywords
resistor
input
polysilicon resistor
input protection
polysilicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23171685A
Other languages
Japanese (ja)
Inventor
Kazuo Hirabayashi
平林 一雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP23171685A priority Critical patent/JPS6290960A/en
Publication of JPS6290960A publication Critical patent/JPS6290960A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0288Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To enhance the damage limit of an input protecting polysilicon resistor by forming a metal which has lower electric resistance than the polysilicon resistor on a portion bent in the polysilicon resistor. CONSTITUTION:A momentary high voltage such as static electricity applied to an input/output pad 1 is again discharged through a contact 11 to the upper layer of a bent portion 9 of an input protective polysilicon resistor 4 when passing the bent portion 9 of the resistor 4 connected with the pad 1. Thus, the concentration of the electric field at the bent portion 9 of the resistor 4 is reduced, and the damage limit of the resistor is enhanced. A metal 10 connected with the contact 11 with the upper layer of the bent portion 9 of the resistor 4 for the purpose of reducing the concentration of the electric field is a substance which has smaller resistance than the polysilicon such as silicide.

Description

【発明の詳細な説明】 〔竜業上の利用分舒〕 この発明は、半導体装置に係り、特に静電気から内部回
路を保護する入力保護回路を含む半導体装置如関する。
DETAILED DESCRIPTION OF THE INVENTION [Product Usage] The present invention relates to a semiconductor device, and particularly to a semiconductor device including an input protection circuit that protects internal circuits from static electricity.

〔従来の技術〕[Conventional technology]

従来、この種の入力保護回路は、第2図に示す様に回路
の入出力端子と内部回路との間にポリシリコンで形成さ
れた抵抗器を挿入する事によっていた。
Conventionally, this type of input protection circuit has involved inserting a resistor made of polysilicon between the input/output terminal of the circuit and the internal circuit, as shown in FIG.

第2図は従来例でありfi+は入出力パラF、(2)は
入出力パッド側端子、(31はコンタクト、t4)は入
力保護ポリシリコン抵抗、(5)は内部回路側端子、(
6)は入力保護トランジスタ、(7)は入力保護拡散抵
抗である。入力保護回路に必要な特性は、半導体装置の
正常な動作範囲においては電流を流さず、異常電圧に対
しては内部回路の破壊電圧よりも充分低い電圧で電流を
流して入力回路をクランプし。
Figure 2 shows a conventional example, where fi+ is an input/output para F, (2) is a terminal on the input/output pad side, (31 is a contact, t4) is an input protection polysilicon resistor, (5) is a terminal on the internal circuit side, (
6) is an input protection transistor, and (7) is an input protection diffused resistor. The characteristics required for an input protection circuit are such that no current flows within the normal operating range of the semiconductor device, and in response to abnormal voltages, the current flows at a voltage sufficiently lower than the breakdown voltage of the internal circuit to clamp the input circuit.

更にサージ電圧に対して速やかに応答することである。Furthermore, it is necessary to quickly respond to surge voltage.

これらの条件を?IAたすものとして、例えばnチャネ
ルMO3においては、前記gIJ29に示す回路があっ
た。従来例の動作を、第2図の等価回路である第3図に
おいて説明する。この回路では、入出力パッド側端子(
2)と内部回路fIIIl 幼子(5)との間に入力保
護ポリシリコン抵抗(41があり、内部回路側端子(6
1と内部回路との間に入力保護トランジスタ(6)、入
力保護拡散抵抗(7)、前2抵抗(7)と基板(P型)
とのpn接合によるダイオード(8)とがあり、基板電
位(GND)に対して負電圧が入出力パッド側端子(2
1に加わった時には入力保護トランジスタ(6)とダイ
オード(8)との順方向特性によってこれをクランプし
、正電圧が加わった時には入力保護トランジスタ(6)
内pn接合と、ダイオード(8)との回復可能なブレー
クダウンによってこれをクランプし、更に11列抵抗+
61 、 +71の分圧効果を利用してそのクランプ効
果′5−更に向上させている。
These conditions? As an IA, for example, in the n-channel MO3, there was a circuit shown in the gIJ29 mentioned above. The operation of the conventional example will be explained with reference to FIG. 3, which is an equivalent circuit of FIG. 2. In this circuit, the input/output pad side terminal (
There is an input protection polysilicon resistor (41) between the internal circuit fIIII child (5) and the internal circuit side terminal (6).
Between 1 and the internal circuit, input protection transistor (6), input protection diffused resistor (7), front 2 resistor (7) and substrate (P type)
There is a diode (8) formed by a pn junction with the input/output pad side terminal (2
1, it is clamped by the forward characteristics of the input protection transistor (6) and diode (8), and when a positive voltage is applied, the input protection transistor (6)
It is clamped by an inner p-n junction and a recoverable breakdown with a diode (8), and a further 11 column resistors +
The clamping effect '5- is further improved by utilizing the partial pressure effect of 61 and +71.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来の構造においては、入力保護ポリシリコン抵抗
(41の抵抗値を大きく、かつ占有する面精を小さくす
る必要性から、入力保護ポリシリコン抵抗(4)の形状
を屈曲させていた。そのため、入出力パッドfi+に静
電気等の高電圧が印加された際に屈曲部(91の内側部
に電界が集中するので、入力保護ポリシリコン抵抗(4
)の屈曲部(91の内側部が破壊されるという問題点が
あった。
In the conventional structure described above, the shape of the input protection polysilicon resistor (4) is bent due to the need to increase the resistance value of the input protection polysilicon resistor (41) and reduce the surface area occupied. When a high voltage such as static electricity is applied to the input/output pad fi+, the electric field concentrates on the inside of the bent part (91), so the input protection polysilicon resistor (4
) There was a problem in that the inner part of the bent part (91) was destroyed.

本発明の目的は、上記のような問題点を解消する念めに
なされたもので、入力保護ポリシリコン抵抗内での電界
集中を軽減することにより、入力保護ポリシリコン抵抗
の破壊限界を耳くする事を目的とする。
The purpose of the present invention was to solve the above-mentioned problems, and by reducing electric field concentration within the input protection polysilicon resistor, it is possible to overcome the breakdown limit of the input protection polysilicon resistor. The purpose is to do.

〔間が点を解決するための手段〕[Means for resolving the gap]

この発明に係る半導体装置は、入力保護ポリシリコン抵
抗内の屈曲した部分に、この入力保護ポリシリコン抵抗
より電気抵抗が低い金属を形成したものである。
In the semiconductor device according to the present invention, a metal having an electrical resistance lower than that of the input protection polysilicon resistor is formed in the bent portion of the input protection polysilicon resistor.

〔作用〕[Effect]

この発明における半導体装置は、前記入力保護ポリシリ
コン抵抗内での電界集中を軽減され、前記入力保護ポリ
シリコン抵抗の破壊限界を高める。
In the semiconductor device of the present invention, electric field concentration within the input protection polysilicon resistor is reduced, and the breakdown limit of the input protection polysilicon resistor is increased.

〔発明の実症例〕[Actual case of invention]

以下、この発明の一実施例を図について説明する。第1
図において、(lO)は入力保護ポリシリコン抵抗(4
)の屈曲部(91の上層部に櫃まれた金属(例えばアル
ミニウム層)である。01)は前記入力保時ポリシリコ
ン抵抗(41の屈曲部(91と前記入力係挿ポリシリコ
ン抵抗(41の屈曲部(91の上層部に積まれた金属(
例えばアルミニウム) (101とのコンタクトである
An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, (lO) is the input protection polysilicon resistor (4
) is a metal (for example, an aluminum layer) interposed in the upper layer of the input time keeping polysilicon resistor (41). Bent part (metal stacked on the upper part of 91)
For example, aluminum) (contact with 101).

上ゲ借造においては、入出力パッド(1)に印加された
静電気等の瞬時的高電圧は、入出力パッド(11に接続
している入力係蹄ポリシリコン抵抗(4)の屈曲部(9
)を通過する際、入力保護ポリシリコン抵抗(4)の屈
曲部(91の上層部にコンタクトαυをもって接続され
た金属(例えばアルミニウム層) (101を経て。
In the upper case, instantaneous high voltage such as static electricity applied to the input/output pad (1) is applied to the bent part (9) of the input snare polysilicon resistor (4) connected to the input/output pad (11).
), the metal (for example, an aluminum layer) connected to the upper layer part (91) of the input protection polysilicon resistor (4) with a contact αυ (101).

再び入力保護ポリシリコン抵抗(41の11線部分に放
出されるので、入力保護ポリシリコン抵抗(4)の屈曲
部(91における電界集中は軽減される。
Since the electric field is again discharged to the 11th line portion of the input protection polysilicon resistor (41), the electric field concentration at the bent portion (91) of the input protection polysilicon resistor (4) is reduced.

なお、上記実症例の構造を形成する際に、電界集中を峰
減する目的で入力保護ポリシリコン抵抗(41の屈曲部
(91の上層部にコンタクトαυをもって接続される金
属tlolはシリサイド等ポリシリコンより抵抗の小さ
い物質で、上記作用をするものならばよい。またコンタ
クトα℃の個数は上記実症例に示した個数に限定される
ものではない。
In addition, when forming the structure of the above actual case, in order to reduce electric field concentration, the metal tlol connected to the upper layer of the input protection polysilicon resistor (41 with a contact αυ) is made of polysilicon such as silicide. Any material having lower resistance and having the above-mentioned effect may be used.The number of contacts α°C is not limited to the number shown in the above-mentioned actual case.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば、入出力パッドに印加
された静電気等の開時高電圧は、入力保護ポリシリコン
抵抗の屈曲部に集中せず、入力保時ポリシリコン抵抗の
破壊限界が高められる。
As described above, according to the present invention, the open high voltage such as static electricity applied to the input/output pad is not concentrated at the bent part of the input protection polysilicon resistor, and the breakdown limit of the input time preservation polysilicon resistor is reduced. be enhanced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例による半導体装置を示す上
面図、第2図は従来の半導体装置を示す上面図、第3図
は従来の半導体装置を示す上面図第2図の等価回路図で
ある。 図において、(!1は入出力パッド、(2)は入出力パ
ッド側端子、(3)はコンタクト、(41は入力保護ポ
リシリコン抵抗、(5)は内部回路側端子、(6)は入
力保護トランジスタ、(7)は入力保護拡散抵抗、(8
)は入力保護拡散抵抗(7)と基板とのpn接合による
ダイオード、(91は入力保護ポリシリコン抵抗(4)
の屈曲部、(10)は入力保護ポリシリコン抵抗(41
の屈曲部(91の上層部に槽ま拘た金属、0℃は前記入
力保循ポリシリコン抵抗の屈曲部(91と前記入力保護
ポリシリコン抵抗(4)の屈曲部(91の上層部に稍ま
ね、た金属t+01とのコンタクト、(2)は基準電位
の金属である。 図中、同一符号は相当部分を示す。
FIG. 1 is a top view showing a semiconductor device according to an embodiment of the present invention, FIG. 2 is a top view showing a conventional semiconductor device, and FIG. 3 is a top view showing a conventional semiconductor device, and an equivalent circuit diagram of FIG. 2. It is. In the figure, (!1 is the input/output pad, (2) is the input/output pad side terminal, (3) is the contact, (41 is the input protection polysilicon resistor, (5) is the internal circuit side terminal, (6) is the input Protection transistor, (7) is input protection diffused resistor, (8
) is a diode formed by a pn junction between the input protection diffused resistor (7) and the substrate, (91 is the input protection polysilicon resistor (4)
(10) is the input protection polysilicon resistor (41
The bent part of the input protection polysilicon resistor (91) and the bent part of the input protection polysilicon resistor (4) (91) The contact with the imitated metal t+01 (2) is the metal at the reference potential. In the figure, the same reference numerals indicate corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 入力保護ポリシリコン抵抗内の屈曲した部分に上記入力
保護ポリシリコン抵抗より電気抵抗値の低い金属を形成
したことを特徴とする半導体装置。
1. A semiconductor device characterized in that a metal having an electrical resistance lower than that of the input protection polysilicon resistor is formed in a bent portion of the input protection polysilicon resistor.
JP23171685A 1985-10-16 1985-10-16 Semiconductor device Pending JPS6290960A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23171685A JPS6290960A (en) 1985-10-16 1985-10-16 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23171685A JPS6290960A (en) 1985-10-16 1985-10-16 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6290960A true JPS6290960A (en) 1987-04-25

Family

ID=16927894

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23171685A Pending JPS6290960A (en) 1985-10-16 1985-10-16 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6290960A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63275158A (en) * 1987-05-06 1988-11-11 Nec Corp Semiconductor device
JPS6482662A (en) * 1987-09-25 1989-03-28 Mitsubishi Electric Corp Input protective circuit of semiconductor
US5019883A (en) * 1987-01-28 1991-05-28 Mitsubishi Denki Kabushiki Kaisha Input protective apparatus of semiconductor device
JP2008177466A (en) * 2007-01-22 2008-07-31 Epson Imaging Devices Corp Display unit and electronic device having the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5019883A (en) * 1987-01-28 1991-05-28 Mitsubishi Denki Kabushiki Kaisha Input protective apparatus of semiconductor device
JPS63275158A (en) * 1987-05-06 1988-11-11 Nec Corp Semiconductor device
JPS6482662A (en) * 1987-09-25 1989-03-28 Mitsubishi Electric Corp Input protective circuit of semiconductor
JP2008177466A (en) * 2007-01-22 2008-07-31 Epson Imaging Devices Corp Display unit and electronic device having the same

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