JPS6288348A - Ic mounting structure - Google Patents

Ic mounting structure

Info

Publication number
JPS6288348A
JPS6288348A JP60229281A JP22928185A JPS6288348A JP S6288348 A JPS6288348 A JP S6288348A JP 60229281 A JP60229281 A JP 60229281A JP 22928185 A JP22928185 A JP 22928185A JP S6288348 A JPS6288348 A JP S6288348A
Authority
JP
Japan
Prior art keywords
molding material
mounting structure
large opening
substrate
printing method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60229281A
Other languages
Japanese (ja)
Inventor
Yasuhiro Azuma
泰弘 東
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP60229281A priority Critical patent/JPS6288348A/en
Publication of JPS6288348A publication Critical patent/JPS6288348A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To ensure quick feeding of a molding material and to make it possible to feed the molding material in a printing method, by providing a large opening part in a substrate corresponding to an IC in an FD method. CONSTITUTION:In an FD method, a large opening part 4 is provided in a substrate corresponding to an IC1. The feeding of a molding material 6 is made easy. Thus a printing method can be used. Namely, a part in the direction, where fingers are provided, is made as large as possible, and a part in the direction perpendicular to the fingers is made slightly larger than the IC1.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の実装構造に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a mounting structure for a semiconductor device.

〔発明の概要〕[Summary of the invention]

本発明は半導体装置のＦＤ方式における実装構造におい
てｒｃに対応する基板の開口部を大きく取り、モールド
作業を行ない易くしたものである。The present invention provides a mounting structure for a semiconductor device using the FD method, in which the opening of the substrate corresponding to the rc is made large to facilitate the molding operation.

〔従来の技術〕[Conventional technology]

従来の半導体装置のＦＤ方式における実装構造は、第３
図、第４図の様であり、ＩＣに対応する基板のモールド
材供給穴は小さく、特開昭５３−１３９４６８の様にモ
ールド材の供給時間が多く必要であり又圧力を加えない
とｒｃと基板の間にうまく入って行かない。The mounting structure in the conventional FD method of semiconductor devices is
As shown in Fig. 4, the molding material supply hole of the board corresponding to the IC is small, and as in JP-A-53-139468, it takes a long time to supply the molding material, and unless pressure is applied, the rc It doesn't fit well between the boards.

〔発明が解決しようとする問題点及び目的〕しかし前述
の従来技術では、ＩＣに対応する基板の穴が小さく、モ
ールド材の供給時間が多く必要であり又、圧力を加えな
いとＩＣと基板の間にうまく入って行かないと言う欠点
があった。[Problems and objects to be solved by the invention] However, in the above-mentioned conventional technology, the hole in the substrate corresponding to the IC is small, it takes a long time to supply the molding material, and the IC and the substrate do not come together unless pressure is applied. The problem was that it didn't fit in well.

そこで本発明はこの様な問題点を解決するもので、モー
ルドの供給を少ない時間で容易な方法でスムースに行な
うことを目的とする。The present invention is intended to solve these problems, and aims to smoothly supply molds in a short time and in an easy manner.

〔問題を解決するだめの手段〕[Failure to solve the problem]

本発明の半導体装置は、ＦＤ方式においてＩＣに対応す
る基本の開口部を第１図の様に大きく取り、モールド材
の供給を容易とし、更に印刷方式によることを可能とし
た事を特徴とする特〔実施例〕 第１・図（平面図）、第２図（第１図の断面図）は、本
発明の実施例におけるＦＤ方式のＩＣと対応する基板開
口部の関係を示した図である。フィンガーのある方向は
出来るだけ大きく又、直角方向はＩＣよりや＼大きくす
る。The semiconductor device of the present invention is characterized in that in the FD method, the basic opening corresponding to the IC is made large as shown in FIG. 1, making it easy to supply molding material, and further making it possible to use the printing method. Particular [Embodiment] Figure 1 (plan view) and Figure 2 (cross-sectional view of Figure 1) are diagrams showing the relationship between the FD type IC and the corresponding substrate opening in the embodiment of the present invention. be. The direction of the finger should be as large as possible, and the direction at right angles should be slightly larger than the IC.

〔発明の効果〕〔Effect of the invention〕

以上述べた様に発明によれば、第１図、第２図の様１ｃ
ＦＤ方式におけるｒｃと対応する基板の開口部を大きく
することで、モールド材の供給をスピーディにかつ確実
に行ない又、印刷方式によるモールド材供給を可能とし
た。As described above, according to the invention, as shown in FIGS. 1 and 2, 1c
By enlarging the opening of the substrate corresponding to rc in the FD method, molding material can be supplied quickly and reliably, and molding material can be supplied by printing method.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は、本発明によるＩＣ実装構造平面図第２図は、
本発明による第１図主要部の断面図第３図は、従来技術
によるｒｃ実装構造平面図第４図は、従来技術による第
６図の断面図１：ＩＣ ２；ＩＣのパッド ６；基板のパターン ４；基板の開口部 ５；基板 ６；モールド ７；半田バンブ ８；従来技術によるモールド供給穴。 以上 図面の浄書（内容に変更なし） 第１図 第２図 第３図 第４図 昭和　６１年　２　Ｂ　２６　Ｂ 昭和６０年　　　特許願　第２２９２８１　号２発明の
名称 工、Ｃ実装構造 ３、補正をする者 事件との関係 １４４１東京都新宿区西新宿２丁目４番１号（２５６）
セイコーエプソン株式会社 ４イ、□　２、　　　　　懺頴役服部一部〒１０４　東
京都中央区京橋２丁目６番２１号図面（第１〜４図）（
内容に変更なし）７、／　補正の内容FIG. 1 is a plan view of an IC mounting structure according to the present invention.
FIG. 3 is a plan view of the RC mounting structure according to the present invention. FIG. 4 is a cross-sectional view of FIG. 6 according to the prior art. 1: IC 2; IC pad 6; Pattern 4; substrate opening 5; substrate 6; mold 7; solder bump 8; mold supply hole according to prior art. Engraving of the above drawings (no changes to the contents) Figure 1 Figure 2 Figure 3 Figure 4 1986 2 B 26 B 1985 Patent Application No. 229281 2 Title of invention, C mounting structure 3, amendments Relationship with the incident 1441 2-4-1 Nishi-Shinjuku, Shinjuku-ku, Tokyo (256)
Seiko Epson Co., Ltd. 4 I, □ 2, Part of the Hattori Department of Kakko Epson, 2-6-21 Kyobashi, Chuo-ku, Tokyo 104 Drawings (Figures 1 to 4) (
No change in content) 7. / Content of amendment

Claims (1)

【特許請求の範囲】[Claims] フェースダウンボンディング法（以下ＦＤと記す）にお
いて、ＩＣ保護の為のモールド用の基板開口部の形状を
ＩＣのパッド方向はパッド内端に近くまで広げ、又その
クロス方向はＩＣの外形よりやゝ大きく形成し、又、こ
の大きな開口部を利用し印刷方式によつてＩＣ表面にモ
ールドレジンを供給することを特徴とするＩＣ実装構造
。In the face-down bonding method (hereinafter referred to as FD), the shape of the substrate opening for the mold for IC protection is widened in the direction of the IC pad to near the inner edge of the pad, and in the cross direction, it is widened closer to the outer edge of the IC. An IC mounting structure characterized by forming a large opening and supplying mold resin to the IC surface by a printing method using this large opening.
JP60229281A 1985-10-15 1985-10-15 Ic mounting structure Pending JPS6288348A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60229281A JPS6288348A (en) 1985-10-15 1985-10-15 Ic mounting structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60229281A JPS6288348A (en) 1985-10-15 1985-10-15 Ic mounting structure

Publications (1)

Publication Number Publication Date
JPS6288348A true JPS6288348A (en) 1987-04-22

Family

ID=16889655

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60229281A Pending JPS6288348A (en) 1985-10-15 1985-10-15 Ic mounting structure

Country Status (1)

Country Link
JP (1) JPS6288348A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5518957A (en) * 1991-10-10 1996-05-21 Samsung Electronics Co., Ltd. Method for making a thin profile semiconductor package
US6124629A (en) * 1988-09-20 2000-09-26 Hitachi, Ltd. Semiconductor device including a resin sealing member which exposes the rear surface of the sealed semiconductor chip
US6326681B1 (en) 1988-09-20 2001-12-04 Hitachi, Ltd Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6124629A (en) * 1988-09-20 2000-09-26 Hitachi, Ltd. Semiconductor device including a resin sealing member which exposes the rear surface of the sealed semiconductor chip
US6326681B1 (en) 1988-09-20 2001-12-04 Hitachi, Ltd Semiconductor device
US5518957A (en) * 1991-10-10 1996-05-21 Samsung Electronics Co., Ltd. Method for making a thin profile semiconductor package

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