JPS6288172A - Information recording and reproducing system - Google Patents

Abstract

PURPOSE:To improve the correcting capacity against a burst error, and to simplify the constitution of a system by making the length of data information in which a prescribed code in the first direction is contained, equal to the length of data information in which a code in the second direction is contained, except a block sync of a format. CONSTITUTION:Data information from a host computer of a system is stored in a memory 41 having planes (a)-(d) which have formed four code products. Data D0, D1, and D2..., etc. of its each one byte unit are written successively by 32 bytes in the first row of the plane (a), and subsequently, written in the fourth row of the planes (b)-(d). Thereafter, in the same way, the data D0, D1, D2... are written successively in 32 rows and 32 columns of each plane (a)-(d), and a matrix is formed. Subsequently, by a control signal from the computer, addresses in the direction C1 and in the direction C2 are generated successively from an address generator 42. Also, in accordance with the address, the data D0, D1, D2... of an equal length are read out of each plane (a)-(d) in the column and the row directions, inputted to a code decoder 43, and the correcting capacity against a burst error is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an information recording and reproducing method for recording and reproducing digital data signals on a recording medium such as an optical disk.

[Summary of the invention]

The present invention provides an information recording and reproducing method for recording and reproducing digital signals on a recording medium, in which a sector is composed of an ID field containing address information, etc., and a data field consisting of a predetermined number of blocks and containing predetermined data information. The data information constituting the data field of one sector is divided into a plurality of planes constituting a plurality of mutually independent product codes, and a predetermined code is added in the first direction in each plane to generate the first a second direction perpendicular to the first direction;
A second code is formed by adding a predetermined code in the direction of When recording data information constituting the data information, the data information is sequentially read from the memory along a first or second direction,
The data information read once in the first or second direction is defined as one block, and a block sync is added to the beginning of each block to form a format. The length of the data information including the code is made equal to the length of the data information including the predetermined code in the second direction, thereby increasing the burst error correction ability.

[Background technology]

In recent years, information recording and reproducing devices that record and reproduce digital signals on optical discs and the like have become popular. FIG. 7 is a block diagram of such an information recording/reproducing apparatus.

That is, the main body 1 is controlled by a host computer 3 to record and reproduce information on an optical disk (optical memory disk) 2.

Commands from the host computer 3 are sent via the small computer system interface bus (SC5I BUS).
) is input to the host interface (I/F) 7, and further transmitted to the main controller 4, DMA device (direct memory access device) 6, etc. that control various devices 1 means, etc. The main controller 4 controls various devices, means, etc. Further, the DMA device 6 controls the buffer memory 5 and the like, and causes data to be directly transmitted and received between the memories. The data is input to an error correction circuit 9 via an interface (I/F) 8, and after signal processing such as addition of a code for error detection and correction is performed, the data is modulated by a modulation/demodulation circuit 1o. After this signal is further processed in the RF signal processing circuit 11, it is input to the optical pickup servo control circuit 12 and recorded on the optical disc 2. Furthermore, data reproduction is performed through a route opposite to that described above.

As codes for error detection and correction, for example, product codes, adjacent codes, etc. are used. FIG. 8 shows a data processing path when detecting and correcting errors using a product code.

That is, as shown in FIG. 9, the input data is first a two-digit row.

They are arranged in a matrix of k edgit columns. Then, the encoder 21 adds the code of m1 digit to one of them (column direction in the figure) and generates code C1.
The encoder 22 adds the sign of m2 digits in the other direction (in the row direction in the figure) to form the code C2.
g nz =kz +mZ) Construct a product code of digits. This signal is modulated by the modulator 23, and the communication path 2
4 (recorded on optical disc 2).

The signal from the communication path 24 is demodulated by a demodulator 25 and then input to a decoder 26, where errors in the C2 direction are first corrected. Thereafter, error correction in the C1 direction is performed by the demodulator 27, and the signal is output to a circuit (not shown).

A hardware device for detecting and correcting errors through such a route is configured as shown in FIG. 10, for example. That is, the encoder 21 in the C1 direction. The encoder 22 in the C2 direction, the decoder 27 in the C1 direction, and the decoder 26 in the C2 direction are each connected to the memory 28 constituting the buffer memory 5 in FIG. 7 via a data bus, and
The data bus is connected to an external device (not shown) via an interface (I/F) 29 and an input/output (I10> port 30).

By the way, the present applicant made the lengths of the two codes c1 and 02 equal in the planes constituting the product code as shown in FIG. 9 (n1=n2, k=2), and increased the number of planes. An attempt was made to record and reproduce information in four pieces. That is, as shown in FIG. 11, four planes (at b, C1d) constituting the product code are provided in the memory 28, and data Do, D, D2, etc. in 1-byte units output from the host computer 3 are stored. First, the first plane of plane a
Write 32 bytes sequentially to the row, then write the first
32 bytes were written in the first row, and the following writing was performed in the same manner in the first row of plane C and plane d. When that was completed, the data was moved to the second row of plane a, and writing was performed in the same manner. Then, as shown in FIG. 12, a 1024-byte matrix consisting of 32-byte rows and 32-byte columns is formed, and encoders 21 and 22 each have two
Added byte parity (P, Q).

When recording on the optical disk 2, as shown in FIG. 13, the first 1 byte of data Doa on plane a and the first 1 byte of data D on plane b. b, first 1-byte data D of plane C; C, reads the first 1 byte of data D, d of plane d in this order, then moves to the next 1 byte of data D, a of plane a, and in the same way, reads the first row of each plane a to d. When all data is read, the data up to that point is considered as one block. Then, at the beginning of each block, each 1-by-1 block sync (BS
) was added to form the format shown in FIG. 14, and this was recorded in the data field of one sector. Note that one sector is composed of an ID field containing address information, etc., and this data field.

[Problem that the invention seeks to solve]

When information is recorded in this way, each row and column has two
Since the parity (P,Q) is recorded, one error correction is possible in each row and each column. Therefore, this format has the ability to correct one block of burst errors, as shown in FIG. However, as shown in FIG. 16, for example, if a dropout occurs across the block sync (BS) and a bit slip occurs due to a read clock shift, there is a problem that an uncorrectable error occurs in section A. Ta.

[Means for solving problems]

The outline of the apparatus for carrying out the information recording and reproducing method of the present invention is given in Section 7.
The case is the same as that shown in the figure, and the data processing path during error detection and correction is also the same as the case shown in FIG. However, the apparatus for error detection and correction is constructed as shown in FIG. Memory 41 (buffer memory 5 in FIG.
), and an address generator 42 that outputs a predetermined address to the memory 41 via the address bus.

A code decoder 43 that transmits and receives data to and from the memory 41 via a data bus is provided. The address generator 42 can be switched when correcting the C1 direction and the C2 direction. Further, the code/decoder 43 can be switched between operating as an encoder and decoder.

[Effect]

The effect will now be explained. Data output from the host computer 3 is stored in the memory 41. As shown in FIG. 3, the memory 41 has planes a to d forming four product codes. And data D each in units of 1 byte. , D□, D2, etc. are the first planes of plane a.
32 bytes are sequentially written to the first row of plane b, and then 32 bytes are written to the first row of plane b. Thereafter, writing is performed in the same manner on the first line of plane C and plane d, and when that is completed, the writing moves to the second line of plane a.

Writing is performed in the same manner below. As a result, as shown in FIG. 4, a 1024-byte matrix consisting of 32-byte rows and 32-byte columns is formed in each plane a to d.

Next, the address generator 42 is switched by a control signal from the host computer 3, and an address for generating a code in the C1 direction (FIG. 5) is generated. That is, an address in the column direction of each plane a to d is generated, and the data stored at the address is input to the code decoder 43 to generate 2-byte parity (P, Q). Then, this parity (P, Q) is added to the end of the corresponding column of each plane a to d and stored in the memory 41. Address generator 42 is then switched to 02
An address is generated to generate a code for the direction (FIG. 5). That is, an address in the row direction of each plane a to d is generated, and the data stored at that address is input to the code decoder 43, and a 2-byte parity (
P, Q) are generated. And this parity (P, Q)
is added to the end of the corresponding row of each plane a to d,
It is stored in the memory 41.

In this way, in each plane a to d, two codes C
Since the lengths of C1 and C2 are made equal, one code/decoder 43 can be used as an encoder for two directions.

Next, the data stored in the memory 41 is transferred to the optical disc 2.
When recording to plane a, as shown in Figure 6, each plane
From d to d, the first even-numbered 1-byte data D, a
, DI, b, D, c, D, d are read out sequentially. Next, one byte is skipped over, and the next even-numbered one byte of data D, a, D, b, D, c, Dad is read out in sequence. Similarly, when all even-numbered data (including parity) in the first row of each plane a to d is read out, the data up to that point is treated as one block. Next, when all the odd-numbered data (including parity) in the first row of each plane a to d is read out in the same way, the data up to that point is treated as one block. Similar operation processing is performed for each line from the second line onwards. A block sync (BS) each consisting of 1 byte is added to the beginning of each block. As a result, a format as shown in FIG. 1 is formed. The data shown in this format is
It is recorded in a data field that constitutes one sector together with an ID field that includes address information and the like.

As is clear from FIG. 1, in this format, the length of each column and the length of each row are equal (68 bytes) except for the block sync. Therefore, the burst error correction capability is two blocks, and even if a dropout occurs in two blocks across the block sync as described above and a bit slip occurs, the error can be corrected.

During decoding, the code decoder 43 is switched to operate as a decoder, and the same operations as described above are performed.

As a method for modulating data, for example, the MFM method (
Modified FM method), MF
It is also possible to form a (irregular) pattern that does not appear in the M method and use this as a block sync.

〔effect〕

As described above, the present invention provides an information recording/reproduction system in which a sector is composed of a field containing address information, etc., and a data field consisting of a predetermined number of blocks and containing predetermined data information, and a digital signal is recorded and reproduced on a recording medium. In this method, data information constituting a data field of one sector is divided into a plurality of planes constituting a plurality of mutually independent product codes, and a predetermined code is added in the first direction in each plane. 1 code, and add a predetermined code in a second direction perpendicular to the first direction to form a second code, so that the lengths of the first code and the second code are equal. When recording data information constituting a data field of one sector on a recording medium, the data information is sequentially read out from the memory along a first or second direction, and the first or second direction is The data information read once in the first direction is defined as one block, and a block sync is added to the beginning of each block to form a format. Since the length is made equal to the length of the data information including the predetermined code in the second direction, it is possible to further improve the ability to correct burst errors. Furthermore, it becomes possible to use one encoder and decoder for the two correction directions.

[Brief explanation of drawings]

Fig. 1 is an explanatory diagram of the format of the information recording and reproducing system of the present invention, Fig. 2 is a block diagram of the error detection and correction device, Figs. 3 to 6 are schematic explanatory diagrams of the plane, and Fig. 7 8 is an overall block diagram of a conventional information recording and reproducing apparatus, and FIG. 8 is a block diagram showing a data processing path during error detection and correction. Figure 9 is an explanatory diagram of the plane forming the product code, the first
Figure 0 is a block diagram of the error detection and correction device.
Figures 13 to 13 are schematic illustrations of the plane, and Figure 14 is a schematic explanatory diagram of the plane.
Figures 1 through 16 are explanatory diagrams of the format. 1... Main unit 2... Optical disk 3... Host computer 4... Main controller 5... Buffer memory 6... DMA device 7...
・Host interface 8...Interface 9...Error correction circuit 1o...Modulation/demodulation circuit 11...RF signal processing circuit 12...Optical pickup servo control circuit 21.22...Encoder 23. ...Modulator 24...
・Communication channel 25...Demodulator 26.27...Decoder 28...Memory 29...Interface 30...I/O port 41...Memory 42...
・Address generator 43... code decoder or higher

Claims (1)

[Claims] An information recording and reproducing method in which a sector is composed of an ID field containing address information, etc., and a data field consisting of a predetermined number of blocks and containing predetermined data information, and a digital signal is recorded and reproduced on a recording medium. The data information constituting the data field of one sector is divided into a plurality of planes constituting a plurality of mutually independent product codes, and a predetermined code is added in a first direction in each plane. A first code is formed by adding a predetermined code in a second direction perpendicular to the first direction, and a second code is formed by adding a predetermined code in a second direction perpendicular to the first direction. When storing the data information constituting the data field of one sector on the recording medium, the data information is stored in the memory so that the lengths are equal, and the data information is stored along the first or second direction. sequentially read from the memory,
The data information read once in the first or second direction is
a block, and a block sync is added to the beginning of each block to form a format, and in the format, excluding the block sync, the length of the data information including the predetermined code in the first direction is An information recording and reproducing method characterized in that the length of the data information including the predetermined code in a second direction is made equal to the length of the data information.