JPS6285427A - Heat treating method for semiconductor device - Google Patents

Heat treating method for semiconductor device

Info

Publication number
JPS6285427A
JPS6285427A JP22368885A JP22368885A JPS6285427A JP S6285427 A JPS6285427 A JP S6285427A JP 22368885 A JP22368885 A JP 22368885A JP 22368885 A JP22368885 A JP 22368885A JP S6285427 A JPS6285427 A JP S6285427A
Authority
JP
Japan
Prior art keywords
impurity
ions
implanted
microwave
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22368885A
Other languages
Japanese (ja)
Inventor
Satoru Fukano
深野 哲
Takashi Ito
隆司 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP22368885A priority Critical patent/JPS6285427A/en
Publication of JPS6285427A publication Critical patent/JPS6285427A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To highly integrate or accelerate one layer in a semiconductor device by implanting impurity ions to a semiconductor substrate, then emitting a microwave to activate it, thereby suppressing the spread of the impurity implanted region. CONSTITUTION:Impurity ions are implanted to a semiconductor substrate, and a microwave is then emitted to activate it. The region which becomes amorphous by implanting impurity ions such as arsenic ions or P ions to the substrate more readily absorbs the microwave of, for example, 2.45 (GHz) then the portion which is not amorphous. Accordingly, if the impurity ions are implanted by an ion implanting method and the microwave is emitted when forming a necessary impurity region in a semiconductor device, the region to which the impurity ions are implanted mainly absorbs the microwave to be heated. Thus, thermal influence is hardly affected to the semiconductor portion to which the ions are not implanted or a wiring portion which reflects the microwave but impurity atoms can be activated.

Description

【発明の詳細な説明】 [概要〕 本発明は、半導体装置の熱処理方法に於いて、不純物イ
オンが注入された半導体基板(或いは半導体層)にマイ
クロ波を照射し、主として不純物導入領域を発熱させ、
他の部分に熱的悪影響を与えることなく、不純物原子の
電気的な活性化を行い得るようにすることに依り、不純
物導入領域の拡がりを抑制して半導体装置に於ける一層
の高集積化或いは高速化を可能にする。
[Detailed Description of the Invention] [Summary] The present invention is a heat treatment method for a semiconductor device in which a semiconductor substrate (or semiconductor layer) into which impurity ions are implanted is irradiated with microwaves to mainly generate heat in an impurity-introduced region. ,
By making it possible to electrically activate impurity atoms without adversely affecting other parts, the expansion of the impurity-introduced region can be suppressed and the integration of semiconductor devices can be further increased. Enables high speed.

〔産業上の利用分野〕[Industrial application field]

本発明は、イオン注入された不純物原子を電気的に活性
化させる際に適用して好結果が得られる半導体装置の熱
処理方法に関する。
The present invention relates to a heat treatment method for a semiconductor device that can be applied to electrically activate implanted impurity atoms and achieve good results.

〔従来の技術〕[Conventional technology]

現在、半導体装置を製造する場合、イオン注入法を適用
して不純物導入領域を形成することは日常的に行われ、
不可欠の技術になっている。
Currently, when manufacturing semiconductor devices, it is common practice to apply ion implantation to form impurity introduced regions.
It has become an essential technology.

そのイオン注入法で不純物導入領域を形成する場合、不
純物イオンを半導体基板(或いは半導体層)に注入して
から熱処理を行い、不純物原子を電気的に活性化するこ
とが絶対に必要である。
When forming an impurity-introduced region using the ion implantation method, it is absolutely necessary to implant impurity ions into the semiconductor substrate (or semiconductor layer) and then perform heat treatment to electrically activate the impurity atoms.

通常、そのような熱処理を行うには、閉管法、即ち、半
導体ウェハを石英管中に挿入し、その石英管を電気炉に
入れて加熱したり、近年では、半導体ウェハにレーザ或
いはランプからの光を照射して加熱するなどの手段も採
られている。
Usually, such heat treatment is carried out by a closed tube method, that is, by inserting the semiconductor wafer into a quartz tube and heating the quartz tube in an electric furnace. Measures such as heating by irradiating light have also been adopted.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

前記従来の熱処理方法のうち、電気炉に依る手段では、
かなりの高温、例えば約900C℃〕乃至1000(’
C)程度の温度を必要とし、半導体ウェハ全体が加熱さ
れ、従って、不純物導入領域は拡大されてしまう欠点が
ある。
Among the conventional heat treatment methods, means using an electric furnace include:
Quite high temperature, for example about 900℃ to 1000℃
C), the entire semiconductor wafer is heated, and the impurity-introduced region is therefore enlarged.

第2図は電気炉に依る熱処理を行った場合に於けるキャ
リヤfelt度分布を説明する為の線図を表している。
FIG. 2 shows a diagram for explaining the carrier felt degree distribution when heat treatment is performed using an electric furnace.

図では、横軸に半導体ウェハ表面からの深さ、縦軸にキ
ャリヤ濃度をそれぞれ採っである。
In the figure, the horizontal axis represents the depth from the semiconductor wafer surface, and the vertical axis represents the carrier concentration.

図に於いて、■はイオン注入直後の1.88(,1゜L
indhard  M、5−charf f  H,F
、。
In the figure, ■ is 1.88 (, 1°L) immediately after ion implantation.
indhard M, 5-charf f H,F
,.

Σchiott)理論曲線を、■は実験で得られたキャ
リヤ分布曲線をそれぞれ示している。
Σchiott) represents a theoretical curve, and ■ represents a carrier distribution curve obtained experimentally.

このデータを得たイオン注入並びに熱処理の条件は次の
通りである。
The ion implantation and heat treatment conditions under which this data was obtained are as follows.

半導体基板:p型シリコン(Si) 不純物イオン:1g (p) ドーズI: 5 X 10+5  (cm−”)注入エ
ネルギ:80(KeV) 熱処理温度=900〔℃〕 熱処理時間:30〔分〕 図から明らかなように、前記従来技術に依った場合の分
布曲線■は、理論分布曲線■G、′対して深さ方向に約
2倍に拡大されている。
Semiconductor substrate: p-type silicon (Si) Impurity ions: 1g (p) Dose I: 5 x 10+5 (cm-”) Implantation energy: 80 (KeV) Heat treatment temperature = 900 [°C] Heat treatment time: 30 [minutes] From the figure As is clear, the distribution curve (2) according to the prior art is approximately twice as large as the theoretical distribution curve (G,') in the depth direction.

また、レーザ或いはランプからの光を照射する手段では
、熱処理の時間が前記電気炉の場合と比較して短いが、
周囲温度をTmさせておく必要がある点では大差ない。
Furthermore, when using a means for irradiating light from a laser or a lamp, the heat treatment time is shorter than when using the electric furnace.
There is no big difference in that the ambient temperature needs to be kept at Tm.

とごろで、半導体装置に対する高集積化の要求は依然と
して強く、従って、微細加工に関しては勿論のこと、不
純物導入領域を浅く形成すること及びそれにも関連する
がプロセスを低温化すること等について更に改良された
技術が必要である。
Nowadays, there is still a strong demand for higher integration in semiconductor devices, and therefore, further improvements are needed not only in terms of microfabrication, but also in shallowly forming impurity-introduced regions and, related to this, in lowering the process temperature. Advanced technology is required.

本発明は、イオン注入法を適用して不純物導入領域を形
成する際、不純物原子を活性化する為の熱処理を低温で
行うことができるようにし、不純物導入領域が拡大され
ることを防1にして半導体装置の高集積化或いは高速化
を達成しよとするものである。
The present invention enables heat treatment for activating impurity atoms to be performed at a low temperature when forming an impurity-introduced region by applying an ion implantation method, thereby preventing the impurity-introduced region from expanding. The aim is to achieve higher integration or higher speed of semiconductor devices.

〔問題点を解決するための手段〕[Means for solving problems]

本発明者等は、数多くの実験を行った結果、半導体基板
(或いは半導体層)に不純物イオン、例えば砒素(As
)イオン或いはPイオンなどが注入されて非結晶化され
た領域は、非結晶化されていない部分に比較し、例えば
、2. 45 (Gllz)のマイクロ波を吸収し易い
ことを見出した。
As a result of numerous experiments, the present inventors discovered that impurity ions, such as arsenic (As), were added to the semiconductor substrate (or semiconductor layer).
) A region that has been made amorphous by implanting ions or P ions, etc., has a 2. 45 (Gllz) was found to easily absorb microwaves.

従って、半導体装置に必要な不純物領域を形成する際、
イオン注入法を適用して不純物イオンを打ち込み、マイ
クロ波を照射すると、不純物イオンを注入した領域が主
としてマイクロ波を吸収して発熱するので、不純物イオ
ンの注入が行われなかった半導体の部分或いはマイクロ
波を反射してしまう配線の部分など、熱処理を必要とし
ない部分には熱に依る影響を殆ど与えることなく、不純
物原子の活性化を実現することができる。
Therefore, when forming impurity regions necessary for semiconductor devices,
When impurity ions are implanted using the ion implantation method and microwaves are irradiated, the region into which the impurity ions are implanted mainly absorbs the microwaves and generates heat, so it Activation of impurity atoms can be achieved with almost no effect of heat on parts that do not require heat treatment, such as parts of wiring that reflect waves.

そこで、本発明では、半導体基板(或いは半導体層)に
不純物イオンを注入してからマイクロ波を照射して活性
化させるようにしている。
Therefore, in the present invention, impurity ions are implanted into a semiconductor substrate (or a semiconductor layer) and then microwaves are irradiated to activate the impurity ions.

〔作用〕[Effect]

前記のようにすると、不純物イオンが注入された領域の
みの発熱が大になり、その他の領域は熱の影響を殆ど受
けることがなく、従って、不純物導入領域の好ましくな
い拡大を発生させることなく不純物原子の活性化を行う
ことが可能であり、半導体装置の高集積化並びに高速化
に寄与することができる。
In the above manner, only the region into which impurity ions are implanted generates a large amount of heat, and the other regions are hardly affected by the heat. It is possible to activate atoms, and it can contribute to higher integration and higher speed of semiconductor devices.

〔実施例〕〔Example〕

第1図は本発明を実施して得られたキャリヤ濃度分布を
説明する為の線図を表している。
FIG. 1 shows a diagram for explaining the carrier concentration distribution obtained by implementing the present invention.

図では、横軸に半導体ウェハ表面からの深さ、縦軸にキ
ャリヤ濃度をそれぞれ採っである。
In the figure, the horizontal axis represents the depth from the semiconductor wafer surface, and the vertical axis represents the carrier concentration.

図に於いて、■は第2図と同様にイオン注入直後のLS
S理論曲線、■は本発明一実施例に依るキャリヤ分布曲
線をそれぞれ示している。
In the figure, ■ is the LS immediately after ion implantation as in Figure 2.
The S-theoretical curve and ■ indicate the carrier distribution curve according to an embodiment of the present invention, respectively.

このデータを得たイオン注入並びに熱処理の条件は次の
通りである。
The ion implantation and heat treatment conditions under which this data was obtained are as follows.

半導体基板:p型Si 不純物イオン:P ドーズ量: 5 X I Q15(am−”)注入エネ
ルギ:80(KeV) マイクロ波の周波数: 2. 45 (Gllz)マイ
クロ波の電カニ600(W) 図から明らかなように、本発明に依った場合の分布曲線
■は、理論分布曲線のと殆ど一致していると見て良く、
従って、極めて浅い不純物導入領域の形成が可能である
Semiconductor substrate: p-type Si Impurity ion: P Dose amount: 5 X I Q15 (am-”) Implantation energy: 80 (KeV) Microwave frequency: 2.45 (Gllz) Microwave electric crab 600 (W) Figure As is clear from the above, it can be seen that the distribution curve (■) according to the present invention almost coincides with the theoretical distribution curve,
Therefore, it is possible to form an extremely shallow impurity-introduced region.

〔発明の効果〕〔Effect of the invention〕

本発明に依る半導体装置の熱処理力法に依れば、半導体
基板(成いは半導体層)に不純物イオンを注入してから
マ・イクロ波を照射して活性化させるようにしている。
According to the heat treatment method for semiconductor devices according to the present invention, impurity ions are implanted into a semiconductor substrate (or a semiconductor layer) and then activated by irradiation with microwaves.

このようにすると、不純物イオンが注入された領域はマ
イクロ波の吸収率が高い為、そこでの発熱が他の5頁域
に比較して著しく大であり、従って、不純物導入領域の
拡がりを発生することなく不純物原子の・活性化を行っ
て、浅い接合を容易に得ることができるので、半導体装
置の高集積化及び高速化に有効である。
In this way, the area into which impurity ions are implanted has a high absorption rate of microwaves, so the heat generation there is significantly larger than in the other five page areas, and therefore the impurity-introduced area expands. Since it is possible to easily obtain a shallow junction by activating impurity atoms without any interference, it is effective for increasing the integration and speed of semiconductor devices.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明一実施例に依る熱処理を行った場合に於
けるキャリヤ濃度分布を説明する為の線図、第2図は従
来技術に依る熱処理を行った場合に於けるキャリヤ濃度
分布を説明する為の線図をそれぞれ表している。 図に於いて、■はイオン注入直後のr、 s s理論曲
線、■は従来技術に依った場合のキャリヤ分布曲線、■
は本発明一実施例に依った場合のキャリヤ分布曲線をそ
れぞれ示している。
FIG. 1 is a diagram for explaining the carrier concentration distribution when heat treatment is performed according to an embodiment of the present invention, and FIG. 2 is a diagram showing the carrier concentration distribution when heat treatment is performed according to the conventional technique. Each diagram represents a diagram for explanation. In the figure, ■ is the theoretical curve of r,ss immediately after ion implantation, ■ is the carrier distribution curve when using the conventional technology, and ■
1 and 2 respectively show carrier distribution curves according to an embodiment of the present invention.

Claims (1)

【特許請求の範囲】[Claims] 半導体基板(或いは半導体層)に不純物イオンを注入し
てからマイクロ波を照射して活性化させることを特徴と
する半導体装置の熱処理方法。
1. A heat treatment method for a semiconductor device, which comprises implanting impurity ions into a semiconductor substrate (or a semiconductor layer) and irradiating them with microwaves to activate them.
JP22368885A 1985-10-09 1985-10-09 Heat treating method for semiconductor device Pending JPS6285427A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22368885A JPS6285427A (en) 1985-10-09 1985-10-09 Heat treating method for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22368885A JPS6285427A (en) 1985-10-09 1985-10-09 Heat treating method for semiconductor device

Publications (1)

Publication Number Publication Date
JPS6285427A true JPS6285427A (en) 1987-04-18

Family

ID=16802088

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22368885A Pending JPS6285427A (en) 1985-10-09 1985-10-09 Heat treating method for semiconductor device

Country Status (1)

Country Link
JP (1) JPS6285427A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2670950A1 (en) * 1990-12-20 1992-06-26 Motorola Semiconducteurs METHOD AND APPARATUS FOR ANNEALING TREATMENT OF SEMICONDUCTOR DEVICES.

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2670950A1 (en) * 1990-12-20 1992-06-26 Motorola Semiconducteurs METHOD AND APPARATUS FOR ANNEALING TREATMENT OF SEMICONDUCTOR DEVICES.

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