JPS6284215U - - Google Patents
Info
- Publication number
- JPS6284215U JPS6284215U JP17481185U JP17481185U JPS6284215U JP S6284215 U JPS6284215 U JP S6284215U JP 17481185 U JP17481185 U JP 17481185U JP 17481185 U JP17481185 U JP 17481185U JP S6284215 U JPS6284215 U JP S6284215U
- Authority
- JP
- Japan
- Prior art keywords
- signal generator
- frequency
- output
- frequency signal
- generator according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 4
- 230000005284 excitation Effects 0.000 description 1
Landscapes
- Magnetic Resonance Imaging Apparatus (AREA)
- Transmission And Conversion Of Sensor Element Output (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
第１図は、本考案による多周波信号発生器の一
実施例を示すブロツク構成図、第２図は、本考案
による多周波信号の発生原理を説明するための波
形図、第３図は、本考案により得られる多周波信
号の位相連続性を説明するための波形図、第４図
は、従来例により得られる多周波信号の位相不連
続性を説明するための波形図である。
１…クロツク発生回路、２，３…カウンター回
路、４…カウンター出力切換回路、５…コントロ
ール回路、６…波形記憶素子、７…ＤＡ変換器、
８，１１…フイルタ、９…混合回路、１０…第２
信号発生器、１２…増幅器、１３…ＮＭＲ励起コ
イル。
FIG. 1 is a block diagram showing an embodiment of the multi-frequency signal generator according to the present invention, FIG. 2 is a waveform diagram for explaining the principle of generating multi-frequency signals according to the present invention, and FIG. FIG. 4 is a waveform diagram for explaining the phase continuity of a multifrequency signal obtained by the present invention. FIG. 4 is a waveform diagram for explaining the phase discontinuity of a multifrequency signal obtained by the conventional example. DESCRIPTION OF SYMBOLS 1... Clock generation circuit, 2, 3... Counter circuit, 4... Counter output switching circuit, 5... Control circuit, 6... Waveform memory element, 7... DA converter,
8, 11...Filter, 9...Mixing circuit, 10...Second
Signal generator, 12...amplifier, 13...NMR excitation coil.
Claims (1)
続して計数し、複数の異なるデジタル値列を時分
割で発生させる手段と、該手段の出力をアドレス
入力とする波形記憶素子と、該波形記憶素子から
の出力が加えられるＤ―Ａ変換器とを備えた多周
波信号発生器。 (2) 前記手段は、発生する複数の周波数の数だ
けの周波数情報設定用カウンタ回路を備えている
ことを特徴とする実用新案登録請求の範囲第１項
記載の多周波信号発生器。 (3) 前記カウンタ回路の少なくとも１つは、設
定周波数情報を循環的に切換えられることを特徴
とする実用新案登録請求の範囲第２項記載の多周
波信号発生器。 (4) 前記手段は、１つのカウンタ回路と、発生
する複数の周波数の数だけの周波数情報設定用乗
算器を備えていることを特徴とす実用新案登録請
求の範囲第１項記載の多周波信号発生器。 (5) 前記乗算器は、乗率が可変であることを特
徴とする実用新案登録請求の範囲第４項記載の多
周波信号発生器。[Claims for Utility Model Registration] (1) A single signal source, means for continuously counting the output from the signal source and generating a plurality of different digital value sequences in a time-sharing manner, and the output of the means A multi-frequency signal generator comprising: a waveform memory element having an address input; and a DA converter to which an output from the waveform memory element is added. (2) The multi-frequency signal generator according to claim 1, wherein the means includes as many frequency information setting counter circuits as there are a plurality of frequencies to be generated. (3) The multi-frequency signal generator according to claim 2, wherein the set frequency information of at least one of the counter circuits is cyclically switched. (4) The multi-frequency system according to claim 1, wherein the means includes one counter circuit and as many frequency information setting multipliers as the number of generated frequencies. signal generator. (5) The multi-frequency signal generator according to claim 4, wherein the multiplier has a variable multiplication factor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985174811U JPH0336092Y2 (en) | 1985-11-13 | 1985-11-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985174811U JPH0336092Y2 (en) | 1985-11-13 | 1985-11-13 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6284215U true JPS6284215U (en) | 1987-05-29 |
| JPH0336092Y2 JPH0336092Y2 (en) | 1991-07-31 |
Family
ID=31113546
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985174811U Expired JPH0336092Y2 (en) | 1985-11-13 | 1985-11-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0336092Y2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5783906A (en) * | 1980-11-14 | 1982-05-26 | Hitachi Ltd | Generating method for optional-phase multiple signal |
-
1985
- 1985-11-13 JP JP1985174811U patent/JPH0336092Y2/ja not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5783906A (en) * | 1980-11-14 | 1982-05-26 | Hitachi Ltd | Generating method for optional-phase multiple signal |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0336092Y2 (en) | 1991-07-31 |
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