JPS6282749U - - Google Patents
Info
- Publication number
- JPS6282749U JPS6282749U JP17546985U JP17546985U JPS6282749U JP S6282749 U JPS6282749 U JP S6282749U JP 17546985 U JP17546985 U JP 17546985U JP 17546985 U JP17546985 U JP 17546985U JP S6282749 U JPS6282749 U JP S6282749U
- Authority
- JP
- Japan
- Prior art keywords
- logic circuit
- array
- input
- semiconductor integrated
- master slice
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 3
- 239000000758 substrate Substances 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17546985U JPS6282749U (cs) | 1985-11-13 | 1985-11-13 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17546985U JPS6282749U (cs) | 1985-11-13 | 1985-11-13 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6282749U true JPS6282749U (cs) | 1987-05-27 |
Family
ID=31114819
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17546985U Pending JPS6282749U (cs) | 1985-11-13 | 1985-11-13 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6282749U (cs) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5992538A (ja) * | 1982-11-19 | 1984-05-28 | Hitachi Ltd | デイジタル半導体集積回路装置 |
JPS61194864A (ja) * | 1985-02-25 | 1986-08-29 | Toshiba Corp | 半導体装置 |
-
1985
- 1985-11-13 JP JP17546985U patent/JPS6282749U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5992538A (ja) * | 1982-11-19 | 1984-05-28 | Hitachi Ltd | デイジタル半導体集積回路装置 |
JPS61194864A (ja) * | 1985-02-25 | 1986-08-29 | Toshiba Corp | 半導体装置 |
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