JPS628080A - Phase correcting circuit - Google Patents

Phase correcting circuit

Info

Publication number
JPS628080A
JPS628080A JP60148812A JP14881285A JPS628080A JP S628080 A JPS628080 A JP S628080A JP 60148812 A JP60148812 A JP 60148812A JP 14881285 A JP14881285 A JP 14881285A JP S628080 A JPS628080 A JP S628080A
Authority
JP
Japan
Prior art keywords
phase
angle
vector
difference
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60148812A
Other languages
Japanese (ja)
Inventor
Yoshiki Morita
森田 良樹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP60148812A priority Critical patent/JPS628080A/en
Publication of JPS628080A publication Critical patent/JPS628080A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To accurately detect a relative phase difference by phase-shifting the signals of one channel CH by every minute angle when a pilot signal is injected and detecting a phase angle when the difference vector between said one CH and the other CH signals becomes minimum as a phase difference between both the CH's. CONSTITUTION:When an angle generated from an angle generator 6 is increased by DELTAtheta deg., a phase shifter 2 operates as the phase shifter of a phase-shifting quantity DELTAtheta deg. and one CH signal of a latch circuit 1 is phase-shifted by the angle DELTAtheta deg.to be applied to a vector subtracter 9. The difference vector between said one and the other CH signals is calculated and compared with the minimum value stored before in a minimum value detector 10. When the difference vector is smaller than the minimum value, the present value is updatedly stored as another minimum value. In the same way, every time when an angle is generated with the increase of an increment DELTAtheta deg. by the angle generator 6, a phase shift, a vector subtraction and a reduced value decision are conducted, and, by detecting the phase difference between the CH's in the phase shifter 2, a relative phase difference can be accurately detected.

Description

【発明の詳細な説明】 〔倉業上の利用分野〕 この発明は、し、−ダ装置等において位相検波された複
数のチャンネルのビデオ信号のチャンネル間の位相差を
補正する位相補正回路に関するものである。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a phase correction circuit that corrects the phase difference between channels of video signals of a plurality of channels whose phase is detected in a digital camera or the like. It is.

〔従来の技術〕[Conventional technology]

第3図は従来の位相補正回路の系統図であり、図におい
て、111は各チャンネル(CH,A、 CIl、B)
からの入力信号を所定時間ごとにサンプリングする第1
のラッチ回路、(2)はこの第1のラッチ回路(1)の
一方のチャンネルのサンプリング値をチャンネル間の位
相差分だけベクトル的に回転させる移相器、(3a)お
よび(3b)はパイロット信号注入時に第1のラッチ回
路(1)のサンプリング値から各チャンネルの信号の位
相角を検出する位相角検出器、(4)はこの位相角検出
器(3a)および(3b)の位相角の差を計算する減算
器、(5)はこの減算器(4)の減算結果をラッチし上
記移相器(2)の移相量として供給する第2のラッチ回
路である。
Fig. 3 is a system diagram of a conventional phase correction circuit. In the figure, 111 indicates each channel (CH, A, CIl, B).
The first sampler samples the input signal from the
(2) is a phase shifter that vectorially rotates the sampling value of one channel of this first latch circuit (1) by the phase difference between channels, (3a) and (3b) are pilot signals A phase angle detector detects the phase angle of each channel signal from the sampling value of the first latch circuit (1) during injection, and (4) is the difference in phase angle between the phase angle detectors (3a) and (3b). The subtracter (5) that calculates the subtractor (5) is a second latch circuit that latches the subtraction result of the subtracter (4) and supplies it as the phase shift amount to the phase shifter (2).

次に動作について説明する。各チャンネルの信号は、パ
イロット信号注入時に第1のランチ回路+11によって
サンプリングされ、位相角検出器(3a)、(3b)に
て位相角がそれぞれ検出される。位相角検出器(3a)
、(3b)は、直交する成分1.Qで表現される入力信
号からその位相角tan−’ Q / Iを計算するも
のであり、その実施例を第4図に示す。図において、L
OG、アンチLOGおよびjan−’の演算回路は、通
常ROM (Read 0nly Memory)によ
り構成される。各位相角検出器(3a)、(3b)の計
算結果は、減算器(4)にて減算され、その結果が第2
のランチ回路(5)に保持される。パイロット信号の注
入停止後、同一ラインで実信号が第1のラッチ回路(1
)に入力され、第1のラッチ回路+11によりサンプリ
ング後、一方のチャンネルはそのまま、他方のチャンネ
ルは移相器(2)にて第2のランチ回路(5)に保持さ
れているパイロット信号により測定したチャンネル間の
位相差分だけ移相されて出力される。移相器(2)はベ
クトル乗算器であり、その実施例を第5図に示す0図に
おいて、θからcosθおよびsinθの変換は通常R
OMにより行われる。
Next, the operation will be explained. The signal of each channel is sampled by the first launch circuit +11 when the pilot signal is injected, and the phase angle is detected by phase angle detectors (3a) and (3b), respectively. Phase angle detector (3a)
, (3b) are orthogonal components 1. The phase angle tan-'Q/I is calculated from the input signal expressed by Q, and an example thereof is shown in FIG. In the figure, L
The OG, anti-LOG, and jan-' arithmetic circuits are usually configured with a ROM (Read Only Memory). The calculation results of each phase angle detector (3a) and (3b) are subtracted by a subtractor (4), and the result is used as the second
is held in the launch circuit (5). After stopping injection of the pilot signal, the actual signal is transferred to the first latch circuit (1
), and after sampling by the first latch circuit +11, one channel is measured as is, and the other channel is measured by the phase shifter (2) using the pilot signal held in the second launch circuit (5). The phase is shifted by the phase difference between the channels and output. The phase shifter (2) is a vector multiplier, and its embodiment is shown in FIG.
This is done by OM.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の位相補正回路は以上のように構成されているので
、各チャンネルの位相角をそれぞれ検出しなければなら
ず、jan −’ Q / [の計算が必要となり、リ
アルタイムで計算するためにはROMを多数持つことが
必要で回路が大規模になり、また、ROMの容量からの
制約で精度が低下するなどの問題点があった。
Since the conventional phase correction circuit is configured as described above, it is necessary to detect the phase angle of each channel, and calculation of jan −' Q / [ is required. It is necessary to have a large number of circuits, resulting in a large-scale circuit, and there are also problems such as a decrease in accuracy due to constraints from the capacity of the ROM.

この発明は上記のような問題点を解消するためになされ
たもので、個々のチャンネルの位相差をそれぞれ検出す
ることなく両者の相対的な位相差が精度よく検出できる
位相補正回路を得ることを目的とする。
This invention was made in order to solve the above-mentioned problems, and aims to provide a phase correction circuit that can accurately detect the relative phase difference between the two channels without having to detect the phase difference of each individual channel. purpose.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る位相補正回路は、パイロット信号注入時
に一方のチャンネルの信号を一定の微小角度ずつ移相し
、他方のチャンネルの信号との差ベクトルが極小になる
ときの移相角をチャンネル間の位相差として検出するよ
うにしたものである。
The phase correction circuit according to the present invention shifts the phase of the signal of one channel by a certain minute angle when injecting the pilot signal, and calculates the phase shift angle between the channels when the difference vector with the signal of the other channel becomes minimum. This is detected as a phase difference.

この原理を第2図に示す。図において、ベクトルB (
B)を回転させたとき、その差ベクトル(A−B)の大
きさが極小になるのはベクトルAとBが重なったときで
あるのは明らかである。したがって、差ベクトルの大き
さが極小になったときのベクトルBの回転角を検出する
ことによりベクトルAとBの位相差を検出することがで
きる。
This principle is shown in FIG. In the figure, vector B (
It is clear that when vector B) is rotated, the magnitude of the difference vector (A-B) becomes minimum when vectors A and B overlap. Therefore, the phase difference between vectors A and B can be detected by detecting the rotation angle of vector B when the magnitude of the difference vector becomes minimum.

〔作 用〕[For production]

この発明における移相器は、パイロット信号注入時は一
定角度ずつ順に移相量が増加する移相器として動作する
が、360度移相を行ってチャンネル間の位相差が検出
されたのちは実信号に対してチャンネル間の位相差分だ
け移相する移相器として動作する。
The phase shifter in this invention operates as a phase shifter in which the amount of phase shift increases sequentially by a fixed angle when a pilot signal is injected, but after performing a 360 degree phase shift and detecting the phase difference between channels, It operates as a phase shifter that shifts the phase of the signal by the phase difference between channels.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。第1
図において、(1)は各チャンネル(C1,A。
An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, (1) indicates each channel (C1, A.

C1,B)からの入力信号を所定時間ごとにサンプリン
グする第1のランチ回路、(2)はこの第1のラッチ回
路(11の一方のチャンネルのサンプリング値をベクト
ル的に回転させる移相器、(6)はパイロット信号注入
期間中、0度から360度まで一定角度ずつ増加する角
度を発生する角度発生器、(7)はこの角度発生器(6
)の出力を所定時期にラッチする第2のラッチ回路、(
8)はこの第2のラッチ回路(7)あるいは前記角度発
生器(6)の出力のいずれかを切り替えて移相器(2)
へ供給する切替器、(9)は第1のラッチ回路(1)の
他方のチャンネルの信号と移相器(2)の出力信号の差
ベクトルを計算するベクトル減算器、(10)はこのベ
クトル減算器(9)の出力の極小値を検出し第2のラッ
チ回路(7)へランチタイミングを供給する極小値検出
器である。
(2) is a phase shifter that vectorially rotates the sampling value of one channel of this first latch circuit (11); (6) is an angle generator that generates an angle that increases by a constant angle from 0 degrees to 360 degrees during the pilot signal injection period, and (7) is this angle generator (6
a second latch circuit that latches the output of ) at a predetermined time;
8) is a phase shifter (2) by switching either the output of this second latch circuit (7) or the angle generator (6).
(9) is a vector subtractor that calculates the difference vector between the signal of the other channel of the first latch circuit (1) and the output signal of the phase shifter (2), (10) is this vector This is a minimum value detector that detects the minimum value of the output of the subtracter (9) and supplies the launch timing to the second latch circuit (7).

次に動作について説明する。各チャンネルの信号は、パ
イロット信号注入時に第1のラッチ回路(i)によりサ
ンプリングされる。この時点では、角度発生器(6)の
出力は0度であって切替器(8)は角度発生器(6)の
出力を選択しており、この結果、移相器(2)は移相量
が0度の移相器として動作する。すなわち、ベクトル減
算器(9)には、第1のラッチ回路(11によってサン
プリングされた両チャンネルの信号がそのまま印加され
、両者の差ベクトルが計算されて極小値、検出器(10
)へ送られる。極小値検出器(10)では、以前の値が
ないので無条件にこの差ベクトル量を極小値として記憶
するとともに、第2のランチ回路(7)へランチタイミ
ングを供給する。この結果、第2のランチ回路(7)に
は角度発生器(6)の出力値0度が記憶される。
Next, the operation will be explained. The signal of each channel is sampled by the first latch circuit (i) at the time of pilot signal injection. At this point, the output of the angle generator (6) is 0 degrees and the switch (8) has selected the output of the angle generator (6), and as a result, the phase shifter (2) It operates as a phase shifter with an amount of 0 degrees. That is, the signals of both channels sampled by the first latch circuit (11) are directly applied to the vector subtractor (9), and the difference vector between them is calculated and the minimum value is detected by the detector (10).
). Since there is no previous value, the minimum value detector (10) unconditionally stores this difference vector quantity as a minimum value, and supplies the launch timing to the second launch circuit (7). As a result, the output value of 0 degrees from the angle generator (6) is stored in the second launch circuit (7).

次に、角度発生器(6)はΔθだけ増加した角度を発生
する。ここで、Δθは通常360度を2のべき乗で割っ
た値(360/2”)である、この結果、移相器(2)
は移相量Δθ度の移相器として動作し、第1のランチ回
路(1)の一方のチャンネルの信号がΔθ度だけ移相さ
れてベクトル減算器(9)に印加され、他方のチャンネ
ルの信号との差ベクトルが計算されて極小値検出器(1
0)へ送られる。極小値検出器(10)では、以前に記
憶している極小値、この場合には移相量が0度のときの
ものと比較し、もし以前に記憶している極小値よりもさ
らに小さければ今回の値を極小値として更新記憶すると
ともに、第2のラッチ回路(7)に対してランチタイミ
ングを供給する0反対に、以前に記憶している極小値よ
りも大きいか等しい場合には何もしない。
The angle generator (6) then generates an angle increased by Δθ. Here, Δθ is usually a value obtained by dividing 360 degrees by a power of 2 (360/2"). As a result, the phase shifter (2)
operates as a phase shifter with a phase shift amount of Δθ degrees, and the signal of one channel of the first launch circuit (1) is phase-shifted by Δθ degrees and applied to the vector subtractor (9), and the signal of the other channel is shifted by Δθ degrees. The difference vector with the signal is calculated and the minimum value detector (1
0). The minimum value detector (10) compares the previously stored minimum value, in this case with the value when the phase shift amount is 0 degrees, and if it is even smaller than the previously stored minimum value. The current value is updated and stored as the minimum value, and the launch timing is supplied to the second latch circuit (7).On the other hand, if it is greater than or equal to the previously stored minimum value, nothing is done. do not.

以下同様に、角度発生器(6)からは順にΔθ度ずつ増
加した角度が発生され、その都度、移相、ベクトル減算
および極小値判定が行われる。
Similarly, the angle generator (6) sequentially generates angles incremented by Δθ degrees, and phase shift, vector subtraction, and minimum value determination are performed each time.

角度発生器(6)の角度が360度になった時点で上記
シーケンスは終了し、切替器(8)は第2のラッチ回路
(7)の出力を選択して移相器(2)へ供給する。以後
、各チャンネルには実信号が流れ、第1のラッチ回路(
1)で所定時間ごとにサンプリングされて、−一方のチ
ャンネルのサンプリング信号は第2のラッチ回路(7)
に保持している角度だけ移相器(2)で移相されて出力
される。
The above sequence ends when the angle of the angle generator (6) reaches 360 degrees, and the switch (8) selects the output of the second latch circuit (7) and supplies it to the phase shifter (2). do. After that, a real signal flows through each channel, and the first latch circuit (
1), the sampling signal of one channel is sampled at predetermined time intervals, and the sampling signal of one channel is sent to the second latch circuit (7).
The phase is shifted by the phase shifter (2) by the angle held at , and then output.

なお、上記実施例では信号が2チヤンネルの場合につい
て説明したが、3チヤンネル以上の場合でも2チヤンネ
ルずつの対にして上記実施例の回路を複数個設けること
により同様の効果を奏する。
In the above embodiment, the case where the signal has two channels has been described, but even in the case of three or more channels, the same effect can be obtained by providing a plurality of circuits of the above embodiment in pairs of two channels each.

また、上記実施例では、角度発生器(6)は0度から3
60度までの回転角を発生するものとしたが、チャンネ
ル間の位相差の範囲があらかじめ判明している場合には
、その範囲内の角度を発生するようにしてもよい。
Further, in the above embodiment, the angle generator (6) is set from 0 degrees to 3 degrees.
Although it is assumed that a rotation angle of up to 60 degrees is generated, if the range of phase difference between channels is known in advance, an angle within that range may be generated.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば移相器をパイロット信
号を用いたチャンネル間の位相差の検出手段としても使
用してチャンネル間の相対位相差を直接検出するように
構成したので、高精度で安価なものが得られる効果があ
る。
As described above, according to the present invention, the phase shifter is also used as means for detecting the phase difference between channels using pilot signals, and is configured to directly detect the relative phase difference between the channels. This has the effect of making it cheaper.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例による位相補正回路を示す
構成図、第2図はこの発明の原理を示す図、第3図は従
来の位相補正回路を示す構成図、第4図は従来の位相補
正回路の位相角検出器の構成図、第5図はこの発明およ
び従来の位相補正回路に用いられる位相器の構成図であ
る。 (11、(7)はラッチ回路、(2)は移相器、(6)
は角度発生器、(8)は切替器、(9)はベクトル減算
器、(10)は極小値検出器。 なお、図中、同一符号は同一または相当部分を示す。
FIG. 1 is a block diagram showing a phase correction circuit according to an embodiment of the present invention, FIG. 2 is a diagram showing the principle of the invention, FIG. 3 is a block diagram showing a conventional phase correction circuit, and FIG. 4 is a block diagram showing a conventional phase correction circuit. FIG. 5 is a block diagram of a phase shifter used in the present invention and a conventional phase correction circuit. (11, (7) is a latch circuit, (2) is a phase shifter, (6)
is an angle generator, (8) is a switch, (9) is a vector subtractor, and (10) is a minimum value detector. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] ベクトル的に表現される複数の信号を入力し所定時間に
注入されるパイロット信号を用いてチャンネル間の位相
ずれを補正する位相補正回路において、一方のチャンネ
ルにおける前記パイロット信号の検出ベクトルを所定の
単位角度で回転させる手段と、前記回転させたベクトル
信号と他方のチャンネルにおける前記パイロット信号の
検出ベクトルとの差ベクトル量を検出する手段と、前記
差ベクトル量が極小になるときの前記回転させたベクト
ル信号の回転角を検出する手段とを備えたことを特徴と
する位相補正回路。
In a phase correction circuit that inputs a plurality of vector-expressed signals and corrects a phase shift between channels using a pilot signal injected at a predetermined time, the detected vector of the pilot signal in one channel is converted into a predetermined unit. means for rotating the rotated vector signal by an angle, means for detecting a difference vector amount between the rotated vector signal and the detected vector of the pilot signal in the other channel, and the rotated vector when the difference vector amount becomes a minimum. A phase correction circuit comprising means for detecting a rotation angle of a signal.
JP60148812A 1985-07-04 1985-07-04 Phase correcting circuit Pending JPS628080A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60148812A JPS628080A (en) 1985-07-04 1985-07-04 Phase correcting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60148812A JPS628080A (en) 1985-07-04 1985-07-04 Phase correcting circuit

Publications (1)

Publication Number Publication Date
JPS628080A true JPS628080A (en) 1987-01-16

Family

ID=15461260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60148812A Pending JPS628080A (en) 1985-07-04 1985-07-04 Phase correcting circuit

Country Status (1)

Country Link
JP (1) JPS628080A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04265880A (en) * 1990-11-05 1992-09-22 Hughes Aircraft Co Angle-measurement compensating technology for amplitude-comparing monopulse receiver
JP2010197091A (en) * 2009-02-23 2010-09-09 Mitsubishi Electric Corp Digital rf memory device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5093394A (en) * 1973-12-17 1975-07-25

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5093394A (en) * 1973-12-17 1975-07-25

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04265880A (en) * 1990-11-05 1992-09-22 Hughes Aircraft Co Angle-measurement compensating technology for amplitude-comparing monopulse receiver
JP2010197091A (en) * 2009-02-23 2010-09-09 Mitsubishi Electric Corp Digital rf memory device

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