JPS6277633A - Printer controller - Google Patents

Abstract

PURPOSE:To decrease the capacity of a line buffer by writing character patterns in a paper image memory at a line after line division processing when character patterns are written in the paper image memory. CONSTITUTION:A line of size larger than prescribed size stored in a page buffer 2 is divided by an editing control circuit 3 into plural lines of size smaller than the prescribed size by using a forms control buffer 1 stored with line size data on all lines, and the divided lines are stored in a working buffer 4. An expansion control circuit 6 carries out line-by-line expansion processing by the working buffer 4 and a character pattern memory 5. In this case, the line buffer memory used as temporary storage may have only the prescribed size smaller than maximum line size, so the capacity of the line buffer memory is decreased.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a printer control device that controls an English or Kanji printer based on instructions from a host.

[Background of the invention]

In a conventional printer control device, a character pattern is generated based on character codes stored line by line in a page buffer, and the character pattern is written line by line to a paper image memory and output to a printer. In this case, for various reasons, the character pattern is written once to the line buffer memory, and after the writing is completed, the contents of the line buffer memory are written to the paper image memory. Therefore, the depth of the line buffer memory needs to be as large as the maximum line size, and as a result, there is a problem in that the capacity of the line buffer memory increases as the line size of the print line increases. Incidentally, as a known technique of this type of printer control device, for example, Japanese Patent Application No. 107132/1984 can be cited.

[Purpose of the invention]

An object of the present invention is to eliminate the need for a line buffer memory to have the same depth as the maximum line size that can be printed, and to make it possible to print lines with a larger line size by using a line buffer memory that has a depth smaller than the maximum line size. An object of the present invention is to provide a printer control device for controlling a printer.

[Summary of the Invention] The present invention divides a line with a line size larger than a specified size into a plurality of lines with a line size smaller than the specified size within a printer control device, and creates a character pattern in each line after the division. By writing this into the paper image memory via the line buffer memory, the depth of the line buffer memory can be reduced to a prescribed size smaller than the maximum line size, thereby reducing the capacity of the line buffer memory.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of a printer control device of the present invention. Forms control buffer 1 stores the line sizes of all the lines that make up the page,
The page buffer 2 stores character codes of characters to be printed line by line. The editing control circuit 3 performs line division processing using the forms control buffer 1 and page buffer 2.

The work buffer 4 stores the results of the line division process performed by the editing control circuit 3, and the character pattern memory 5 stores dot patterns corresponding to character codes. The development control circuit 6 has a working buffer 4 and a character pattern memory 5.
Character expansion processing is performed line by line. Row buffer memory 7
is used as temporary storage when the expansion control circuit 6 performs character expansion processing. In the paper image memory 8, 1 bit corresponds to 1 dot on the printing paper.
When the character expansion process of the expansion control circuit 6 for the line buffer memory 7 is completed, the contents of the line buffer memory 7 are transferred to the paper image memory 8.

FIG. 2 is an explanatory diagram of the forms control buffer 1 in FIG. 1. Forms control buffer 1 stores the line sizes of all lines making up a page. In FIG. 2, P is the line size of the Mth line of the page, Q is the line size of the ('M +1)th line, and R is the line size of the (M+2)th line.

FIG. 3 is an explanatory diagram of the page buffer 2 in FIG. 1. The page buffer 2 stores character codes of characters to be printed line by line. In Figure 3, XA is rAJ
This is the character code of Similarly, XB, XC, XD, XE,
XF are rBJ, rcJ, rDJ, rE, respectively
J, rFJ character code. In the example shown in FIG. 3, the page buffer 2 stores character codes rAJ and rBJ as the Mth line. Similarly, as the (M+1)th row, r
Set the character code of CJ to the (M+2)th line as rDJ,
It stores the character codes rEJ and rFJ, respectively.

FIG. 4 explains how the development control circuit 6 in FIG. 1 reads a character pattern from the character pattern memory 5 based on the contents of the page buffer 2 and writes it into the line buffer memory 7. At this time, based on the contents of the forms control buffer 1, character alignment within the line is also performed at the same time, so the depth of the line buffer memory 7 needs to be equal to the maximum line size. Row buffer memory 7
The width may be a size that is easy to process. FIG. 4(a) shows that the expansion control circuit 6 writes the character pattern rAJ to the line buffer memory 7 based on the contents of the M-th line of the forms control buffer 1 of FIG. 2 and the page buffer 2 of FIG. This is the contents of the row buffer memory 7 after the loading process or the completion of the loading process. FIG. 4(b) shows the contents of the line buffer memory 7 after the expansion control circuit 6 has finished the process of reading the contents of the line buffer memory 7, composing it with the rBJ character pattern, and writing it back to the line buffer memory 7. It is. When all write processing by the expansion control circuit 6 to the line buffer memory 7 for the relevant line is completed, the contents of the line buffer memory 7 are transferred to the paper image memory 8.

Figure 5 shows the forms control buffer 1 in Figure 2.
This shows the result of writing a character pattern to the paper image memory 8 based on the contents of the page buffer 2 shown in FIG.
rCJ on the row, rD", rE", rF on the (M+2) row
” character pattern is written.

The contents of the line buffer memory 7 are directly transferred to the paper image memory 8. Further, one bit in the paper image memory 8 corresponds to one dot on the paper. For this reason, the depth of the line buffer memory 7 is required to be equal to the maximum line size that can be printed, resulting in a problem that the capacity of the line buffer memory 7 becomes large. In order to reduce the capacity of the row buffer memory 7, the maximum row size of the rows that the expansion control circuit 6 must handle may be reduced.

The editing control circuit 3 in FIG. 1 inspects the line sizes of all the lines handled by the expansion control circuit 6, and performs line division processing to divide lines with line sizes larger than the specified size into multiple lines with line sizes smaller than the specified size. In other words, the 1 editing control circuit 3
Forms control buffer l and page buffer 2
Line division processing is performed based on the contents of , and the results are written to the work buffer 4.

FIG. 9(a) is a block diagram showing details of the editing control circuit 3, and FIG. 9(b) is a flowchart for explaining its operation.

In FIG. 9(a), 3] is a general-purpose register that holds various data. 32 is an instruction execution control unit that interprets the program executed on the expansion control circuit 3;
An execution instruction is issued to each piece of hardware in the expansion control circuit 3. 3
3 is an arithmetic unit data bus, through which data transferred to each hardware of the expansion control circuit 3 passes. 35 is an arithmetic unit which performs arithmetic operations using the contents of the general-purpose register 31 as input.

36 is an address register, and 37 is a data register, which are used when performing memory access.

A memory access control unit 38 controls the interface between the expansion control circuit 3 and the memories 1, 2, and 4.

39 is an external bus, which is used for data transfer with memory 1.2.4.

The edit control circuit 3 reads the line size stored in the forms control buffer 1 into the data register 37 via the external bus 39 (step 90), and compares the read line size with the specified size in the arithmetic unit 35. (Step 91). If the row size is smaller than or equal to the specified size, leave the row size unchanged\data register 3.
7 and writes it to the work buffer 4 via the external buses 1 and 39 (step 92). Next page buffer 2
The character code of the corresponding line stored in the page buffer 2 is transferred to the work buffer 4 (step 93
). When the line size is larger than the specified size, the line is divided into multiple lines smaller than the specified size. First, write the line size of the first line after division to the work buffer 4 (
Step 94). Next, the character code of the corresponding line stored in the page buffer 2 is read from the page buffer 2 to the data register 37 via the external bus 39 (step 95), and the character code is read into the data register 37 by the arithmetic unit 35 after dividing the line. Convert to character code (step 96), set this converted character code to data register 3, and transfer to external bus 3.
9 to the working buffer 4 (step 97)
. This process is repeated for all lines after division (step 98).

FIG. 6 is an explanatory diagram of the business buffer 4. The work buffer 4 stores the results of line division processing performed by the editing control circuit 3 based on the forms control buffer 1 in FIG. 2 and the page buffer 2 in FIG. 3. In FIG. 6, S is the row size of the Nth row, and similarly, T, U, and V are the (N+1)th and (N+2)th rows, respectively.
Row number.

This is the line size of the (N+3)th line. XA is the character code of rAJ, and similarly XB, XD, and XE.

X, F are rBJ, rDJ, rEJ, r, respectively
This is the character code of FJ. XC-1/2 is the character code for the dot pattern in the upper half when rCJ is divided into upper and lower halves, and XC-2/2 is the character code for the dot pattern in the lower half of "C". be. The (N+1)th line defined in the forms control buffer 1 in Figure 2 and the page buffer 2 in Figure 3 is divided into two lines, the (N+1)th line and the (N+2)th line, in the work buffer 4. ing. The Mth line and the (N+2)th line are the Nth line and (N+3)th line of the winding work buffer. In other words, the row size relationship is S=P, T=U
=Q/2. V=R. Also, the character code of rCJ is from XC to XC-1
There are two: /2 and XC-2/2.

The expansion control circuit 6 performs character expansion processing according to the contents of the work buffer 4. That is, the development control circuit 6 reads a character pattern from the character pattern memory 5 and writes it to the single-line buffer memory 7 based on the line size after line division and the character coat to be printed, which are stored line by line in the working buffer 4. It's crowded.

Since the row sizes of the lines handled by the expansion control circuit 6 are all below the specified size, the depth of the row buffer memory 7 only needs to be the specified size.

FIG. 10(a) is a block diagram showing details of the expansion control circuit 6, and FIG. 10(b) is a flowchart for explaining its operation.

In FIG. 10(a), 61 is a first address register and a data register, and 662, which is used when the expansion control circuit 6 reads the work buffer 4 via the external bus 39, is a second address register and a data register. 663, which is a data register and is used when the expansion control circuit 6 reads a character pattern from the character pattern memory via the external bus 80, is the third address register 3 and data register 3; It is used when writing a character pattern to the character pattern memory 8 via 81. A row buffer address register 64 indicates an address when reading or writing to the row buffer memory 7. 65 is a general-purpose register, 67 is an arithmetic unit, 6
8 is an instruction execution control section. 80.81 is an external bus, which is used for data transfer between the expansion control circuit 6 and the memories 5 and 8. Reference numeral 82 denotes an enlargement/reduction circuit, which enlarges/reduces the character pattern read from the character pattern memory 5 by the expansion control circuit 6. A shift/merge circuit 83 shifts the character pattern enlarged/reduced by the enlargement/reduction circuit 82 and merges the character pattern stored in the line buffer memory 7 with the enlarged/reduced character pattern.

The expansion control circuit 6 reads the line size from the work buffer 4 into the data register 61 via the external bus 39 and saves it into the general-purpose register 65.

Thereafter, the expansion control circuit 6 reads the character code from the work buffer 4 into the data register 61 via the external bus 39 (step 101). and.

The character size is calculated from the character code, and the position in the line is calculated from the line size and the character code, respectively, by the calculator 67 (step 102). Next, the enlarging/reducing circuit 82 is initialized according to the character size to prepare for enlarging/reducing one character pattern (step 103). Also, the shift/merge circuit 83 and the row buffer address register 64 are initialized according to the position of the character pattern in the row, and preparations are made to write the character pattern into the row buffer memory 7 (step 104).
. Next, the character pattern is read from the character pattern memory 5 into the data register 62 via the external bus 80, and enlarged/
The reduction circuit 82 enlarges or reduces the image (step 105).
, shifted by the shift/merge circuit 83, and then merged with the contents of the row buffer memory 7 (step 106), and writing the character pattern to the row buffer memory 7 (step 107).
).

Next, it is determined whether the line buffer memory 7 is full of character patterns (step 108), and if it is full, the contents of the line buffer memory 7 are transferred to the paper image memory 8 (step 110). This is repeated until one line of character pattern is written to the paper image memory 8 (step 111).
). If the line buffer memory 7 is not full of character patterns, character patterns are repeatedly written into the line buffer memory 7 until it is full (step 109).

Note that the line buffer memory 7 is full of character patterns.

At the end of one line even when the character pattern memory 7 is not set, the contents of the line buffer memory 7 are transferred to the character pattern memory 8 (step 112).

FIG. 7(a) shows a process in which the expansion control circuit 6 reads a character pattern from the character pattern memory 5 and writes it to the line buffer memory 7 according to the contents of the (N+1)th line of the working buffer 4 in FIG. This is the contents of the row buffer memory 7 after the completion.

Similarly, FIG. 7(b) shows the result of writing a character pattern into the line buffer memory 7 in accordance with the contents of the (N+2)th line of the working buffer 4 in FIG. When all writing to the line buffer memory 7 by the expansion control circuit 6 is completed, the contents of the line buffer memory 7 are transferred to the paper image memory 8.

FIG. 8 shows the result of writing a character pattern into the paper image memory according to the contents of the working buffer 4 in FIG. In Figure 8, “A” is shown in the Nth line.
” and “B” character patterns are written. Similarly (
In the N+1)th line, the upper half character pattern of [Cj is (
On the N+2)th line, the lower half of the character pattern of “C” is (
On the N+3)th line, character patterns of "DJ", "E", and "F" are written, respectively. That is, the contents of the paper image memory 8 in FIG. 5 in which character patterns are written based on the forms control buffer 1 in FIG. 2 before the line division process and the page buffer 2' in FIG. 3, and the contents of the paper image memory 8 in FIG. The contents of the paper image memory 8 in FIG. 8, in which the character pattern is written based on the later working buffer 4, are the same.

〔Effect of the invention〕

As explained above, according to the present invention, when writing a character pattern to a paper image memory, the character pattern is written to the paper image memory in the line after one-line division processing, so that it is used as a temporary memory at this time. The depth of the row buffer memory for processing can be reduced, and the capacity of the row buffer memory can be reduced.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is an explanatory diagram of the contents of the forms control buffer, and Fig. 3 is a block diagram showing an embodiment of the present invention.
Figure 4 is an explanatory diagram of the contents of the page buffer, Figure 4 is an explanatory diagram of the character expansion process for the line buffer memory, Figure 5 is an explanatory diagram of the character expansion process for the paper image memory, and Figure 6 is an illustration of the contents of the work buffer. 7 is an explanatory diagram of the character expansion process for the line buffer memory according to the present invention, FIG. 8 is an explanatory diagram of the character expansion process for the paper image memory according to the present invention, and FIG. 9(a) is an illustration of the editing control circuit. 9(b) is a flowchart showing the operation procedure of the editing control circuit, FIG. 10(a) is a block diagram showing details of the expansion control circuit, and FIG. 10(b) is a flowchart showing the operation procedure of the editing control circuit. 3 is a flowchart showing the operating procedure of the circuit. 1... Forms control, 2... Page buffer, 3... Edit control circuit, 4... Work buffer, 5... Character pattern memory, 6...
Expansion control circuit, 7... row buffer memory. 8...Paper image memory. Figure 4 rα) (b) District 5 Figure 6 Figure 7 Figure 1 () j Figure 8 Figure 10 (a-> 3

Claims (1)

[Claims] (1) In a printer control device that generates and prints out character patterns based on character codes, a forms control buffer stores the line size of the lines that make up a page, a page buffer stores character codes,
A character pattern memory that stores a character pattern corresponding to the character code, a paper image memory that stores a group of character patterns of characters to be printed out, a line buffer memory and a work buffer that are used as temporary storage for the paper image memory. and compares the line size stored in the forms control buffer with a specified size, and for lines whose line size is smaller than the specified size, compares the line size with the corresponding line stored in the page buffer. A group of character codes are written as one set to the work buffer line by line, and lines with a line size larger than the specified size are divided into multiple lines with line sizes smaller than the specified size, and for each division, the line after the division is written. editing control means for writing a set of size and character code into the work buffer line by line; and the character pattern memory writes a character pattern corresponding to the character code in the work buffer memory in line units after the division. 2. A printer control device, further comprising: a rasterization control means for rasterizing the data into the line buffer memory according to the line size of the working buffer memory and then writing it into the paper image memory.