JPS627749B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a facsimile apparatus equipped with a line memory and an intermittent paper feeding mechanism.

In recent years, heat-sensitive facsimile machines have developed, making it possible to obtain high-quality records. Most thermal facsimile devices store one line's worth of recording signals in a line memory, then thermally record one line of information on recording paper through the heat generated by a heating resistor in the recording head. The paper feed mechanism feeds the recording paper by one line, and the next line is sequentially recorded to reproduce the transmitted image on the recording paper. In such conventional facsimile devices, once the recording head is energized, it takes a certain amount of time to cool it down, so it is difficult to increase the recording speed compared to other electrostatic recording methods. For this reason, the transmission speed is limited by the recording speed, and band compression technology cannot be fully utilized. Furthermore, if the image signal is transmitted at a speed higher than the recording speed, a huge amount of line memory or the like is required to store the received image signal until it is recorded. For this reason, conventional facsimile devices transmit by keeping the transmission speed below the recording speed of one scanning line, or when the image signals for one line are all white signals, a white line indicating that one line is all white signals is sent. A false signal with a period corresponding to the minimum time required for the operation of the receiving device is added to the signal and transmitted, and on the receiving side, the line is scanned by the recording circuit via the line memory and recording head, and each line is scanned. A feed signal is generated to operate the paper feeding mechanism. Of course, in the former case, the transmission speed does not increase, but in the latter case, the transmission speed is also sacrificed by the amount of false signal transmission. Also,
Since lines are scanned unnecessarily on the receiving side, it takes a long time and requires a large amount of line memory. There is also a known device that detects a white line signal on the receiving side without transmitting the false signal and generates a feed signal to operate the paper feeding mechanism without causing the recording circuit to scan the line, but the device is complicated. This requires a large number of memory circuits, etc.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned conventional drawbacks and to provide a facsimile device with a simple configuration that can improve transmission speed by shortening the time required for recording processing in a receiving device.

In order to achieve the above object, the facsimile apparatus of the present invention includes a plurality of line memories for storing image signals line by line, an intermittent paper feeding mechanism, and a recording circuit for driving a thermal recording head. means for detecting whether or not a black signal is included in the image signal stored in each line memory; and means for detecting whether or not the image signal stored in each line memory includes a black signal; a first delay means for generating an output signal after a certain period of time sufficient for cooling; and a delay time shorter than the first delay means when the image signal stored in the memory does not include a black signal in a line; It includes a second delay means for generating an output signal, and a means for selectively switching each of the line memories to the recording circuit, and the switching of the switching means is performed by the output signals of the first and second delay means. The paper feeding mechanism is controlled by the output signal.

Next, one embodiment of the present invention will be described in detail with reference to the drawings. A synchronous clock corresponding to one pixel of the recording signal is inputted from the synchronous clock terminal 1, and a horizontal tag signal indicating a valid recording signal section in one scanning line is inputted from the horizontal tag signal terminal 2.
A recording signal for each pixel is sequentially input from a recording signal terminal 3, and a feed signal for operating a paper feeding mechanism (not shown) is sent from a feed signal terminal 4. The horizontal dot signal and the recording signal are input to an AND circuit 5, and the AND circuit 5 sequentially sends out recording signals valid for the period indicated by the horizontal dot signal. The effective recording signal for the first line is sent to the line memory 7 via the switching circuit 6, and the effective recording signal for the next line is switched by the switching circuit 6 and sent to the next line memory 7'. Sent. The same goes for the next line. The switching circuit 6 is configured to sequentially and cyclically switch the output terminals according to the rising edge of the horizontal duck signal. And each line memory 7, 7'
Each of the effective recording signals for one line is stored. On the other hand, the input terminals of each line memory 7, 7' are provided with flip-flop circuits 8, 8', respectively.
are connected in parallel. Therefore, the recording signal input to the line memory 7 is input in parallel to the flip-flop circuit 8, and sampled by the synchronization clock.If there is a black signal in the recording signal for one line, the flip-flop circuit 8 is configured to be set. The same applies to the flip-flop circuit 8'. The output terminal of each flip-flop circuit 8, 8' is connected to a switching circuit 9.
are sequentially switched and connected in parallel to the first delay means 10 and the second delay means 11. The switching circuit 9 sequentially and cyclically switches the output terminals of the flip-flop circuits 8, 8' for each output of a feed signal to be described later, and connects them to the first and second delay means 10, 11. When the flip-flop circuit 8 is in the set state, the first delay means 10 generates a feed signal after a certain period of time sufficient to cool down the recording head, and sends it to the feed signal terminal 4 via the OR circuit 12. When the flip-flop 8 is in the reset state, the second delay means 11 generates a feed signal after a mechanically limited minimum time and outputs the feed signal to the OR circuit 12.
The signal is sent to the feed signal terminal 4 via. The same applies to the flip-flop circuit 8'. The feed signal controls a paper feeding mechanism (not shown) to feed the recording paper, and also controls the switching circuit 13 and the switching circuit 9 to feed the line memory 7,
7' and flip-flop circuits 8, 8' are switched. That is, each line memory 7, 7'
The output terminals of are sequentially connected to the recording circuit 14 by being switched by the switching circuit 13. When the recording circuit 14 is connected to the line memory 7 or 7', it takes in the recording signal for one line stored in the line memory 7 or 7', energizes the relevant elements of the recording head to generate heat, and writes the signal onto the recording paper. It is configured to cause necessary recording.

Next, the operation of this embodiment will be explained. A recording signal is continuously input from the recording signal terminal 3, and a column of valid recording signals corresponding to the valid period indicated by the horizontal duplex signal is sent to the switching circuit 6 via the AND circuit 5. The recording signal is stored in the first line memory 7. The recording signal is also sent to the first flip-flop circuit 8 at the same time, and when there is a black signal in the recording signal for one line, the flip-flop circuit is set. When all the recording signals for one line are white signals, the flip-flop circuit is set. When all the recording signals for one line are white signals, the flip-flop circuit is not set (remains reset). When the input for one line is completed, the switching circuit 6 is activated by the rising edge of the next horizontal duplex signal, and the recording signal for the next line is transferred to the next line memory 7'.
At the same time, the presence or absence of a black signal is detected by the next flip-flop circuit 8', and as a result, the flip-flop circuit 8' is set.
Or it will remain reset. The same goes for the next line. On the other hand, the switching circuits 9 and 13 connect the first flip-flop circuit 8 to the delay means 10 and 11, and the first line memory 7 to the recording circuit 14, respectively. If there is a black signal in the first line memory 7, each recording signal stored in the line memory 7 is taken into the recording circuit 14, and one line is recorded on the recording paper. In parallel, the set state of the flip-flop 8 (set because there is a black signal) is sent to the delay means 10, 11, and the delay means 10 waits until the recording head of the recording circuit is cooled down. After a sufficient certain period of time, a feed signal is generated and sent to a paper feed mechanism (not shown) via the OR circuit 12 and the feed signal terminal 4 to feed the recording paper by one line (in this case, the delay means 11 does not operate). . This feed signal is simultaneously sent to the switching circuits 9 and 13 to operate the switching circuits 9 and 13. At this time, the flip-flop circuit 8 is reset. Then, the same operation as described above is performed for the next line memory 7' and flip-flop circuit 8', and the same operation is repeated for the next line memory 7' and flip-flop circuit 8'. If all the signals in the line memory 7 are white signals, the corresponding flip-flop 8 is not set.
The switching circuit 9 is activated by the feed signal of the previous stage.
is the output terminal of the flip-flop 8 by the delay means 1
0 and 11, in this case (the first delay means is not activated) the second delay means 11 generates a feed signal after a mechanically limited minimum time; A paper feed mechanism (not shown) is operated to feed the recording paper by one line. At the same time, the switching circuits 9 and 13 are
operates, and the next stage flip-flop circuit 8'
are connected to the delay means 10 and 11, and the recording circuit 1
4 is connected to the next line memory 7' without line scanning. If this line memory 7' also has all white signals, it will be switched to the next stage again after the above-mentioned minimum time by the same operation as described above.
In this way, the all-white signal line memory is switched from one to the next at minimum time intervals. When a line memory containing a black signal is connected, and as before, since the corresponding flip-flop has been set, said first delay means 10 outputs the feed signal after a certain period of time sufficient for the recording head to cool down. Generate it and proceed to the next step. Due to the above operations,
Each line memory is transferred to the next stage in the minimum amount of time required for cooling the recording head or mechanically, so that the entire process can be completed quickly. That is, the time required for recording can be shortened to the necessary minimum. This makes it possible to increase the transmission speed, which was limited by the recording time, and to improve the information transmission speed. Furthermore, as described above, since the time occupied by each line memory is shortened to the necessary minimum, there is an effect that the number of line memories required to store recording signals can be reduced.

In this embodiment, the feed signal is sent to the paper feeding mechanism and the switching circuit at the same time and are operated at the same time, but by changing the output waveform of the feed signal, etc.
Various modifications are possible, such as allowing the paper feed mechanism to operate early to prepare for the next preparation, and the switching circuit to switch after the required time. Also the first
The delay means and the second delay means are not provided separately, but are configured so that, for example, the flip-flop circuit outputs a positive signal when it is in the set state and a negative signal when it is in the reset state, and a diode is also used as the delay means. By using such an integrating circuit, two types of delay times can be obtained with an integrated delay means. Also,
The switching circuits 9 and 13 may be integrated instead of being provided separately.

According to the above explanation, the facsimile device of the present invention responds to the presence or absence of a black signal on each line memory by
Since the configuration is such that the process moves to the next step after each minimum necessary delay time, the time required for recording processing of each line can be shortened to the necessary minimum, and the transmission speed can be improved. Furthermore, it is possible to shorten the line memory occupation time and reduce the number of line memories.

[Brief explanation of the drawing]

The figure is a block diagram showing one embodiment of the present invention. In the figure, 1... synchronous clock terminal, 2...
Horizontal duplex signal terminal, 3... Recording signal terminal, 4...
Feed signal terminal, 5...AND circuit, 6...Switching circuit, 7, 7'...Line memory, 8, 8'...
Flip-flop circuit, 9...Switching circuit, 10...
...First delay circuit, 11...Second delay circuit, 1
2...OR circuit, 13...switching circuit, 14...disconnection circuit.

Claims (1)

[Claims] 1. In a facsimile receiving device that includes a plurality of line memories that store image signals line by line, an intermittent paper feed mechanism, and a recording circuit that drives a thermal recording head, a black signal is included in the image signals stored in each line memory. a means for detecting whether or not it is contained;
a first delay means for generating an output signal after a predetermined time sufficient to cool down the thermal recording head when the image signal stored in the line memory includes a black signal; a second delay means for generating an output signal with a shorter delay time than the first delay means when the signal does not include a black signal in a line; and a switching means for selectively switching each of the line memories to the recording circuit. A facsimile apparatus, characterized in that switching of the switching means is performed by output signals of the first and second delay means, and the paper feeding mechanism is controlled by the output signals.