JPS6273632A - Plasma processing equipment - Google Patents

Plasma processing equipment

Info

Publication number
JPS6273632A
JPS6273632A JP21227285A JP21227285A JPS6273632A JP S6273632 A JPS6273632 A JP S6273632A JP 21227285 A JP21227285 A JP 21227285A JP 21227285 A JP21227285 A JP 21227285A JP S6273632 A JPS6273632 A JP S6273632A
Authority
JP
Japan
Prior art keywords
substrate
electrode
processed
insulating film
treated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21227285A
Other languages
Japanese (ja)
Inventor
Tsutomu Tsukada
勉 塚田
Masahata Shibagaki
真果 柴垣
Isao Asaishi
浅石 勲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Anelva Corp
Original Assignee
Anelva Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Anelva Corp filed Critical Anelva Corp
Priority to JP21227285A priority Critical patent/JPS6273632A/en
Publication of JPS6273632A publication Critical patent/JPS6273632A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To contrive the utmost reduction of heat generation by improving heat conduction between a substrate to be treated and an electrode by attracting the substrate to be treated by the electrode by utilizing an electrostatic force due to a self-bias voltage generated in the substrate to be treated and covering the uncovered electrode part with an insulator. CONSTITUTION:A thin insulating film layer 12 is arranged in the opposite position to a substrate 8 to be treated present on a plane electrode 2, a surface of the plane electrode 2 of the part which is not covered with said insulating film layer 12 is covered with a cover plate 9 and an insulating supporting member 10. When a high-frequency electric power is supplied to the plane electrode 2 from a high-frequency power source 4, discharge is generated through a path along the plane electrode 2, insulating film layer 12, substrate to be treated 8, and a plane electrode 3 and a gas introduced between the electrodes is made plasma. At that time, a self-bias voltage is generated between the plane electrode 2 and the substrate to be treated 8 and this voltage causes the plane electrode 2 to attract the substrate 8. Consequently, the heat conduction between the substrate 8 and the plane electrode 2 becomes good and the increase in temperature of the substrate 8 can be restrained, for instance by water-cooling the plane electrode 2.

Description

【発明の詳細な説明】 〔概要〕 被処理基板をプラズマ処理するプラズマ処理装置におい
て、電極の直流電位を接地電位に保持する接地電位保持
手段と、電極と被処理基板との間に設けた絶縁膜層と、
この絶縁膜層によって覆われていない電極部分を覆う絶
縁体とを備え、高周被電力を電極間に供給することによ
り、被処理基板と電極との間に自己バイアス電圧を発生
させ、この発生させた自己バイアス電圧によって生じる
静電力を利用して被処理基板を電極に吸着させて熱伝導
を良好にすると共に熱の発生を可及的に少なくするよう
にしている。
[Detailed Description of the Invention] [Summary] A plasma processing apparatus that plasma-processes a substrate to be processed includes a grounding potential holding means for holding a DC potential of an electrode at a ground potential, and an insulator provided between the electrode and the substrate to be processed. a membrane layer;
By supplying high-frequency power between the electrodes, a self-bias voltage is generated between the substrate to be processed and the electrode, and this generation The electrostatic force generated by the applied self-bias voltage is used to attract the substrate to be processed to the electrode, thereby improving heat conduction and minimizing heat generation.

〔産業上の利用分野〕[Industrial application field]

本発明は、被処理基板と電極との間に生じた自己バイア
ス電圧による静電力を用いて当該被処理基板を電極に吸
着させて熱伝導を良好にすると共に、絶縁体を用いて電
極を覆い、熱の発生を可及的に少なくするよう構成した
プラズマ処理装置に関するものである。
The present invention uses electrostatic force due to a self-bias voltage generated between the substrate to be processed and the electrode to adsorb the substrate to the electrode to improve heat conduction, and also covers the electrode using an insulator. The present invention relates to a plasma processing apparatus configured to reduce heat generation as much as possible.

〔従来の技術〕[Conventional technology]

従来、ハロゲン化炭化水素などの反応性ガスを真空容器
中の電極間に導入し、高周波放電によってプラズマを発
生させ、この電極上に配置した被処理基板をエツチング
などするドライエツチング装置は、半導体製造工程の前
処理装置として数多く用いられている。これらのプラズ
マ処理装置を用いて、電極上に配置した被処理基板を例
えばエツチングする場合、被処理基板がイオンや電子か
らなる荷電粒子の衝撃、プラズマからの熱輻射、および
エツチング反応によって発生する熱などにより加熱され
る。極端な場合には、被処理基板上のフォトレジストが
熱損傷を受けることがある。
Conventionally, dry etching equipment, which introduces a reactive gas such as halogenated hydrocarbon between electrodes in a vacuum container and generates plasma by high-frequency discharge, etches a substrate placed on the electrodes, has been used in semiconductor manufacturing. It is widely used as a pre-processing device. When using these plasma processing devices to etch a substrate placed on an electrode, the substrate is exposed to the impact of charged particles consisting of ions and electrons, heat radiation from the plasma, and heat generated by etching reactions. It is heated by etc. In extreme cases, the photoresist on the substrate being processed may suffer thermal damage.

このため、電極を水などの冷媒を用いて冷却し、可及的
に被処理基板の温度の上昇を押さえる試みがなされてい
る。しかし、被処理基板が一般にSiウェハなどのよう
に重量が軽いものが多いため、真空中では被処理基板と
電極との間の熱伝達が主に放射熱伝達によって行われ、
被処理基板への入射熱量が多くなると、電極をどんなに
冷却しても被処理基板の温度上昇が大きくなる。このた
め、電極間に印加する高周波電力を増大させて、エツチ
ング速度の上昇を計ろうとすると、被処理基板の熱的ダ
メージが大きくなってしまう。この問題を解決する方策
として、被処理基板を何等かの方法を用いて電極に吸着
(密着)させ、被処理基板と電極との間の熱伝導を良好
にすることが考えられる。真空中で用いることができる
吸着方法として、被処理基板を機械的に電極に押しつけ
る方法、ガスを用いて被処理基板を冷却する方法、およ
び直流電圧を被処理基板に印加して静電力を用いて電極
に吸着させる方法などが考案されている。
For this reason, attempts have been made to cool the electrodes using a coolant such as water to suppress the rise in temperature of the substrate to be processed as much as possible. However, since the substrate to be processed is generally light in weight, such as a Si wafer, heat transfer between the substrate to be processed and the electrode is performed mainly by radiation heat transfer in a vacuum.
If the amount of heat incident on the substrate to be processed increases, the temperature of the substrate to be processed will rise significantly no matter how much the electrode is cooled. Therefore, if an attempt is made to increase the etching rate by increasing the high frequency power applied between the electrodes, thermal damage to the substrate to be processed will increase. One possible solution to this problem is to adsorb (adhere to) the substrate to be processed on the electrode using some method to improve heat conduction between the substrate to be processed and the electrode. Adsorption methods that can be used in a vacuum include mechanically pressing the substrate to be processed against an electrode, cooling the substrate using gas, and using electrostatic force by applying a DC voltage to the substrate. A method has been devised in which the particles are adsorbed onto the electrode.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかし、従来の被処理基板を電極に機械的に押しつける
方法は、クランプなどを用いて被処理基板を電極に押し
込まなければならず、クランプと被処理基板との接触部
から多量のゴミが発生するという問題点があった。また
、ガスを用いて被処理基板を冷却する方法は、被処理基
板と電極との間のシールを完全に行わないと、冷却ガス
がプロセスガスに混入し、エツチング特性に悪影響を与
えてしまうという問題点があった。更に、直流電圧を被
処理基板に印加して静電力を用いる方法は、高周波電力
を印加する電極の内部に、静電吸着用の静電電極を設け
ると共に、この静電電極に直流の高電圧を印加するため
の直流高電圧電源が必要になるなど、構造が複雑になる
と共に高価なものとなってしまうという問題点があった
However, in the conventional method of mechanically pressing the substrate to be processed onto the electrode, the substrate to be processed must be pushed into the electrode using a clamp, etc., and a large amount of dust is generated from the contact area between the clamp and the substrate to be processed. There was a problem. In addition, with the method of cooling the substrate to be processed using gas, if the seal between the substrate and the electrode is not completely sealed, the cooling gas will mix into the process gas and have a negative effect on the etching characteristics. There was a problem. Furthermore, in the method of using electrostatic force by applying a DC voltage to the substrate to be processed, an electrostatic electrode for electrostatic adsorption is provided inside the electrode to which high frequency power is applied, and a high DC voltage is applied to this electrostatic electrode. There are problems in that the structure becomes complicated and expensive, as a DC high-voltage power supply is required to apply the voltage.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、前記問題点を解決するために、被処理基板と
電極との間に絶縁119層を設け、この被処理基板に生
じた自己バイアス電圧による静電力を用いて当該被処理
基板を電極に吸着させると共に、この被絶縁膜層によっ
て覆われていない電極部分を絶縁体で覆う構成を採用す
ることにより、被処理基板と電極との間の熱伝導を良好
にすると共に、熱の発生を可及的に少なくするようにし
ている。
In order to solve the above problems, the present invention provides 119 layers of insulation between the substrate to be processed and the electrode, and uses electrostatic force due to the self-bias voltage generated in the substrate to be processed to connect the substrate to the electrode. At the same time, by adopting a structure in which the part of the electrode that is not covered by the insulating film layer is covered with an insulator, the heat conduction between the substrate to be processed and the electrode is improved, and the generation of heat is reduced. I try to minimize it as much as possible.

第1図に示す本発明の1実施例構成を用いて問題点を解
決するための手段を説明する。
Means for solving the problems will be explained using the configuration of one embodiment of the present invention shown in FIG.

第1図において、平板電極2.3は、平行に配置した円
板状の電極である。この平板電極2上の被処理基板8に
対向する位置に、図に示すように薄い絶縁膜層12が設
けられている。この絶縁膜層12によって覆われていな
い部分の平板電極2の表面は、カバープレート9および
絶縁支持体10によって覆われている。また、平板電極
2は、高周波チョークコイル13を介して接地されてい
るため、常に直流的に接地電位に保持されている。
In FIG. 1, the plate electrodes 2.3 are disk-shaped electrodes arranged in parallel. A thin insulating film layer 12 is provided on the flat electrode 2 at a position facing the substrate 8 to be processed, as shown in the figure. The surface of the flat electrode 2 that is not covered by the insulating film layer 12 is covered by a cover plate 9 and an insulating support 10. Furthermore, since the flat plate electrode 2 is grounded via the high frequency choke coil 13, it is always held at a DC ground potential.

高周波電力は、高周波電源4からブロッキング・コンデ
ンサ5を介して平板電極2に供給されている。
High frequency power is supplied from a high frequency power source 4 to the flat plate electrode 2 via a blocking capacitor 5.

〔作用〕[Effect]

第1図を用いて説明した構成を採用し、高周波電源4か
らブロッキング・コンデンサ5を介して平板電極2に対
して高周波電力を供給すると、平板電極2、絶縁膜Jl
ii12、被処理基板8および平板電極3の経路を通じ
て放電が生じ、両者の電極間に導入されたガスがプラズ
マ化される。この際、平vi、電極2と被処理基板8と
の間に電圧(これを自己バイアス電圧という)が発生す
る。この自己バイアス電圧によって、被処理基板8は平
板電極2に吸着(密着)する。このため、被処理基板8
と平板電極2との間の熱伝導が良好になり、平板電極2
を水冷などすることにより、被処理基板8の温度上昇が
押さえられる。また、絶縁膜層12が設けられた場所以
外の平板電極2上は、絶縁物であるカバープレート9お
よび絶縁支持体10によって覆われている。これにより
、被処理基板8以外の部分でプラズマ処理による発熱が
生じることがなく、被処理基板8の温度上昇が最小限に
押さえられる。
When the configuration explained using FIG. 1 is adopted and high frequency power is supplied from the high frequency power source 4 to the flat plate electrode 2 via the blocking capacitor 5, the flat plate electrode 2
ii12, a discharge occurs through the path between the substrate to be processed 8 and the flat electrode 3, and the gas introduced between the two electrodes is turned into plasma. At this time, a voltage (this is called a self-bias voltage) is generated between the electrode 2 and the substrate 8 to be processed. Due to this self-bias voltage, the substrate 8 to be processed is attracted (closely attached) to the flat electrode 2 . For this reason, the substrate to be processed 8
The heat conduction between the plate electrode 2 and the plate electrode 2 is improved, and the plate electrode 2
By cooling the substrate 8 with water or the like, the temperature rise of the substrate 8 to be processed can be suppressed. Further, the top of the flat electrode 2 other than the area where the insulating film layer 12 is provided is covered with a cover plate 9 and an insulating support 10 which are insulators. As a result, heat generation due to plasma processing does not occur in parts other than the substrate 8 to be processed, and the temperature rise of the substrate 8 to be processed can be suppressed to a minimum.

〔実施例〕〔Example〕

第1図は本発明の1実施例構成の側面断面図、第2図は
絶縁破壊電圧とアルマイト膜厚との関係曲線を示す0図
中、■は真空容器、2.3は平板電極、4は高周波電源
、5はブロッキング・コンデンサ、6は排気導管、7は
ガス導入管、8は被処理基板、9はカバープレート、1
0は絶縁支持体、11はシールド、12は絶縁膜層、1
3は高周波チョークコイル、14はバルブを表す。
Fig. 1 is a side sectional view of one embodiment of the present invention, and Fig. 2 shows a relationship curve between dielectric breakdown voltage and alumite film thickness. is a high frequency power supply, 5 is a blocking capacitor, 6 is an exhaust pipe, 7 is a gas introduction pipe, 8 is a substrate to be processed, 9 is a cover plate, 1
0 is an insulating support, 11 is a shield, 12 is an insulating film layer, 1
3 represents a high frequency choke coil, and 14 represents a valve.

第1図に示す実施例は、本発明をバッチ式平行平板型の
反応性イオンエツチング装置に適用したものである。真
空容器1の内部には、2枚の平板電極2および平板電極
3が配置されている。下部に位置する平板電極2は、高
周波電源4からブロッキング・コンデンサ5を通じて高
周波電力が供給されている。排気導管6に接続された真
空ポンプ(図示されていない)を用いて、真空容器lを
真空に排気した後、所望の反応性ガスをガス導入管7か
ら真空容器1内に導入し、所定の圧力に保持するようバ
ルブ14を制御する。この状態のもとで、高周波電力を
平板電極2と平板電極3との間に供給すると、両電極間
にプラズマが生じる。
The embodiment shown in FIG. 1 is an example in which the present invention is applied to a batch type parallel plate type reactive ion etching apparatus. Inside the vacuum container 1, two flat plate electrodes 2 and 3 are arranged. The flat plate electrode 2 located at the bottom is supplied with high frequency power from a high frequency power source 4 through a blocking capacitor 5. After evacuating the vacuum container 1 to vacuum using a vacuum pump (not shown) connected to the exhaust pipe 6, a desired reactive gas is introduced into the vacuum container 1 from the gas introduction pipe 7, and a predetermined amount of Valve 14 is controlled to maintain pressure. In this state, when high frequency power is supplied between the flat plate electrode 2 and the flat plate electrode 3, plasma is generated between the two electrodes.

この時、プラズマ処理を行おうとする被処理基板8と下
部の平板電極2との間に薄い絶縁膜Jm12を設けであ
るため、この被処理基板8と平板電極2との間に数百ポ
ルト程度の自己バイアス電圧が生じる。同様に、カバー
プレート9の表面にも数百ボルト程度の電圧が生してい
る。平板電極2は直流的に高周波チョークコイル13を
介して設置119層12をはさんだ状態で、被処理基板
8と平板電極2との間に自己バイアス電圧が印加される
ため、当該被処理基板8と平板電極2とが吸着する方向
に力が働き、被処理基板8と平板電極2との間の熱伝導
を良好にすることができる。このため、平板電極2を外
部から水などによって冷却し得る構造を採用しておけば
、プラズマ処理中の被処理基板8を効率良好に冷却して
温度上昇を最小限に押さえることが可能となる。
At this time, since a thin insulating film Jm12 is provided between the substrate to be processed 8 to be subjected to plasma processing and the flat plate electrode 2 at the bottom, the distance between the substrate to be processed 8 and the flat plate electrode 2 is approximately several hundred ports. A self-bias voltage of Similarly, a voltage of about several hundred volts is generated on the surface of the cover plate 9. Since a self-bias voltage is applied between the substrate 8 to be processed and the flat electrode 2 with the plate electrode 2 sandwiching the installed 119 layer 12 via the high-frequency choke coil 13 in a direct current manner, the substrate 8 to be processed is A force acts in the direction in which the substrate 8 and the flat electrode 2 are attracted to each other, and heat conduction between the substrate 8 to be processed and the flat electrode 2 can be improved. Therefore, if a structure is adopted in which the flat electrode 2 can be cooled from the outside with water or the like, the substrate 8 to be processed during plasma processing can be efficiently cooled and the temperature rise can be kept to a minimum. .

被処理基板8と平板を穫2との間に働く吸着力Fは下式
によって表される。
The adsorption force F acting between the substrate 8 to be processed and the flat plate 2 is expressed by the following formula.

F=KV/d”  ・・・・・・・・・・・・・(1)
ここで、Kは定数、■は絶縁膜層12の両側に位置する
被処理基板8と平板電極2との間に生じた電圧、dは絶
縁膜層12の厚みを表す。この式(1)から判明するよ
うに、吸着力Fを大きくするには、電圧■を大きくする
か、あるいは/および絶縁膜層12の厚みdを小さくす
る必要がある。本発明では、電圧■は、プラズマを発生
させる条件によっておおよその値が定まってしまう。こ
のため、大きな吸着力Fを得るには、絶縁膜層12の厚
みdを可及的に小さくする必要がある。厚みdを薄くし
ていくと、絶縁膜層12中の電界強度が増し、やがては
絶縁破壊され、被処理基板8と平板電極2との間の自己
バイアス電圧の値が小さくなり、両者間に静電吸着力が
働かなくなる。静電吸着力が働かなくなると、被処理基
板8と平板電極2との間の熱伝導が悪くなり、被処理基
板8の温度が」二昇してしまうと共に、絶縁破壊が起き
た時点でプラズマと被処理基板8との間の電位差が変化
し、再現性の良いエツチングなどが不可能となってしま
う。このため、絶縁膜層12の耐圧は、自己バイアス電
圧以上の値でなければならない。
F=KV/d”・・・・・・・・・・・・(1)
Here, K is a constant, ■ is the voltage generated between the substrate 8 to be processed and the flat electrode 2 located on both sides of the insulating film layer 12, and d is the thickness of the insulating film layer 12. As is clear from this equation (1), in order to increase the attraction force F, it is necessary to increase the voltage (2) and/or decrease the thickness d of the insulating film layer 12. In the present invention, the approximate value of voltage (2) is determined depending on the conditions for generating plasma. Therefore, in order to obtain a large adsorption force F, it is necessary to make the thickness d of the insulating film layer 12 as small as possible. As the thickness d decreases, the electric field strength in the insulating film layer 12 increases and eventually dielectric breakdown occurs, the value of the self-bias voltage between the substrate 8 to be processed and the flat electrode 2 decreases, and the voltage between the two increases. Electrostatic adsorption force no longer works. When the electrostatic adsorption force ceases to work, heat conduction between the substrate 8 to be processed and the flat electrode 2 becomes poor, the temperature of the substrate 8 to be processed rises by 2'', and when dielectric breakdown occurs, plasma The potential difference between the substrate 8 and the substrate 8 to be processed changes, making it impossible to perform etching with good reproducibility. For this reason, the breakdown voltage of the insulating film layer 12 must be greater than the self-bias voltage.

第2図は通常の陽極酸化アルマイト層の厚さくミクロン
)と、絶縁耐圧(V)との関係を示したものである。第
2図に示すように、通常のシリコン酸化膜の反応性イオ
ンエツチングで得られる例えば600V程度の自己バイ
アス電圧以上の絶縁耐圧を保持するには、約15ミクロ
ン程度以上のアルマイト層、安全性を考慮するとその2
倍以上のアルマイト層を形成する必要がある。ところが
、通常のアルマイト処理層であると、ドライエツチング
に対する耐久性が低い。このため、被処理基板8よりは
み出している絶縁膜層12の部分は、長時間のエツチン
グ処理を行うと、アルマイト処理層が消失してしまう場
合があった。一方、アルマイト層を厚(すると、アルマ
イト層自体にクラックが入り、絶縁耐圧を低下させてし
まう。
FIG. 2 shows the relationship between the thickness (microns) of a normal anodized alumite layer and the dielectric strength voltage (V). As shown in Figure 2, in order to maintain a dielectric strength higher than the self-bias voltage of, for example, 600V obtained by reactive ion etching of a silicon oxide film, an alumite layer with a thickness of about 15 microns or more is required. Considering part 2
It is necessary to form an alumite layer that is more than twice as large. However, a normal alumite treated layer has low durability against dry etching. For this reason, in the portion of the insulating film layer 12 that protrudes from the substrate 8 to be processed, the alumite treated layer may disappear if the etching process is performed for a long time. On the other hand, if the alumite layer is made too thick, cracks will form in the alumite layer itself, reducing the dielectric strength.

この不都合を解消するために、本実施例はアルマイト処
理層にテフロンなどの有機ポリマーを含浸させた絶縁膜
層12を用いている。この場合には、30ミクロン程度
の厚さであっても、耐ドライエツチング性および耐絶縁
性を十分に満足する絶縁膜層12が得られた。また、絶
縁膜層12としてしゅう酸処理槽でアルマイト処理を施
したアルマイト層であれば、厚さが厚くてもクランクが
入らないため、優れた吸着力を得ることが可能であった
。一方、裏面に感圧接着剤を塗布したポリイミド、ポリ
エチレンテレフタレートなどのフィルムを絶縁膜層12
として使用した場合にも、同様な効果が得れる。
In order to eliminate this inconvenience, this embodiment uses an insulating film layer 12 in which the alumite treatment layer is impregnated with an organic polymer such as Teflon. In this case, an insulating film layer 12 that satisfactorily satisfies dry etching resistance and insulation resistance even with a thickness of about 30 microns was obtained. Furthermore, if the insulating film layer 12 is an alumite layer that has been subjected to alumite treatment in an oxalic acid treatment bath, it is possible to obtain excellent suction power because cranking does not occur even if the thickness is large. On the other hand, a film made of polyimide, polyethylene terephthalate, etc. coated with a pressure-sensitive adhesive on the back side is used as the insulating film layer 12.
A similar effect can be obtained when used as

また、本実施例では、平板電極2を直流的に接地する手
段として、高周波チョークコイル13を用いているが、
必ずしも高周波チョークコイルを用いる必要はない。こ
れは、定常状態では直流電流は、はとんど流れないため
、直流的に接地する手段は、高抵抗体である例えば平板
電極2を冷却□する冷却水であってもよい。平板電極2
を冷却する冷却水を利用すれば、高周波チョークコイル
13などの新たな素子を設ける必要がなく、構成が簡単
となりかつ安価にすることができる。
Furthermore, in this embodiment, the high frequency choke coil 13 is used as a means for grounding the flat plate electrode 2 in a DC manner.
It is not necessarily necessary to use a high frequency choke coil. This is because direct current hardly flows in a steady state, so the means for grounding in a direct current manner may be cooling water for cooling the flat plate electrode 2, which is a high resistance body. Flat electrode 2
If cooling water is used to cool the system, there is no need to provide new elements such as the high frequency choke coil 13, and the configuration can be simplified and made inexpensive.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、被処理基板と電
極との間に薄い絶縁膜層を設け、この被処理基板に生じ
た自己バイアス電圧による静電力を用いて当該被処理基
板を電極に吸着させると共に、この被絶縁膜層によって
覆われていない電橋部分を絶縁体で覆う構成を採用して
いるため、被処理基JNと電極との間の軌仔通を自昇t
ごすみy社に、熱の発生を可及的に少なくすることが可
能となる。このため、簡単な構成を用いて、被処理基板
8を平板電極に吸着させて冷却し、被処理基板8の温度
上昇を最小限に押さえることができる。
As explained above, according to the present invention, a thin insulating film layer is provided between the substrate to be processed and the electrode, and the electrostatic force due to the self-bias voltage generated in the substrate to be processed is used to move the substrate to the electrode. At the same time, since the electric bridge portion not covered by this insulating film layer is covered with an insulator, the track passage between the substrate to be processed JN and the electrode can be prevented by self-lifting.
This makes it possible for Gosumiy to reduce heat generation as much as possible. Therefore, using a simple configuration, the substrate to be processed 8 can be cooled by adsorption to the flat electrode, and the temperature rise of the substrate to be processed 8 can be suppressed to the minimum.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の1実施例構成の側面断面図、第2図は
絶縁破壊電圧とアルマイト膜厚との関係曲線を示す。 図中、1は真空容器、2.3は平板電極、4は高周波電
源、5はブロッキングコンデンサ、6は排気導管、7は
ガス導入管、8は被処理基板、9はカバープレート、1
0は絶縁支持体、11はシールド、12は絶縁膜層、1
3は高周波チョークコイル、14はバルブを表す。
FIG. 1 is a side cross-sectional view of one embodiment of the present invention, and FIG. 2 shows a relationship curve between dielectric breakdown voltage and alumite film thickness. In the figure, 1 is a vacuum container, 2.3 is a flat plate electrode, 4 is a high frequency power supply, 5 is a blocking capacitor, 6 is an exhaust pipe, 7 is a gas introduction pipe, 8 is a substrate to be processed, 9 is a cover plate, 1
0 is an insulating support, 11 is a shield, 12 is an insulating film layer, 1
3 represents a high frequency choke coil, and 14 represents a valve.

Claims (2)

【特許請求の範囲】[Claims] (1)電極を真空に排気し得るよう構成した真空容器内
に設置し、高周波電力をこの電極間に供給すると共に、
被処理基板をこの電極上に載置し、反応性ガスを導入す
ることによって発生させたプラズマを利用して当該被処
理基板をプラズマ処理するプラズマ処理装置において、 電極の直流電位を接地電位に保持する接地電位保持手段
と、 電極と、この電極上に載置した被処理基板との間に設け
、かつ当該被処理基板に発生する自己バイアス電圧以上
の絶縁耐圧を具備した絶縁膜層と、この絶縁膜層によっ
て覆われていない電極部分を覆う絶縁体とを備え、 高周波電力を電極間に供給することによって被処理基板
と電極との間に自己バイアス電圧を発生させ、この発生
させた自己バイアス電圧によって生じる静電力を利用し
て被処理基板を電極に吸着させて熱伝導を良好にすると
共に熱の発生を可及的に少なくするよう構成したことを
特徴とするプラズマ処理装置。
(1) The electrodes are installed in a vacuum container configured to be evacuated to a vacuum, and high frequency power is supplied between the electrodes,
In a plasma processing apparatus that places a substrate to be processed on this electrode and processes the substrate using plasma generated by introducing a reactive gas, the DC potential of the electrode is maintained at ground potential. an insulating film layer provided between the electrode and the substrate to be processed placed on the electrode and having a dielectric strength higher than the self-bias voltage generated in the substrate to be processed; and an insulator that covers the electrode portions not covered by the insulating film layer, and generates a self-bias voltage between the substrate to be processed and the electrode by supplying high-frequency power between the electrodes, and generates a self-bias voltage between the substrate to be processed and the electrode. A plasma processing apparatus characterized in that the substrate to be processed is attracted to an electrode using electrostatic force generated by a voltage to improve heat conduction and to reduce heat generation as much as possible.
(2)前記絶縁膜層が、テフロンあるいは他の有機ポリ
マーを含浸させたアルマイト処理層、しゅう酸処理によ
るアルマイト処理層、あるいは感圧接着剤を塗布した有
機ポリマーフィルムのいずれかであることを特徴とする
特許請求の範囲第(1)項記載のプラズマ処理装置。
(2) The insulating film layer is either an alumite-treated layer impregnated with Teflon or other organic polymer, an alumite-treated layer treated with oxalic acid, or an organic polymer film coated with a pressure-sensitive adhesive. A plasma processing apparatus according to claim (1).
JP21227285A 1985-09-27 1985-09-27 Plasma processing equipment Pending JPS6273632A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21227285A JPS6273632A (en) 1985-09-27 1985-09-27 Plasma processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21227285A JPS6273632A (en) 1985-09-27 1985-09-27 Plasma processing equipment

Publications (1)

Publication Number Publication Date
JPS6273632A true JPS6273632A (en) 1987-04-04

Family

ID=16619845

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21227285A Pending JPS6273632A (en) 1985-09-27 1985-09-27 Plasma processing equipment

Country Status (1)

Country Link
JP (1) JPS6273632A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5590228A (en) * 1978-12-26 1980-07-08 Nippon Telegr & Teleph Corp <Ntt> Dry etching device
JPS58206125A (en) * 1982-05-26 1983-12-01 Hitachi Ltd Treating device for plasma

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5590228A (en) * 1978-12-26 1980-07-08 Nippon Telegr & Teleph Corp <Ntt> Dry etching device
JPS58206125A (en) * 1982-05-26 1983-12-01 Hitachi Ltd Treating device for plasma

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