JPS6273333A - エミュレーション制御装置 - Google Patents

エミュレーション制御装置

Info

Publication number
JPS6273333A
JPS6273333A JP21406085A JP21406085A JPS6273333A JP S6273333 A JPS6273333 A JP S6273333A JP 21406085 A JP21406085 A JP 21406085A JP 21406085 A JP21406085 A JP 21406085A JP S6273333 A JPS6273333 A JP S6273333A
Authority
JP
Japan
Prior art keywords
instruction
mode
processor
emulation
address space
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21406085A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0564375B2 (enExample
Inventor
Junichi Iwasaki
岩先　純一
Takashi Nakayama
貴司 中山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP21406085A priority Critical patent/JPS6273333A/ja
Publication of JPS6273333A publication Critical patent/JPS6273333A/ja
Publication of JPH0564375B2 publication Critical patent/JPH0564375B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Executing Machine-Instructions (AREA)
JP21406085A 1985-09-26 1985-09-26 エミュレーション制御装置 Granted JPS6273333A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21406085A JPS6273333A (ja) 1985-09-26 1985-09-26 エミュレーション制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21406085A JPS6273333A (ja) 1985-09-26 1985-09-26 エミュレーション制御装置

Publications (2)

Publication Number Publication Date
JPS6273333A true JPS6273333A (ja) 1987-04-04
JPH0564375B2 JPH0564375B2 (enExample) 1993-09-14

Family

ID=16649593

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21406085A Granted JPS6273333A (ja) 1985-09-26 1985-09-26 エミュレーション制御装置

Country Status (1)

Country Link
JP (1) JPS6273333A (enExample)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0895783A (ja) * 1994-09-20 1996-04-12 Nec Corp 可変語長型マイクロコンピュータ
US5548717A (en) * 1991-03-07 1996-08-20 Digital Equipment Corporation Software debugging system and method especially adapted for code debugging within a multi-architecture environment
US5652869A (en) * 1991-03-07 1997-07-29 Digital Equipment Corporation System for executing and debugging multiple codes in a multi-architecture environment using jacketing means for jacketing the cross-domain calls
JP2002536712A (ja) * 1999-01-28 2002-10-29 エーティーアイ インターナショナル エスアールエル 第２のアーキテクチャのコンピュータにおける第１のコンピュータアーキテクチャ用プログラムの実行
JP2008171428A (ja) * 2007-01-09 2008-07-24 Internatl Business Mach Corp <Ibm> プロセッサが規格合致するように見えるアーキテクチャ・レベルを選択するための方法および装置
JP2010536089A (ja) * 2007-08-08 2010-11-25 アナログ デバイシス， インコーポレイテッド エイリアスアドレス指定を用いる可変長命令コード化の実装

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5458324A (en) * 1977-10-19 1979-05-11 Hitachi Ltd Information processor
JPS5674749A (en) * 1979-11-26 1981-06-20 Nec Corp Microprogram controlling device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5458324A (en) * 1977-10-19 1979-05-11 Hitachi Ltd Information processor
JPS5674749A (en) * 1979-11-26 1981-06-20 Nec Corp Microprogram controlling device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5548717A (en) * 1991-03-07 1996-08-20 Digital Equipment Corporation Software debugging system and method especially adapted for code debugging within a multi-architecture environment
US5652869A (en) * 1991-03-07 1997-07-29 Digital Equipment Corporation System for executing and debugging multiple codes in a multi-architecture environment using jacketing means for jacketing the cross-domain calls
JPH0895783A (ja) * 1994-09-20 1996-04-12 Nec Corp 可変語長型マイクロコンピュータ
JP2002536712A (ja) * 1999-01-28 2002-10-29 エーティーアイ インターナショナル エスアールエル 第２のアーキテクチャのコンピュータにおける第１のコンピュータアーキテクチャ用プログラムの実行
JP2008171428A (ja) * 2007-01-09 2008-07-24 Internatl Business Mach Corp <Ibm> プロセッサが規格合致するように見えるアーキテクチャ・レベルを選択するための方法および装置
JP2010536089A (ja) * 2007-08-08 2010-11-25 アナログ デバイシス， インコーポレイテッド エイリアスアドレス指定を用いる可変長命令コード化の実装

Also Published As

Publication number Publication date
JPH0564375B2 (enExample) 1993-09-14

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Legal Events

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