JPS6272019A - Reference voltage generating circuit - Google Patents

Abstract

PURPOSE:To generate a reference voltage being stable against the variation in source voltage, a change in manufacture condition, and the variation in temperature even when the source voltage is low by providing the 1st MOSFET, the 2nd MOSFET, the 3rd MOSFET, and the 4th MOSFET which are cascaded to a power source in series respectively, and using a depletion type as the 2nd MOSFET and an enhancement type as the 1st, the 3rd, and the 4th MOSFETs. CONSTITUTION:A P channel MOSFET is a depletion type and its gate is connected to the source. The gates of N channel MOSFETs 102 and 104 are connected in common and also connected to the drain of the FET 102. Further, the gate of a P channel MOSFET is connectedd to the drain. Other MOSFETs except a MOSFET 101 are an enhancement type. Consequently, the sum of the absolute values of a normal threshold voltage and the threshold voltage of the depletion type MOSFET is obtained, so variations threshold value with temperature cancel each other and the reference voltage is generated very stably against the temperature variations.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a circuit configuration for generating a base voltage.

[Summary of the invention]

The base voltage generation circuit of the present invention is configured to generate the sum of the absolute values of the enhancement type and depletion type threshold voltages, and is free from the influence of power supply voltage fluctuations, temperature fluctuations, and manufacturing condition fluctuations. # is not received.

[Conventional technology]

An example of a conventional differential ratio voltage generating circuit is shown in FIG. In FIG. 4, the threshold voltage and conduction coefficient of P-channel MOSFET IiO+ and 405 are equal to each other, the threshold voltage of N-channel MOIEFET 402 is VAO2, and the conduction coefficient is β402. Set the threshold voltage of N-channel MOSFKT404 to v404.
, the conductivity coefficient is β404, the terminal 405 has β40
2=β404, V 402) Vd0 at V a OaQ
A voltage of 2-V4Q4 is generated. This voltage is N-channel MO6F
I! : Since it is the difference between the threshold voltages of 7MO2 and 404, it becomes a voltage that does not depend on fluctuations in power supply voltage or temperature.

[Problems and Objectives to be Solved by the Invention] However, the conventional basic voltage generation circuit has a problem in that in order to increase its output voltage, the power supply voltage must be sufficiently increased. That is, in FIG. 4, V
d02-7404x 1. Q V t - If desired, for example, V 402 - 1.4v, vaoa = α4v, and in order for the N-channel M08IPKT402 to operate, the power supply voltage must be 1.4v or higher. Furthermore, if v404 is made too small, the circuit will not operate stably because it will become a depression type at high temperatures.

Also, I flowing to N channel 1i10SFICT402
There is a possibility that the E current changes due to fluctuations in the power supply voltage, the operating point of the circuit changes, and the output voltage changes.

The present invention solves the above problems, and aims to provide a circuit that can generate a reference voltage that is stable against power supply voltage fluctuations, manufacturing condition fluctuations, and temperature fluctuations even at a low power supply voltage. .

[Means for resolving the gap @]

The basic voltage generation circuit of the present invention includes a first MOSFET and a second MOSFET connected in series to the power supply, a third MOSFET and a fourth MOSFET connected in series to the power supply.
SF1nT, and the first MOSFET gate is connected to the drain of the 17th) MOEIFET and the @3 M
connected to the gate of the O13FET, and the second MOS
FB: T gate is @2 MOSFI! : connected to the source of the fourth MOSFET, and the gate of the fourth MOSFET is connected to the source of the fourth MOSFET
connected to the train of OSFETs, said first MO day F
The conductivity types of the InT and the third MOSFET are the same, and the conductivity types of the second MOSFET and the fourth MOSFET are different from those of the 11g1 and the third MOSFET, and the second MOSFET is a depression type, and the above-mentioned +, 3. The fourth MOSFET is characterized by being of an enhancement type.

[Effect]

Since the second MOSFET is of the depletion type, it operates stably against source voltage fluctuations due to the constant current effect. Furthermore, the effects of temperature fluctuations and manufacturing condition fluctuations are not affected because they cancel each other out. Furthermore, since the threshold voltage is not so large as in the conventional example, it is possible to operate with a low supply voltage.

〔Example〕

An embodiment of the invention is shown in FIG. In FIG. 1, it is a P-channel uosyxTH depletion type, and its gate is connected to its source.

N-channel MOSFET+02 and 104 have a common gate and are connected to the drain of FKTI02. Further, the gate of the P-channel MOSIPET is connected to the drain. MOSFET Other MOEI except +01
FET is an enhancement type.

Now, the threshold voltage of MOSIFET I O+ (hereinafter abbreviated as Vth) k V+1) 11 conductivity coefficient a (hereinafter abbreviated as β) total βp, vth of MOSFET I 05
V+p, .

β to β, MOSFIICT +02 and 104 vth
, β for each k V+M, , β, , V+114. β
4. If all MOSFETs operate in saturation, 'h (V+P, )z-7! j(V, -V+M,
)"+11'l(VD D-V, -V+P
, )−mu(v,−v+y4)” f21 where V,
is the drain voltage of MOSFKTI02, v, is MOSI
FFiT l 0517) Drain voltage, VDD is the t source voltage.

Formula nl +21 where V++, xV++4=V+M, β-β8. β−β
If it is 4, then VDD-V, = V+P, + I V+
P, + +51.

Now, if the vth of MOSF'ET I Ol is initially set to v+p and then manufactured to make V0F by ion implantation, V+P, = V+P, -ΔV (AV>V+P,)ΔV
is VDD-V! due to the vth change f due to ion implantation! = v+p, + l V+P, -ΔV
l! V+P, +ΔV −V+P, =ΔV
+61, which is a value determined only by the amount of ion implantation.

To operate MOSFET I Ol and MOSFET I 04 in saturation, a simple calculation shows that β, 〈 β.

You can see that it is sufficient to do this.

As shown in equation (6), the basic voltage generation circuit of the present invention outputs the sum of the absolute values of vth of the enhancement vth toteflex, so it is stable against changes in l[.

Also, t flowing to depression IMOSFF2T101
In R, one crop point of the circuit is added, so ? ! There is no fluctuation in the operating point due to fluctuations in the power supply voltage, and the output voltage is stable. Furthermore, by using a relatively accurate ion implantation technique, it can be made less susceptible to variations in manufacturing conditions.

Furthermore, P channel MOBFET+0IftP 'f
- By performing the same ion implantation on both transistors of P-channel MOSFET 105 and making it a depletion type P-channel MOSFET, the silicon work function difference is approximately 1.07.
It is also possible to generate a voltage of 7. In this case, voltage fluctuations due to variations in manufacturing conditions can be further reduced compared to the above-described configuration using only the ion implantation technique.

FIG. 2 shows an example of a voltage detection circuit using the basic voltage generation circuit of the present invention. This is a circuit in which a comparator 202 compares the output voltage of the base s voltage generation circuit 201 and the voltage obtained by dividing the power supply voltage by a resistive voltage dividing circuit 205. Base m@
When the output voltage of voltage generating circuit 01 is configured to have a work function difference of about 1.077 between polysilicon, the conventional circuit did not operate unless the power supply voltage was 1.6 V or higher.
The circuit of FIG. 2 using the basic pressure generating circuit of the present invention can be operated up to a power supply voltage of 1.2 V.

FIG. 3 shows another embodiment of the invention.

In Figure 3, basically each MOSF of the circuit in Figure 1 is
The conductivity type of ET is reversed, and N-channel MO
The voltage of the sum of the absolute value of Vth of S F E T 502 and the Vth of N-channel MO6FKT 504 is O
This is a configuration in which the current is generated at the drain of the N-channel MO6yETso4 using v as the base fishing.

〔Effect of the invention〕

Since the differential voltage generation circuit of the present invention can obtain the sum of the normal threshold voltage and the absolute value of the threshold voltage of the depletion type MOSFET, The fluctuations cancel each other out, making it extremely stable against temperature fluctuations. Also, MOS with a threshold voltage higher than the normal threshold voltage.
Since there is no FET, operation is possible as long as there is a power supply voltage equal to or higher than the sum of the threshold voltages of the N-channel and P-channel enhancement IMOSFETs. Furthermore, depression type MOS? Since the operating point of the circuit is determined by the ETIC current, it is possible to obtain a very stable voltage even in the face of power supply voltage fluctuations.

Due to the above advantages, the present invention can be used for various voltage detection and constant voltage circuits in low-voltage driven electronic circuits such as ICs for watches, and its effects are great.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an embodiment of the differential voltage generating circuit of the present invention. FIG. 2 is a circuit diagram of a voltage detection circuit using the base m% voltage generation circuit of the present invention. Figure 5 is a circuit diagram of another embodiment of the base voltage generation circuit of the present invention. FIG. 6 is a circuit diagram of a conventional water difference voltage generation circuit. 101...P channel Teflon type MOSET 105...P channel enhancement type MOFK
T 102.104...N channel enhancement type MO3FET Sol, 505...P channel enhancement type MOSFKT S02...N channel Teflon fiMOSE
T 504...N-'f-Yannel enhancement type M
OFKT 401.405...P channel enhancement type MOEfF'KT 402.404...N channel enhancement type MOSIJj;

Claims (3)

[Claims] (1) In a complementary MOS integrated circuit, a first MOSFET and a second MOSFET are connected in series to a power supply.
, having a third MOSFET and a fourth MOSFET connected in series to a power supply, the gate of the first MOSFET being connected to the drain of the first MOSFET and the gate of the third MOSFET, the second MOS
The gate of the FET is connected to the source of the second MOSFET, and the gate of the fourth MOSFET is connected to the source of the fourth MOSFET.
The first MOSFET and the third MOSFET have the same conductivity type, and the second MOSFET is connected to the drain of the second MOSFET.
The conductivity types of the SFET and the fourth MOSFET are different from the conductivity types of the first and third MOSFETs,
A radical voltage generation circuit characterized in that the second MOSFET is of a depletion type, and the first, third, and fourth MOSFETs are of an enhancement type. (2) Claim 1, characterized in that the second MOSFET is made into a depression type by ion implantation.
Reference voltage generation circuit described in section. (3) The reference voltage generating circuit according to claim 1, wherein the second MOSFET is made into a depression type by changing the gate material.