JPS6269754A - Carrier recovery circuit - Google Patents

Carrier recovery circuit

Info

Publication number
JPS6269754A
JPS6269754A JP60209619A JP20961985A JPS6269754A JP S6269754 A JPS6269754 A JP S6269754A JP 60209619 A JP60209619 A JP 60209619A JP 20961985 A JP20961985 A JP 20961985A JP S6269754 A JPS6269754 A JP S6269754A
Authority
JP
Japan
Prior art keywords
signal
circuit
output signal
output
psk
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60209619A
Other languages
Japanese (ja)
Inventor
Yuichi Ninomiya
佑一 二宮
Yoshimichi Otsuka
吉道 大塚
Yoshinori Izumi
吉則 和泉
Seiichi Goshi
清一 合志
Hiroshi Kayashima
茅嶋 宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Japan Broadcasting Corp
Original Assignee
Mitsubishi Electric Corp
Nippon Hoso Kyokai NHK
Japan Broadcasting Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp, Nippon Hoso Kyokai NHK, Japan Broadcasting Corp filed Critical Mitsubishi Electric Corp
Priority to JP60209619A priority Critical patent/JPS6269754A/en
Publication of JPS6269754A publication Critical patent/JPS6269754A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To stably recover a carrier necessary for demodulating a PSK modulation signal by permitting a sample holding circuit to hold the control voltage of a voltage controlled oscillator VCO stable. CONSTITUTION:While a synchronization detecting circuit 11 detects the synchro nization between the PSK modulation signal and the output signal of the VCO 10, a switch 14a at the input side of the sample holding circuit 14 is in an ON state, and a charge is charged and discharged to a capacitor 14b. While the input signal of the synchronization detecting circuit 11 is an FM modulation signal, the input side switch 14a is an OFF state, and the output of the sample holding circuit 14 becomes a constant voltage due to the charge of the capacitor 14b. the oscillation frequency of the output signal of the VCO 10 is controlled by the output voltage of the sample holding circuit 14. However, since the output voltage of the sample holding circuit 14 has less fluctuation, the output signal of the VCO 10 is stable. Accordingly, while the output signal of a band amplifier 8 is the PSK signal, the synchronization detecting circuit 11 can stably detect the synchronization at the beginning of said period.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明はキャリア再生回路に関し、特にテレビジョン
信号の新しい伝送方式として提案されている、映像信号
をFM変調し音声信号を時分割でPSK変調する方式に
おいて、音声信号の復調を良好に行なうためのキャリア
再生回路の改良に関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a carrier regeneration circuit, and in particular, it is proposed as a new transmission method for television signals, in which video signals are FM modulated and audio signals are time-divisionally PSK modulated. This invention relates to an improvement of a carrier regeneration circuit for better demodulation of audio signals in a system in which a voice signal is demodulated.

〔従来の技術〕[Conventional technology]

ここで提案されている新変調方式は、NHK放送技術研
究所が昭和59年6月の創立記念講演で発表した資料「
高品位テレビの新しい伝送方式%式% 第2図に示すような伝送方式である。
The new modulation method proposed here is based on the material "
New transmission method for high-definition television % Type % This is a transmission method as shown in Figure 2.

即ち、このMUSE方式は映像信号及びコントロール信
号はFM変調、クランプレベルは無変調、音声情報はP
SK変調とし、該クランプレベル及び音声情報は垂直ブ
ランキング期間内に含まれるように伝送する方式である
That is, in this MUSE method, the video signal and control signal are FM modulated, the clamp level is not modulated, and the audio information is P
SK modulation is used, and the clamp level and audio information are transmitted so as to be included within the vertical blanking period.

この方式による伝送は、現在のところ実用化されていな
いが、衛星によるこの放送方式の受信機(12GHz:
SHF帯)としては、第3図に示すような構成が考えら
れる。
Although transmission using this method is not currently in practical use, there are receivers for this broadcasting method using satellites (12 GHz:
As for the SHF band, a configuration as shown in FIG. 3 can be considered.

図において、1は受信機の入力端子、2は受信機の入力
端子1に入力される入力信号の選局部、3は選局部2の
出力信号を入力とする帯域増幅器、4は帯域増幅器3の
出力信号を復調するFM復調器、5はFM復調器4の出
力信号をA/D変換するA/D変換器、6はA/D変換
器5の出力信号を処理するディジタル処理回路、7はデ
ィジタル画像信号出力端子である。
In the figure, 1 is an input terminal of the receiver, 2 is a tuning section for the input signal input to the input terminal 1 of the receiver, 3 is a band amplifier that receives the output signal of the tuning section 2, and 4 is a band amplifier for the input signal input to the input terminal 1 of the receiver. 5 is an A/D converter that converts the output signal of the FM demodulator 4 into A/D; 6 is a digital processing circuit that processes the output signal of the A/D converter 5; 7 is an FM demodulator that demodulates the output signal; This is a digital image signal output terminal.

また8は選局部2の出力信号を入力とする帯域増幅器、
9は帯域増幅器8の出力信号と電圧制御発振器(以下V
COと称す)の出力信号と、同期検波回路の出力信号を
入力とする制御回路、lOは制御回路9の出力信号を入
力とするVCOlllは帯域増幅器8の出力信号を入力
とする同期検波回路、12は制御回路9.VCOIOか
ら構成されたキャリア再生回路、13は同期検波回路1
1の出力端子と接続されたPSK復調出力端子である。
8 is a band amplifier that receives the output signal of the tuning section 2;
9 represents the output signal of the bandpass amplifier 8 and the voltage controlled oscillator (hereinafter V
10 is a control circuit that receives the output signal of the control circuit 9 and the output signal of the synchronous detection circuit; 10 is a synchronous detection circuit that receives the output signal of the control circuit 9; VCOll is a synchronous detection circuit that receives the output signal of the band amplifier 8; 12 is a control circuit 9. A carrier regeneration circuit composed of VCOIO, 13 is a synchronous detection circuit 1
This is a PSK demodulation output terminal connected to the output terminal of No. 1.

次に動作について説明する。入力端子1に到来する入力
信号は選局部2で周波数変換され、帯域増幅器3は選局
部2の出力信号の中の必要な帯域のみを増幅し、F M
ijjill器4に送る。FM復調器4では、映像信号
、コントロール信号などを検波復調し、該FM復調器4
の検波出力はA/D変換器5でディジタルデータに変換
され、該変換されたデータはディジタル処理回路6で演
算処理され、ディジタル画像信号出力端子7に出力信号
が得られる。
Next, the operation will be explained. The input signal arriving at the input terminal 1 is frequency-converted by the tuning section 2, and the band amplifier 3 amplifies only the necessary band of the output signal of the tuning section 2, and converts the frequency of the input signal arriving at the input terminal 1 into an F M
Send to ijjill device 4. The FM demodulator 4 detects and demodulates video signals, control signals, etc.
The detected output is converted into digital data by an A/D converter 5, and the converted data is subjected to arithmetic processing in a digital processing circuit 6, and an output signal is obtained at a digital image signal output terminal 7.

一方、帯域増幅器8は選局部2の出力信号の中の必要な
帯域を増幅し、該帯域増幅器8の出力信号は制御回路9
.同期検波回路11に入力され、制御回路9は帯域増幅
器8の出力信号とvco iOの出力信号と同期検波回
路11の復調出力とを入力とし、逆変調型等の周知のキ
ャリア再生に関わる制御を行ない、該制御回路9の出力
信号によりVCOIOの発振周波数が制御される。また
同期検波回路11はVCOIOの出力信号と帯域増幅器
8の出力信号の同期検波を行ない、帯域増幅器8の出力
信号のうちのPSK変調部の復調を行なう。そしてPS
KIXgN出力端子13にPSK復調された音声データ
が得られる。
On the other hand, the band amplifier 8 amplifies the necessary band of the output signal of the tuning section 2, and the output signal of the band amplifier 8 is transmitted to the control circuit 9.
.. The control circuit 9 inputs the output signal of the band amplifier 8, the output signal of the VCO iO, and the demodulated output of the synchronous detection circuit 11, and performs control related to well-known carrier regeneration such as an inverse modulation type. The oscillation frequency of the VCOIO is controlled by the output signal of the control circuit 9. Further, the synchronous detection circuit 11 performs synchronous detection of the output signal of the VCOIO and the output signal of the band amplifier 8, and demodulates the PSK modulation portion of the output signal of the band amplifier 8. And P.S.
PSK demodulated audio data is obtained at the KIXgN output terminal 13.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の衛星による高品位テレビジョン放送の受信機は以
上のように構成されており、キャリア再生回路前段の帯
域増幅器の出力がFM、PSKの複合信号であり、該P
SK信号期間の前半で、キャリア再生回路のVCOの制
御電圧が、直前のFM信号期間の影響で不安定になるた
めに、VCOの発振周波数が安定せず、PSK復調が正
しく行なわれないという問題点があった。
A conventional satellite high-definition television broadcasting receiver is configured as described above, and the output of the band amplifier before the carrier regeneration circuit is a composite signal of FM and PSK.
In the first half of the SK signal period, the VCO control voltage of the carrier regeneration circuit becomes unstable due to the influence of the immediately preceding FM signal period, so the VCO oscillation frequency is unstable and PSK demodulation is not performed correctly. There was a point.

この発明は、上記のような問題点を解消するためになさ
れたもので、帯域増幅器の出力がPSK信号である期間
のVCOの制御電圧を安定で変動の少ないものとするこ
とのできるキャリア再生回路を得ることを目的とする。
The present invention was made to solve the above-mentioned problems, and provides a carrier regeneration circuit that can stabilize the control voltage of the VCO during the period when the output of the band amplifier is a PSK signal and have little fluctuation. The purpose is to obtain.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係るキャリア再生回路は、キャリア再生回路
前段の帯域増幅器の出力がFM変調信号の期間はVCO
の制御電圧を、その直前のPSK変調信号期間の安定な
状態に維持するサンプルホールド回路を付加したもので
ある。
In the carrier regeneration circuit according to the present invention, during the period in which the output of the band amplifier at the front stage of the carrier regeneration circuit is an FM modulation signal, the VCO
A sample and hold circuit is added for maintaining the control voltage in a stable state during the immediately preceding PSK modulation signal period.

〔作用〕[Effect]

この発明においては、サンプルホールド回路がvCOの
制御電圧を安定な状態に維持するから、PSK変調信号
の復調に必要なキャリアの再生が安定に行なわれる。
In this invention, since the sample and hold circuit maintains the control voltage of vCO in a stable state, the carrier necessary for demodulating the PSK modulated signal is regenerated stably.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。第1
図は本発明の一実施例によるキャリア再生回路を示し、
図において、1は受信機の入力端子、2は受信機1に入
力される入力信号の選局部、3は選局部2の出力信号を
入力とする帯域増幅器、4は帯域増幅器3の出力信号を
復調するFM復調器、5はFM復調器4の出力信号をA
/D変換するA/D変換器、6はA/D変換器5の出力
信号を処理するディジタル処理回路、7はディジタル画
像信号出力端子である。
An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure shows a carrier regeneration circuit according to an embodiment of the present invention,
In the figure, 1 is the input terminal of the receiver, 2 is a tuning section for the input signal input to the receiver 1, 3 is a band amplifier that receives the output signal of the tuning section 2, and 4 is the input terminal for the output signal of the band amplifier 3. An FM demodulator 5 demodulates the output signal of the FM demodulator 4 to A
6 is a digital processing circuit that processes the output signal of the A/D converter 5, and 7 is a digital image signal output terminal.

また8は選局部2の出力信号を入力とする帯域増幅器、
9は帯域増幅器8の出力信号とVCOの出力信号と同期
検波回路の出力信号とが入力される制御回路、14は制
御回路9の出力信号を入力としディジタル処理回路6の
出力信号により制御されるサンプルホールド回路、10
はサンプルホールド回路14の出力信号を入力とするv
COlllは帯域増幅器8の出力信号とVCOIOの出
力信号とを人力とする同期検波回路、工2は制御回路9
.VCOIO,サンプルホールド回路14から構成され
たキャリア再生回路、13は同期ヰ★波回路11の出力
信号と接続されたPSKfiilli出力端子である。
8 is a band amplifier that receives the output signal of the tuning section 2;
9 is a control circuit to which the output signal of the band amplifier 8, the output signal of the VCO, and the output signal of the synchronous detection circuit are input; 14 is the control circuit that receives the output signal of the control circuit 9 and is controlled by the output signal of the digital processing circuit 6; Sample and hold circuit, 10
v which inputs the output signal of the sample and hold circuit 14
COll is a synchronous detection circuit that uses the output signal of the band amplifier 8 and the output signal of the VCOIO manually, and COll is a control circuit 9.
.. A carrier regeneration circuit includes a VCOIO and a sample and hold circuit 14, and 13 is a PSKfiilli output terminal connected to the output signal of the synchronous wave circuit 11.

次に動作について説明する。入力端子lに到来する入力
信号は、選局部2で周波数変換され、帯域増幅器3は選
局部2の出力信号の中の必要な帯域のみを増幅し、FM
復調器4に送る。FM復調器4は映像信号、コントロー
ル信号などを検波復調し、該FM復調器4の検波出力は
、A/D変換器5でディジタルデータに変換され、該変
換されたデータはディジタル処理回路6で演算処理され
、ディジタル画像信号出力端子7に出力信号が得られる
Next, the operation will be explained. The input signal arriving at the input terminal l is frequency-converted by the tuning section 2, and the band amplifier 3 amplifies only the necessary band of the output signal of the tuning section 2, and converts it into an FM signal.
It is sent to demodulator 4. The FM demodulator 4 detects and demodulates video signals, control signals, etc., the detection output of the FM demodulator 4 is converted into digital data by the A/D converter 5, and the converted data is sent to the digital processing circuit 6. The arithmetic processing is performed, and an output signal is obtained at the digital image signal output terminal 7.

一方、帯域増幅器8は選局部2の出力信号の中の必要な
帯域を増幅し、制御回路9.同期検波回路11に出力信
号を送る。同期検波回路11は帯域増幅3日の出力信号
とVCOIOの出力信号との同期検波を常時行なってお
り、制御回路9は帯域増幅器B、vcoio、同期検波
回路11の出力信号を入力とする逆変調型等の周知のキ
ャリア再生に関わる制御を行ない、その出力信号はサン
プルホールド回路14に入力される。
On the other hand, the band amplifier 8 amplifies the necessary band of the output signal of the tuning section 2, and the control circuit 9. The output signal is sent to the synchronous detection circuit 11. The synchronous detection circuit 11 constantly performs synchronous detection of the output signal of the third day of band amplification and the output signal of the VCOIO, and the control circuit 9 performs inverse modulation using the output signals of the band amplifier B, VCOIO, and the synchronous detection circuit 11 as inputs. Controls related to well-known carrier regeneration such as type etc. are performed, and the output signal is inputted to the sample and hold circuit 14.

ここで第4図(a)に帯域増幅器8の出力信号の形式を
、同図山)にディジタル処理回路6からサンプルホール
ド回路14に送られる制御パルスを、同図(C)にサン
プルホールド回路14の構成を示す。
Here, Fig. 4(a) shows the format of the output signal of the band amplifier 8, Fig. 4(c) shows the control pulse sent from the digital processing circuit 6 to the sample and hold circuit 14, and Fig. The configuration is shown below.

なお、上記ディジタル処理回路6はディジタル信号の処
理機能の他、各種のクロックの作成機能を有しており、
本実施例ではそのうちの同図(C)に示すようなPSK
期間にON、FM期間にOFFとなるクロックをサンプ
ルホールド回路工4の制御パルスとして用いるものであ
る。
In addition to the digital signal processing function, the digital processing circuit 6 has various clock generation functions.
In this example, PSK as shown in the same figure (C) is used.
A clock that is ON during the FM period and OFF during the FM period is used as a control pulse for the sample and hold circuit 4.

同図(C)に示すサンプルホールド回路14の入力側の
スイッチ14aは同図山)に示す制御パルスに同期して
0N10FFする。即ち、同期検波回路11がPSK変
調信号とVCOIOの出力信号との同期検波を行なう期
間では、サンプルホールド回路14の入力側のスイッチ
14aはONの状態で、コンデンサ14bに電荷が充放
電される。そして、同期検波回路11の入力信号が、F
M変調信号である間は、同図(C)の入力側のスイッチ
14aはOFFの状態で、サンプルホールド回路14の
出力は、コンデンサ14bの電荷で一定電圧になる。V
COIQの出力信号の発振周波数はサンプルホールド回
路14の出力電圧で制御されているが、サンプルホール
ド回路14の出力電圧は、上記のように変動が少ないの
で、VCOIOの出力信号は安定している。故に帯域増
幅器8の出力信号がPSK信号である期間、その初めの
期間より同期検波回路11の同期検波が安定に行なわれ
る。こうしてPSK復調出力端子13には、音声信号期
間の最初から正しく PSK復調された音声データが得
られる。
The switch 14a on the input side of the sample and hold circuit 14 shown in FIG. That is, during a period in which the synchronous detection circuit 11 performs synchronous detection of the PSK modulation signal and the output signal of the VCOIO, the switch 14a on the input side of the sample and hold circuit 14 is in the ON state, and the capacitor 14b is charged and discharged. Then, the input signal of the synchronous detection circuit 11 is F
While the signal is an M modulated signal, the switch 14a on the input side of the figure (C) is in an OFF state, and the output of the sample and hold circuit 14 becomes a constant voltage due to the charge of the capacitor 14b. V
The oscillation frequency of the COIQ output signal is controlled by the output voltage of the sample and hold circuit 14, but since the output voltage of the sample and hold circuit 14 has little fluctuation as described above, the VCOIO output signal is stable. Therefore, the synchronous detection of the synchronous detection circuit 11 is performed stably from the beginning of the period in which the output signal of the band amplifier 8 is a PSK signal. In this way, the PSK demodulation output terminal 13 receives audio data that has been correctly PSK demodulated from the beginning of the audio signal period.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明に係るキャリア再生回路によれ
ば、VCOに加わる′MIFB電圧を、複合信号がFM
変調信号に変わる直前のPSK変調信号期間の安定な値
をサンプルホールドして得たものとしたので、簡単な回
路構成で正しいPSK復調が可能となるものが得られる
効果がある。
As described above, according to the carrier regeneration circuit according to the present invention, the composite signal converts the 'MIFB voltage applied to the VCO into FM
Since the stable value of the PSK modulation signal period immediately before changing to the modulation signal is sampled and held, there is an effect that accurate PSK demodulation can be obtained with a simple circuit configuration.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例によるキャリア再生回路を
用いた受信機のブロック図、第2図はMUSE方式の伝
送形式を示す図、第3図は従来のキャリア再生回路を用
いた受信機のブロック図、第4図は第1図のサンプル六
−ルド回路の構成とその入力信号、制御信号の形式を示
す図である。 図において、lは入力端子、2は選局部、3は帯域増幅
器、4はFM復調器、5ばA/D変換器、6はディジタ
ル処理回路、7はディジタル画像出万端子、8は帯域増
幅器、9は制御回路、lOは■C0111は同期検波回
路、12はキャリア再生回路、13はPSK復調出力端
子、14はサンプルホールド回路である。 なお図中同一符号は同−又は相当部分を示す。
Fig. 1 is a block diagram of a receiver using a carrier regeneration circuit according to an embodiment of the present invention, Fig. 2 is a diagram showing a MUSE transmission format, and Fig. 3 is a receiver using a conventional carrier regeneration circuit. FIG. 4 is a block diagram showing the configuration of the sample six-handed circuit shown in FIG. 1 and the formats of its input signals and control signals. In the figure, l is an input terminal, 2 is a tuning section, 3 is a band amplifier, 4 is an FM demodulator, 5 is an A/D converter, 6 is a digital processing circuit, 7 is a digital image output terminal, and 8 is a band amplifier. , 9 is a control circuit, lO is ■C0111 is a synchronous detection circuit, 12 is a carrier regeneration circuit, 13 is a PSK demodulation output terminal, and 14 is a sample and hold circuit. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

【特許請求の範囲】[Claims] (1)FM変調された映像信号と時分割圧縮PSK変調
されたPCM音声信号とからなる複合信号から、映像信
号をFM復調しPCM音声信号をPSK復調する機能を
有する受信機に用いられるキャリア再生回路において、 上記複合信号の再生キャリアを発振するための電圧制御
発振器と、 上記複合信号がPSK変調信号である期間の上記電圧制
御発振器の出力信号の位相と周波数とを制御する制御回
路と、 上記電圧制御発振器と上記制御回路との間に設けられ上
記複合信号がFM変調信号である期間はその直前のPS
K変調信号の期間にサンプルした上記制御回路の安定な
出力信号をホールドするサンプルホールド回路とを備え
たことを特徴とするキャリア再生回路。
(1) Carrier regeneration used in a receiver that has the function of FM demodulating the video signal and PSK demodulating the PCM audio signal from a composite signal consisting of an FM modulated video signal and a time-division compressed PSK modulated PCM audio signal In the circuit, a voltage controlled oscillator for oscillating a reproduced carrier of the composite signal; a control circuit for controlling the phase and frequency of the output signal of the voltage controlled oscillator during a period in which the composite signal is a PSK modulated signal; During the period in which the composite signal provided between the voltage controlled oscillator and the control circuit is an FM modulation signal, the immediately preceding PS
A carrier regeneration circuit comprising: a sample and hold circuit that holds a stable output signal of the control circuit sampled during the period of the K modulation signal.
JP60209619A 1985-09-20 1985-09-20 Carrier recovery circuit Pending JPS6269754A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60209619A JPS6269754A (en) 1985-09-20 1985-09-20 Carrier recovery circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60209619A JPS6269754A (en) 1985-09-20 1985-09-20 Carrier recovery circuit

Publications (1)

Publication Number Publication Date
JPS6269754A true JPS6269754A (en) 1987-03-31

Family

ID=16575793

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60209619A Pending JPS6269754A (en) 1985-09-20 1985-09-20 Carrier recovery circuit

Country Status (1)

Country Link
JP (1) JPS6269754A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63187935A (en) * 1987-01-30 1988-08-03 Sharp Corp Pll circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63187935A (en) * 1987-01-30 1988-08-03 Sharp Corp Pll circuit

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