JP2986800B2 - Multiplex transmission signal regeneration device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiplex transmission system, and in particular, modulates a carrier orthogonal to an amplitude-modulated carrier with a multiplex signal, and combines the carrier with an amplitude-modulated signal to transmit the modulated signal. And a multiplex transmission signal reproducing apparatus for receiving the orthogonal multiplex transmission signal.

[Conventional technology]

Conventionally, a method and apparatus for multiplexing and transmitting other information to a means for transmitting a television signal by a kind of amplitude modulation is disclosed in
As described in JP-A-63-54084, a quadrature modulation system for modulating a carrier having a quadrature phase relationship with a video carrier with other information, combining the modulated carrier with a video carrier modulated with a video signal, and transmitting the same. Transmission and reception signal processors were known.

When the multiplex signal is a digital signal, a clock signal for strobed the digital signal is required, and a device for reproducing the clock signal is disclosed in Japanese Patent Publication No. Sho 61-44422. A complicated circuit configuration is required, such as a configuration in which two negative feedback loops, a PLL circuit based on a signal and a loop that negatively feedbacks the frequency difference between its VCO output and another VCO output, are duplicated.

[Problems to be solved by the invention]

The above prior art does not take into account detailed multiplex signal processing such as a reference signal and operation clock for multiplex signal processing in reception demodulation of an orthogonal multiplex transmission signal, and multiplex signal processing in reception demodulation may become unstable. It is an object of the present invention to stabilize it.

An object of the present invention is to receive and demodulate a multiplexed signal transmitted by orthogonal multiplexing in a stable and simple configuration.

[Means for solving the problem]

The above object is to reproduce a reference signal such as a clock signal of a signal transmitted by amplitude modulation as a reference signal such as a clock signal for demodulating a multiplex signal transmitted by orthogonal multiplexing, or to transmit the signal by amplitude modulation. This is achieved by reproducing a reference signal such as a clock signal reproduced based on both the reproduced signal and the multiplexed signal.

[Action]

A reference signal such as a clock signal for demodulating the multiplex signal is reproduced with reference to a reference signal such as a clock signal obtained from a signal transmitted by amplitude modulation that is synthesized and multiplexed and transmitted at a higher level than the multiplex signal. Alternatively, a reference signal such as a clock signal for demodulating a multiplex signal is reproduced based on a reference signal such as a clock signal obtained based on both the signal transmitted by the amplitude modulation and the multiplex signal. As a result, the obtained reference signal such as a clock signal becomes stable, so that the multiplexed signal can be demodulated stably.

〔Example〕

Hereinafter, embodiments of the present invention will be described with reference to the drawings. First
FIG. 1 shows an embodiment of a multiplex signal reproducing apparatus according to the present invention. 101
Is an antenna, 102 is a high-frequency amplifier circuit, 103 is a frequency conversion circuit, 104 is a carrier recovery circuit, 105 and 106 are synchronous detection circuits, 10
7 is a demodulation reference signal reproducing circuit, 108 is a signal processing circuit for an amplitude modulated transmission signal, 109 is a multiplexed signal processing circuit, 110 is a signal output terminal for an amplitude modulated transmission signal, and 111 is a signal output terminal for a multiplexed signal.

The multiplex transmission signal input from the antenna 101 is amplified by the high-frequency amplifier circuit 102, frequency-converted to an intermediate frequency for demodulation by the frequency conversion circuit 103, and amplitude-synchronized by the synchronous detection circuit 105 using the carrier reproduced by the carrier reproduction circuit 104. Obtain the modulated and transmitted signal. On the other hand, the synchronous detection circuit 10 uses an orthogonal carrier orthogonal to the carrier reproduced by the carrier regeneration circuit 104.
In step 6, the multiplexed signal modulated and transmitted by the component orthogonal to the amplitude modulation component of the carrier is detected and demodulated. Synchronous detection circuit 105
A demodulated reference signal reproduction circuit 10 demodulates a reference signal for demodulating the signal detected and amplitude-modulated and transmitted.
The signal obtained in step 7 and transmitted after being amplitude-modulated is processed by the signal processing circuit 1.
The signal is demodulated by 08 and obtained at the signal output terminal 110. The multiplexed signal detected by the synchronous detection circuit 106 is demodulated using a multiplexed signal demodulation signal reproduced based on the reference signal obtained by the demodulation reference signal reproduction circuit 107.

Generally, in orthogonal multiplex transmission, signals to be multiplexed with an amplitude modulated signal are multiplexed by carrier suppressed amplitude modulation, or orthogonal multiplexing is performed to reduce interference to an envelope detection receiver and improve compatibility. In order to reduce the level or the like, generally, a reproduction signal of a demodulation circuit for an amplitude modulation signal can obtain a more stable demodulation signal. As a result, according to the present embodiment, since the demodulation reference signal is obtained from the signal subjected to the amplitude modulation transmission, there is an effect that the multiplexed signal can be demodulated stably.

FIG. 2 shows an example of a device for generating a signal received by the receiver shown in FIG. 1, and FIG. 3 shows a vector diagram showing the principle of orthogonal multiplexing.

FIG. 2 shows an example of a transmitter for generating a multiplex transmission signal.
201 is an input terminal of a signal transmitted by amplitude modulation, 202 is an input terminal of a multiplexed signal, 203 is a signal processing circuit of a signal transmitted by amplitude modulation, 204 is a reference signal generation circuit such as a signal used for signal processing, 205 Is a multiplex signal processing circuit, 206 is a carrier generation circuit, 207 is an amplitude modulation circuit, 208 is a phase shift circuit, 209 is a carrier suppression amplitude modulation circuit, 210 is a synthesis circuit, and 211 is an antenna.

The signal transmitted by the amplitude modulation applied to the input terminal 201 is processed by the signal from the reference signal generation circuit 204 in the signal processing circuit 203, and the amplitude modulation circuit is processed by the signal.
At 207, the carrier of the carrier generation circuit 206 is amplitude-modulated. On the other hand, the multiplexed signal applied to the multiplexed signal input terminal 202 is processed by the signal from the reference signal generating / reproducing circuit 204 in the multiplexed signal processing circuit 205, and the carrier wave generating circuit 206
Then, the orthogonal carrier that has passed through the phase shift circuit 208 is subjected to carrier suppression amplitude modulation. These modulated signals are combined by the combining circuit 210 and transmitted from the antenna 211.

According to the above-described embodiment, since the signal is processed based on the signal of the reference signal generation circuit 204, it can be stably reproduced by the reproducing apparatus shown in FIG.

Next, FIG. 3 shows a vector diagram of the principle of orthogonal multiplexing modulated and transmitted. 301 is the amplitude-modulated carrier vector 302, 303 is the vector modulated by the multiplex signal, 30
4,305 is a composite vector of them.

The carrier vector 301 is amplitude-modulated and changes up and down. However, here, only the carrier for indicating the change due to the multiplex signal is shown. Assuming that the signal is modulated up to ± A by the multiplex signal, the vector is increased to ± A according to the multiplex signal.
Up to 2,303 orthogonal components are modulated, so carrier vector 3
01 changes in the range from the 301 to the combined vectors 304 and 305. The composite vector E of the maximum value is shown by an equation.

E = cosωct ± Asinωct (1) Here, ωc is the angular frequency of the carrier, and t is the time. When this equation is transformed to correspond to the composite vectors 304 and 305, It can also be shown. Here, θ = tan ⁻¹ (A) (3)

When this signal is envelope detected Is obtained and the difference from 1 synchronously detected by cosωct is shown as interference Δ, Where A is 0.25 and Δ is about 0.03 (about -30 dB). That is, if amplitude modulation broadcasting without a multiplex signal has already been performed and if one wishes to multiplex-transmit the broadcast by orthogonal multiplexing, an existing receiver has a receiver of envelope detection or a detection method similar thereto. It is better to lower the multiplex level A in consideration of broadcasting compatibility. When receiving a broadcast with A lowered in order to obtain such compatibility, the reproducing apparatus of the system shown in FIG. 1 is effective for obtaining more and more stable reproduction.

FIG. 4 shows another embodiment of the multiplex signal reproducing apparatus of the present invention. Reference numeral 401 denotes a demodulation reference signal reproducing circuit, and those having the same reference numerals as those in FIG. 1 have the same functions.

In this embodiment, both the signal transmitted by the amplitude modulation and the multiplexed signal are added to the demodulation reference signal reproduction circuit 401,
The reference signal is reproduced using one or both of them.

According to this embodiment, since the reference can be obtained from one or both of the signal transmitted by the amplitude modulation and the multiplex signal, there is an effect that the multiplex signal can be demodulated stably.

FIG. 5 shows an embodiment of the reproducing apparatus according to the present invention when a digitally encoded signal of a television signal is transmitted as a multiplex signal.

501 is an antenna, 502 is a high-frequency amplifier, 503 is a frequency converter, 504 is an IF filter, 505 is an intermediate frequency amplifier, 506 is a video signal detector, 507 is a video signal output terminal,
508 is an audio intermediate frequency amplification circuit, 509 is an audio FM detection circuit, 51
0 is an audio signal output terminal, 511 is a band pass filter, 512 is a carrier recovery circuit, 513 is a synchronous detection circuit, 514 is a demodulation reference signal recovery circuit, 515 is a synchronization separation circuit, and 516 is a PLL (Phase Loc
ked Loop circuit), 517 is a delay circuit, 518 is a code identification circuit,
519 is a digital signal processing circuit, and 520 is a digital signal output terminal.

A television signal input from an antenna 501 is amplified by a high-frequency amplifier circuit 502, frequency-converted to an intermediate frequency for demodulation by a frequency conversion circuit 503, and amplified by an intermediate-frequency amplifier circuit 505 via an IF filter 504. Tuning is performed by changing the local oscillation frequency of the frequency conversion circuit 503. The video signal band is detected by the video signal detection circuit 506 from the signal amplified by the intermediate frequency amplification circuit 505, and the video signal is obtained at the video signal output terminal 507. The audio signal band is amplified by an audio intermediate frequency amplification circuit 508, and detected and demodulated by an audio FM detection circuit 509 to obtain an audio signal at an audio signal output terminal 510. The above is the same as the conventional television receiver.

In addition to the above, in order to demodulate the digitally encoded signal, a band-pass filter 5 is output from the output of the frequency conversion circuit 503.
11 selects and amplifies the digital signal transmission band multiplexed and transmitted, and modulates in the synchronous detection circuit 513 with a component orthogonal to the amplitude modulation component of the carrier using a signal synchronized with the carrier reproduced by the carrier regeneration circuit 512. The demodulated signal is detected and demodulated. The signal is digitally encoded by a code identification circuit 518 at a point with a small error rate (a so-called maximum opening of an eye pattern) using a clock signal obtained from a video signal by a demodulation reference signal reproduction circuit 514 . The digital code is subjected to signal processing such as detection and correction of an error occurring during transmission in a digital signal processing circuit 519, and is obtained at a digital signal output terminal 520. As an example of obtaining a clock signal based on a video signal, assuming that a horizontal synchronization signal and a clock signal of the video signal have a certain rule, a horizontal synchronization signal is separated from the video signal by a sync separation circuit 515, and the A clock signal according to the rules is output, and the timing is adjusted by a delay circuit 517 to perform digital encoding at a time corresponding to the maximum opening of the eye pattern, thereby obtaining a clock signal. Note that the sync separation circuit 515 may share the same one used in the video signal processing circuit of a general television receiver. Further, a configuration similar to the configuration in FIG. 1 using the output of the carrier recovery circuit 512 as the video detection circuit 506 as a synchronous detection circuit may be used.

According to the present embodiment, digital encoding can be performed in the code identification circuit 518 by the clock signal obtained by the demodulation reference signal reproduction circuit 514 , so that the clock signal can be a stable signal with little jitter, and the multiplexed signal can be stabilized. There is an effect that can be reproduced.

In order to regenerate the clock signal from the output signal of the synchronous detection circuit 513, as shown in the conventional example or the embodiment of Japanese Patent Application Laid-Open No. 61-44422, Q is required until the PLL is pulled in.
It is necessary to use a PLL that switches the response of a loop having a high Q when used or a double-loop PLL. However, in the above embodiment, the synchronization signal is a stable signal with a fixed period, and The loop response is a high Q PL
This is equivalent to L, and its output is only adjusted by the delay circuit 517. Therefore, the effect of this embodiment is that the multiplexed signal can be reproduced stably and the configuration is simple.

Next, the relationship between the multiplexed signal demodulated in this embodiment and the synchronization signal will be described with reference to a timing chart. FIG. 6 is an example of the timing chart.

601 is a horizontal synchronizing signal, 602 is a clock signal, 603 is a multiplex signal, and 604 is a code-identified multiplex signal.

Consider the signal for synchronization by the synchronization signal separation circuit 515 clock signal 602 the time T ₀ and T ₁₂ is the output signal of the horizontal synchronization signal 601 to the PLL516 a delay circuit 517 which is the output signal of the demodulation reference signal reproducing circuit 514 . When entering the 6 clock signals during one horizontal scanning period, i.e. 6 data from A1 in A6 within one horizontal scanning period T _12, for example, from T ₀ indicates an example in which the multiplex transmission. Multiplexed signal 603 is the output signal of the synchronous detection circuit 513, a central portion (such as the time T _1, T ₃₎ of the described signal like A1 or A2 is Dijiru encoded in the wide part of the opening of the so-called eye pattern Sometimes the error rate is low,
Since the error rate is large at the change point of the multiplexed signal such as times T ₀ and T ₂ , the falling edge of the clock signal 602 (time T ₁ , T ₃ , T ₅
.., Etc.) in the code identification circuit 518.

 FIG. 7 shows another example of the timing chart.

701 is a horizontal synchronization signal, 702 is a clock signal, 703 is a multiplex signal, and 704 is a code-identified multiplex signal.

The difference from FIG. 6 is that the clock signal 702 becomes 17 clocks in four cycles of the horizontal synchronization signal 701, and shows a case where a multiplexed signal of 4.25 data is transmitted in one horizontal scanning period. The PLL 516 may be configured so that the times T ₀ and T ₃₄ have one cycle, and the timing of digital encoding is the falling edge of the clock signal 702 as in FIG.

 FIG. 8 shows another example of the timing chart.

801 is a horizontal synchronization signal, 802, 803, 804 are clock signals, 80
5 is a multiplex signal and 806 is a code-identified multiplex signal.

In this example, the multiplex signal is synchronized with the horizontal synchronization signal, but there is no integer multiplex signal in one horizontal synchronization signal, and only the period of the last multiplex signal is slightly longer. The horizontal synchronization signal 801 and the clock signals 802 and 803 are synchronized, and the rising edge of the clock signal 802 and the horizontal synchronization signal 801 are synchronized.
Since the synchronized at time T _0, is synchronized at time T ₁₇ the rising and horizontal synchronizing signal 801 of the clock 803, from the time T ₀
Creating a clock signal 804 is switched and a clock signal 803 from the clock signal 802 and the time T ₁₇ to T ₁₆ to T _31, the code identified multiplexed signal 806 is obtained if digital encoding at the trailing edge of the clock signal Can be

Next, FIG. 9 shows an example of an apparatus for generating a signal to be multiplex-transmitted as a multiplexed signal obtained by digitally encoding the television signal received in FIG.

901 is an audio signal input terminal, 902 is an FM modulation circuit, 903 is an audio signal carrier generation circuit, 904 is a video signal input terminal, 905 is a reference signal generation circuit, 906 is a video signal processing circuit, 907 is a video signal carrier generation circuit, 908 is an amplitude modulation circuit, 909 is a VSB filter, 910 is a synthesis circuit, 911 is an antenna, 912 is a digital signal input terminal, 913 is a digital signal processing circuit, 914
Is a low-pass filter, 915 is a phase shift circuit, 916 is a carrier suppression amplitude modulation circuit, 917 is an equalizer, and 918 is a combining circuit.

An audio signal carrier from an audio signal carrier generation circuit 903 is FM-modulated by an FM modulation circuit 902 with an audio signal from an audio signal input terminal 901. The video signal input to the video signal input terminal 904 is subjected to signal processing in the video signal processing circuit 906 in accordance with the output signal of the reference signal generation circuit 905, and the amplitude modulation circuit 908
Is added to In the amplitude modulation circuit 908, the video carrier from the video carrier generation circuit 907 is amplitude-modulated and then converted into a residual sideband amplitude modulation signal by the VSB filter 909, combined with the audio signal carrier in the synthesis circuit 910 and transmitted from the antenna 911. Is done.

The above is the same as the conventional terrestrial transmission television broadcast. The following is added to multiplex and transmit a digital signal to the above signals. The digital signal applied to the digital input signal input terminal 912 is taken in the digital signal processing circuit 913 in accordance with the clock signal output from the reference signal generation circuit 905, signal processed, and low-passes unnecessary components. Delete with filter 914. With this digital signal, the orthogonal carrier wave shifted through the phase shift circuit 915 is subjected to carrier suppression amplitude modulation (also referred to as PSK in digital modulation). Via the Nyquist characteristic of the IF filter of the receiver and the equalizer 917 which shows the characteristic symmetrical with respect to the video signal carrier frequency, it is combined with the video signal carrier amplitude-modulated by the video signal in the combining circuit 918 and transmitted from the antenna 911. Is done. Generally, VSB
The frequency of the filter 909 etc. uses a fixed frequency such as 38.9MHz, and the VHF band or UHF band transmitted from the antenna
In many cases, frequency conversion is performed between different carrier frequencies depending on the channel of the band, but this is omitted here for simplification of the explanatory diagram. The necessity of the equalizer 917 has been discussed in Japanese Patent Application Laid-Open No. 63-54084, which is shown as a conventional example, and will not be described here.

According to the present embodiment, the video signal and the multiplex signal are changed according to the signal of the reference signal generation circuit 905 in FIG. 6, FIG.
Since transmission can be performed synchronously as shown in FIG.
As shown in the figure, there is an effect that the reproducing apparatus for receiving and demodulating operates stably.

FIG. 10 shows another embodiment of the reproducing apparatus of the present invention in the case where a signal obtained by digitally encoding a television signal is transmitted as a multiplex signal.

1001 is a phase difference detection circuit, 1002 is a variable delay circuit,
The same reference numerals as those in FIG. 5 indicate the same functions.

The clock signal which is the output signal of PLL516 is a variable delay circuit
The signal is delayed by 1002 and sent to the code identification circuit 518. on the other hand,
The phase difference between the delayed clock signal and the output signal of the synchronous detection circuit 513 is obtained by the phase difference detection circuit 1001, and negative timing is fed back to the control input of the variable delay circuit 1002 to adjust the timing of digital encoding at the optimum point. Do.

According to the present embodiment, the stable clock signal obtained by the PLL 516 can be adjusted to the optimal timing for code identification of the output signal of the synchronous detection circuit 513, so that the multiplexed signal can be reproduced in a stable and optimal state. There is an effect that can be done.

FIG. 11 shows still another embodiment of the reproducing apparatus of the present invention in the case where a digitally encoded signal of a television signal is transmitted as a multiplex signal.

1001 is a phase difference detection circuit, 1101 is a multiplication circuit, 1102 is a phase detection circuit, 1103 is a low-pass filter, and the same reference numerals as those in FIG. 10 indicate the same functions.

10 illustrates a specific example of the phase difference detection circuit 1001 in FIG. When a multiplex signal having the same frequency rate as the clock signal frequency is a general digital signal, since the frequency component is up to half of the clock signal frequency, the multiplex signal output from the synchronous detection circuit 513 is multiplied by the multiplication circuit 1101 to obtain the clock signal. Extract frequency components. The phase of the extracted signal and the clock signal output from the variable delay circuit 1002 are compared by a phase detection circuit 1102, unnecessary components are deleted by a low-pass filter 1103, and negative feedback is provided to the variable delay circuit 1102.

By this negative feedback, the multiplexed digital signal can be digitally encoded at an optimum point.

Also in the present embodiment, the stable clock signal obtained by the PLL 516 can be adjusted with an appropriate time constant to an optimal timing for code identification of the output signal of the synchronous detection circuit 513, so that the multiplexed signal can be stably and optimally adjusted. There is an effect that can be reproduced.

FIG. 12 shows another embodiment of the reproducing apparatus of the present invention in the case of transmitting a digitally coded signal to a television signal as a multiplex signal.

Reference numeral 1201 denotes a frequency conversion circuit, and reference numeral 1202 denotes a band-pass filter. 11 is different from FIG. 11 in that the frequency conversion circuit 1201 and the bandpass filter 12 are used in order to lower the frequency for demodulating the digitally encoded and multiplexed signal to be lower than the frequency for demodulating the video signal.
02.

According to the present embodiment, the intermediate frequency of the output of the frequency conversion circuit 503 (58.75M for receiving terrestrial television broadcasting in Japan)
The demodulation of the video signal is carried out at a frequency of Hz, and the output of the frequency conversion circuit 503 is lowered to a lower frequency (for example, 6 MHz).
In z), the frequency is reduced by the frequency conversion circuit 1201 and the synchronous detection circuit 513 performs synchronous detection on the carrier reproduced by the carrier reproduction circuit 512. Therefore, the phase error due to the circuit delay time of the carrier reproduced by the carrier reproduction circuit 512 is reduced by the frequency. Is reduced, and there is an effect that a multiplexed signal can be stably reproduced.

Although the present embodiment shown in FIG. 12 shows FIG. 11 as an example, the embodiment shown in FIG. 10 and FIG.

FIG. 13 shows an embodiment of the reproducing apparatus of the present invention when an analog signal is multiplexed and transmitted as a multiplexed signal on a television signal.

1301 is a PLL, 1302 is a multiplexed signal processing circuit, 1303 is an output terminal of a multiplexed signal, and the same reference numerals as those in FIG. 5 indicate the same functions.

The multiplexed signal processing circuit 1302 performs signal processing using the reference signal obtained in the demodulation reference signal reproduction circuit 514 from the output signal of the video signal detection circuit 506. As an example of the demodulation reference signal regeneration circuit 514 , the output signal of the synchronization signal separation circuit 515 is
In addition to L1301, a signal having a certain relationship with the synchronization signal is obtained.

According to the present embodiment, since the multiplexed signal can be processed using the reference signal obtained by the demodulation reference signal reproducing circuit 514 , the multiplexed signal can be demodulated stably.

FIG. 14 shows an embodiment of the generator of the present invention as a device for generating a signal for multiplexing and transmitting a multiplex signal to the television signal received in FIG.

1401 is a reference signal generation circuit, 1402 is a multiplexed signal input terminal, 1403 is a multiplexed signal processing circuit, 1405 is a low-pass filter, 1406 is a carrier suppression amplitude modulation circuit, and those having the same reference numerals as those in FIG. 9 have the same functions. Is shown.

After the multiplexed signal applied to the multiplexed signal input terminal 1402 is subjected to signal processing in the multiplexed signal processing circuit 1403 according to the reference signal of the reference signal generation circuit 1401, the low-pass filter 14
At 05, unnecessary signals are removed and the carrier suppression amplitude modulation circuit 14
In addition, the orthogonal carrier wave that has been added to the signal 06 and shifted through the phase shift circuit 915 is subjected to carrier suppression amplitude modulation.

According to the present embodiment, since the video signal and the multiplexed signal can be processed and transmitted according to the signal of the reference signal generation circuit 1401,
As shown in FIG. 13, there is an effect that the reproducing apparatus for receiving and demodulating operates stably.

FIG. 15 shows another embodiment of the reproducing apparatus of the present invention when an analog signal is multiplexed and transmitted as a multiplexed signal to a television signal.

Reference numeral 1501 denotes a signal processing circuit for a video signal, and those having the same reference numerals as those in FIG. 13 have the same functions.

The signal processing of the video signal transmitted by the amplitude modulation is also performed in the signal processing circuit 1501 by the same reference signal as the multiplex signal which is the output signal of the PLL 1301, so when the multiplex signal related to the video signal is transmitted, Since similar signal processing is performed with similar reference signals, the consistency of the processed signals is improved.

According to this embodiment, since the multiplexed signal and the video signal are processed by the same reference signal, there is an effect that a stable and consistent demodulated output can be obtained.

FIG. 16 shows another embodiment of the generator of the present invention as a device for generating a signal for multiplexing and transmitting a multiplex signal to the television signal received in FIG.

Reference numeral 1601 denotes a signal processing circuit for a video signal, and those having the same reference numerals as those in FIG. 14 have the same functions.

After the video signal is signal-processed in the signal processing circuit 1601 according to the reference signal of the reference signal generation circuit 1401, it is processed and transmitted by the general video signal processing circuit 906.

According to the present embodiment, since the video signal and the multiplexed signal can be processed and transmitted according to the signal of the reference signal generation circuit 1401,
There is an effect that the reproducing apparatus shown in FIG. 15 operates stably and a demodulated output with good consistency is obtained.

FIG. 17 shows still another embodiment of the reproducing apparatus of the present invention in which an analog signal is multiplexed and transmitted as a multiplex signal on a television signal.

Reference numeral 1710 denotes a reference signal separation circuit, and the same reference numerals as those in FIG. 15 indicate the same functions.

Reference signal separation circuit 170 from the output signal of synchronous detection circuit 513
In 1, the reference signal is detected and separated, and is used as a reference of the demodulation reference signal reproduction circuit 514 together with the output of the synchronization separation circuit 515.
The output signal of the demodulation reference signal regeneration circuit 514 is converted into a signal processing circuit 150
1 and the reference signal of the multiplexed signal processing circuit 1302.

According to the present embodiment, the demodulation reference signal regeneration circuit 514 generates a demodulation reference signal based on the reference signal transmitted on the same transmission path as the multiplexed signal and the synchronization signal transmitted on the same transmission path as the video signal. Since it is used for processing a multiplexed signal and a video signal, there is an effect that a stable and well-matched demodulated output can be obtained.

FIG. 18 shows another embodiment of the reproducing apparatus of the present invention when an analog signal is multiplexed and transmitted as a multiplexed signal to a television signal.

Those having the same reference numerals as those in FIG. 12 or FIG. 13 indicate the same functions.

The difference from FIG. 13 is that a frequency conversion circuit 1201 and a bandpass filter 1202 are provided in order to lower the frequency for demodulating the multiplexed signal from the frequency for demodulating the video signal.

According to this embodiment, there is an effect that a multiplexed signal can be stably reproduced as in FIG.

Although FIG. 13 is shown as an example in the embodiment shown in FIG. 18,
Similar implementations and effects can be expected in the case of FIG. 15 or FIG.

〔The invention's effect〕

According to the present invention, since a reference signal for demodulating a multiplexed signal is obtained from both a signal transmitted by amplitude modulation and a multiplexed signal, there is an effect that a multiplexed signal can be demodulated stably.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of the signal reproducing apparatus of the present invention, FIG. 2 is a block diagram showing one embodiment of the signal generating apparatus of the present invention, FIG. FIG. 4 is a block diagram showing another embodiment of the signal reproducing apparatus of the present invention, FIG. 5 is a block diagram showing still another embodiment of the signal reproducing apparatus of the present invention, and FIGS. FIG. 9 is a signal timing chart in an embodiment of the present invention, FIG. 9 is a block diagram showing another embodiment of the signal generating apparatus of the present invention, and FIG. 10 is a block diagram showing still another embodiment of the signal reproducing apparatus of the present invention. FIG. 11 is a block diagram showing still another embodiment of the signal reproducing apparatus of the present invention, FIG. 12 is a block diagram showing still another embodiment of the signal reproducing apparatus of the present invention, and FIG. FIG. 14 is a block diagram showing another embodiment of the signal reproducing apparatus. FIG. 14 is a signal reproducing apparatus according to the present invention. FIG. 15 is a block diagram showing still another embodiment of the signal reproducing apparatus of the present invention, and FIG. 16 is a block diagram showing still another embodiment of the signal reproducing apparatus of the present invention. FIG. 17 is a block diagram showing still another embodiment of the signal reproducing apparatus of the present invention.
The figure is a block diagram showing still another embodiment of the signal reproducing apparatus of the present invention. 107, 401, 514 ... demodulation reference signal reproducing device, 109, 205 ... multiplexed signal processing circuit, 209, 916, 1406 ... carrier wave suppression amplitude modulation, 518 ... code identification circuit, 519, 913 ... digital signal processing circuit, 1201 ... frequency conversion circuit , 1302,1403 ... Multiple signal processing circuit.

Claims (8)

(57) [Claims] An amplitude-modulated carrier, a quadrature carrier having a quadrature relationship with said carrier and modulated with a multiplex signal,
An apparatus for receiving and reproducing a multiplex transmission signal that is synthesized and transmitted, comprising: a carrier recovery circuit for recovering a carrier from the multiplex transmission signal; and the multiplex transmission for obtaining the multiplex signal from an output signal of the carrier recovery circuit. A synchronous detection circuit for detecting a signal, a detection circuit for detecting the multiplexed transmission signal to obtain a signal transmitted by the amplitude modulation, a reference signal reproduction circuit for extracting a reference signal necessary for signal processing from an output signal of the detection circuit, A first signal processing circuit for processing an output signal of the detection circuit by an output signal of the reference signal reproduction circuit; a second signal processing for processing an output signal of the synchronous detection circuit by an output signal of the reference signal reproduction circuit A multiplex transmission signal reproducing device comprising a circuit. 2. The multiplex transmission signal according to claim 1, wherein said reference signal reproduction circuit extracts a reference signal necessary for signal processing from one or both output signals of said detection circuit and said synchronous detection circuit. Playback device. 3. The multiplex transmission signal reproducing apparatus according to claim 1, wherein the signal transmitted by the amplitude modulation is a video signal, and the detection circuit is a video detection circuit. 4. The multiplex transmission signal reproducing apparatus according to claim 1, wherein said first signal processing circuit is a video signal processing circuit. 5. The multiplex transmission signal reproducing apparatus according to claim 1, wherein said amplitude modulation is vestigial sideband amplitude modulation, and a horizontal synchronizing signal is used as an output signal of said reference signal reproducing circuit. 6. The multiplex transmission signal reproducing apparatus according to claim 5, wherein a signal which is an integral multiple of a horizontal synchronizing signal is obtained as an output signal of said reference signal reproducing circuit. 7. The multiplex transmission signal reproducing apparatus according to claim 1, wherein said multiplex signal is a digital signal. 8. The strobe circuit according to claim 7, wherein the second signal processing circuit comprises a strobe circuit for digital signals, and an output signal of the reference signal reproducing circuit is a strobe clock signal of the strobe circuit. Multiplexed signal reproduction device.