JPH0683281B2 - Carrier wave extraction circuit - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a carrier wave extracting circuit used in a demodulator for digital satellite communication, and more particularly to improvement of a carrier wave extracting circuit mainly composed of a phase locked loop.

(Prior Art) As a conventional carrier extraction circuit mainly composed of a phase locked loop, for example, the one shown in FIG. 2 is known. This carrier wave extracting circuit includes mixers 1, 2, low-pass filters 3, 4, phase detector 5, loop filter 6, voltage adder 7, voltage-controlled oscillator 8, It basically comprises a 90 ° shifter 9, a synchronization detector 10, and a sweeper 14.

A phase shift keying (PSK) modulation signal is applied to the input terminal T, and this PSK modulation signal becomes one input of the mixers 1 and 2. The other input of mixer 1 is the output of voltage controlled oscillator 8 and the other input of mixer 2 is the output of 90 ° shifter 9 which shifts the output of voltage controlled oscillator 8 90 °.

As a result, a baseband signal appears at the outputs of the mixers 1 and 2, and the baseband signal is supplied to the low-pass filter 3
Further, in 4 and 4, waveform shaping and noise low-pass are performed.
The outputs of the low-pass filters 3 and 4 are sent to the phase detector 5 and the synchronization detector 10. The outputs of the low-pass filters 3 and 4 are also sent to the outside, which is a demodulation signal for forming demodulation data during synchronization.

The phase detector 5 detects a phase error between the outputs of the low-pass filters 3 and 4, and sends it to the loop filter 6.
On the other hand, the synchronization detector 10 detects whether or not synchronization is achieved based on the outputs of the low-pass filters 3 and 4, and sends the result as a control signal to the loop filter 10 and the sweeper 14.

The loop filter 6 gives an output voltage corresponding to the phase error signal output from the phase detector 5 to one input of the voltage adder 7. It is well known that this loop filter operates to change its loop bandwidth to a narrower band when the output of the sync detector 10 indicates "sync detection".

The sweep signal is supplied from the sweeper 14 to the other input of the voltage adder 7, and the addition result of both inputs is supplied to the voltage controlled oscillator 8 as a control voltage.

Here, the sweeper 14 establishes an early synchronization in view of the fact that the difference between the input frequency and the output frequency of the voltage controlled oscillator 8 becomes larger than the loop bandwidth because the stability of the local oscillator on the satellite is not good. It was established with the aim of
In satellite communication, the input signal may be "disconnected", and in order to avoid the waste of re-execution of the synchronization operation when the signal is recovered, the sweep may be stopped when the synchronization is achieved. The illustrated example shows this.

A triangular wave voltage signal is used for the sweep signal, and the synchronization detector 10
Is applied to the other input of the voltage adder 7 during the period when the output of is indicating "non-synchronization detection". Also a sync detector
When the output of 10 indicates "synchronization detection", the signal level value of the sweep signal at that time is held and applied to the other input of the voltage adder 7. As the holding means, for example, a sample hold circuit is used.

By the action of the above phase lock loop, the carrier wave is extracted and reproduced from the input PSK modulated signal, that is, the reproduced carrier wave is obtained at the output of the voltage controlled oscillator 8.

Then, in the mixers 1 and 2, a baseband demodulation signal is obtained from the input PSK modulation signal based on the reproduced carrier wave, and this is sent to the outside via the low-pass filters 3 and 4, and desired demodulation data is obtained. Will be obtained.

(Problems to be Solved by the Invention) The conventional carrier wave extraction circuit has the following problems.

First, since the sweeper is configured to generate a triangular wave voltage signal which is an analog signal as a sweep signal, the sweep content is fixed and cannot be arbitrarily selected and set. Further, it is difficult to set the sweep width and the sweep speed with high accuracy because much adjustment time is required.

Next, since the sweep signal is an analog signal, even if the signal level is held by the sample hold circuit, the holding level changes due to "discharge".

Therefore, it is difficult to maintain the frequency of the voltage controlled oscillator when the input signal is "disconnected".

Furthermore, in the conventional circuit configuration, a large amount of loop gain is required to compress the error between the frequency of the input signal and the frequency of the voltage controlled oscillator during synchronization, that is, the stationary phase error to a negligible level. If the error becomes too large, it may be impossible to realize the required loop gain.

The present invention has been made in view of such conventional problems, and an object thereof is to perform an arbitrary sweep and to increase the accuracy of the sweep width and the sweep speed without adjustment and to increase the loop gain. An object of the present invention is to provide a carrier wave extraction circuit that can make the steady phase error less than a predetermined value.

(Means for Solving Problems) In order to achieve the above object, the carrier wave extracting circuit of the present invention has the following configuration.

That is, the carrier extraction circuit of the present invention includes a loop filter that outputs a voltage signal corresponding to a phase error between two demodulated signals generated by orthogonally detecting an input modulated signal by a reproduced carrier, and the reproduced carrier based on a control voltage. A phase-locked loop mainly including a voltage-controlled oscillator for outputting a carrier wave for demodulating data from an input modulated signal in a demodulator for digital satellite communication is used to extract and reproduce the carrier from the input modulated signal. And a sweep signal is generated in response to the output of a sync detector that detects whether or not synchronization is achieved based on the demodulated signal, and the control voltage of a voltage controlled oscillator that generates a reproduced carrier wave is set to the sweep signal and the loop. In a carrier extraction circuit configured to be formed by adding the output voltage of the filter; from the output voltage deviation of the loop filter A frequency shift detector for detecting force frequency deviation; to give a sweep value at a predetermined interval among the sweep values from the start point to the end point of the sweep signal when the output of the synchronization detector indicates "non-synchronization detection" Generating a digital value of at an appropriate time interval, and when the output of the synchronization detector indicates "synchronization detection", an appropriate time different from at least the time interval based on the output of the frequency shift detector. A controller for generating a desired digital value at intervals; a digital-analog conversion for converting the output of the controller into an analog signal and generating it as a sweep signal to be added to the output voltage of the loop filter Bowls;
It is a carrier wave extraction circuit characterized by including.

(Operation) Next, the operation of the carrier wave extracting circuit of the present invention configured as described above will be described.

In the sync pull-in process, the output of the sync detector indicates "no sync detected". Therefore, the controller generates a digital value for giving a sweep value at a predetermined interval among the sweep values from the start point to the end point of the sweep signal at appropriate time intervals.

Each of these digital values is converted into an analog signal by the digital-analog converter, and this becomes a sweep signal. At this time, the interval and generation interval of each digital value can be arbitrarily selected. Further, at the time of initial pull-in, any sweeping method can be used, such as which digital value to start with, or from the larger value to the smaller value.

Furthermore, the sweep width can be set to about twice the loop band width, and the sweep width and sweep speed can be set to a predetermined value with high accuracy without adjustment.

Therefore, the pull-in operation is performed at a high speed in the synchronous pull-in process.

When synchronized, the output of the sync detector becomes "sync detected" so that the controller generates the required digital value based on the output of the frequency shift detector at least at a time interval different from said time interval.

This becomes the sweep signal. At the time of synchronization, the loop filter has a narrow band, so the loop bandwidth also becomes narrow, but
Correspondingly, the sweep width can be reduced. In addition, the intervals and generation intervals of each digital value can be made smaller than in the above case, and the sweep method should be appropriate according to the output state of the frequency deviation detector (deviation in the positive direction or negative direction, etc.). be able to.

Therefore, since the loop gain does not have to be so large in this circuit, stable operation can be expected, and even if the deviation between the input frequency and the frequency of the voltage controlled oscillator is large, the steady phase error is larger than a certain value. I won't. It should be noted that whether or not to stop the sweep at the time of synchronization depends on the system specifications. However, in the present invention, since the sweep signal is generated digitally, it can be stably held when the sweep is stopped.

Therefore, the synchronization pull-in can be performed at high speed when the input signal is interrupted and then recovered.

As described above, according to the carrier wave extracting circuit of the present invention, since the sweep signal is generated digitally, arbitrary sweeping can be performed, and if necessary, the sweeping can be easily stopped and the holding thereof can be stabilized. Since this can be achieved, the synchronization pull-in can be performed at high speed.

High accuracy can be achieved without adjusting the sweep width and sweep speed. Further, since the contents of the sweep at the time of synchronization can be determined according to the input frequency deviation, the loop gain does not have to be so large, and stable operation can be expected. At this time, even if the deviation between the input frequency and the frequency of the voltage controlled oscillator is large, there is an advantage that the steady phase error does not become larger than a certain value.

(Example) Hereinafter, the Example of this invention is described with reference to drawings.

FIG. 1 shows a carrier wave extracting circuit according to an embodiment of the present invention. The same components as those of the conventional circuit shown in FIG. 2 are designated by the same reference numerals and the description thereof will be omitted.

This carrier wave extraction circuit converts the output digital value of the controller 11 into an analog signal from the controller 11 which generates a required digital value at appropriate time intervals, and supplies it to the other input of the voltage adder 7 as a sweep signal. Digital-to-analog converter
12 and a frequency deviation detector that detects the input frequency deviation from the output voltage deviation of the loop filter 6 and sends the detected content to the controller 11 with, for example, two control signals a and b.
13 and 13. It should be noted that the controller 11 includes the synchronization detectors 10 to 2
The control signals c and d of the book are input. The control signal c is a signal indicating whether or not synchronization is achieved, and this is also input to the loop filter 6. The control signal d is a command signal for sweep stop and its cancellation. For example, a stop command is issued when the input signal is "disconnected", and a cancel command is issued when the input signal is recovered.

The controller 11 can be configured in various ways, but in this embodiment, it is mainly configured by a counter. This counter can freely perform up-counting and down-counting, and the count value of this counter is given to the digital-analog converter 12.

At the time of initial pull-in, the content of the control signal c is "no synchronization detected".
Therefore, the controller 11 ignores the output of the frequency shift detector 13 and performs the following operation.

That is, the counter of the controller 11 starts the counting operation from an appropriate initial value. For example, the digital value corresponding to the low sweep frequency or the digital value corresponding to the center frequency is used as a starting point, and the digital values corresponding to the sweep value at that time are sequentially transmitted at appropriate time intervals. At this time, the interval of digital values and the interval of generation are larger than those at the time of synchronization, and the sweep width is about twice the loop band. It is clear that these can be made unadjusted and highly accurate with the sweep speed.

In this way, a quick pull-in operation is performed, and the synchronization state is established. At the time of synchronization, the content of the control signal c indicates "synchronization detection", so the controller 11 operates as follows according to the output state of the frequency shift detector 13, that is, the content of the control signals a and b.
That is, the contents of the control signals a and b are “1,0” or “0,1” when the output voltage deviation of the loop filter 6 is within the predetermined range.
Therefore, when the output voltage deviation is in the positive direction, it is "1,1", and when the output voltage deviation is in the negative direction, it is "0,0". It is supposed to be.

Then, the counter holds and outputs the count value at that time when the control signals a and b are "1,0" or "0,1", and outputs the count value at that time when it is "1,1". Up-counting is performed from the starting point, and conversely, when it is "0,0", the count value at that point is down-counting from the starting point.

In this way, the output voltage of the loop filter is controlled so that it always falls within a predetermined range. That is, the loop gain does not have to be so large, the control system is likely to operate stably, and the steady phase error is larger than a certain value even if the deviation between the input frequency and the output frequency of the voltage controlled oscillator 8 becomes large. It must not happen.

Note that the counter count operation during synchronization is such that the interval of digital values and the interval of generation are smaller than those during asynchronous operation, and the sweep width corresponds to that as the loop filter 6 narrows the band. And As described above, these can be performed with high accuracy without adjustment together with the sweep speed.

Next, when the input signal is “disconnected” during synchronization, the control signal c
Indicates "non-synchronization detection" and the control signal d indicates "stop sweep", so the counter of the controller 11 holds and outputs the count value at that time.

Since this hold output can be stably performed for an arbitrary time, the output frequency of the voltage controlled oscillator 8 is stably maintained for an arbitrary time. Then, when the input signal appears again, the control signal d indicates "release", so that the counter of the controller 11 can start the counting operation from a value that is a little lower than the held value.

Thus, the pull-in at the time of recovery of the input signal is performed at high speed.

(Effect of the Invention) As described above in detail, according to the carrier wave extracting circuit of the present invention, the sweep signal is generated digitally, so that any sweep can be performed, and if necessary, the sweep stop can be easily stopped. Since this can be done and the holding can be done stably, the synchronization pull-in can be performed at high speed. High accuracy can be achieved without adjusting the sweep width and sweep speed. Further, since the contents of the sweep at the time of synchronization can be determined according to the input frequency deviation, the loop gain does not have to be so large, and stable operation can be expected. At this time, even if the deviation between the input frequency and the frequency of the voltage controlled oscillator is large, there is an advantage that the steady phase error does not become larger than a certain value.

[Brief description of drawings]

FIG. 1 is a configuration block diagram of a carrier extraction circuit according to an embodiment of the present invention, and FIG. 2 is a configuration block diagram of a conventional carrier extraction circuit. 1,2 ... Mixer, 3,4 ... Low pass filter, 5 ... Phase detector, 6 ... Loop filter, 7 ... Voltage adder, 8 ...
… Voltage controlled oscillator, 9 …… 90 ° shifter, 10 …… Synchronous detector, 11 …… Controller, 12 …… Digital / analog converter, 13 …… Frequency shift detector, T …… Input terminal .

Claims (1)

[Claims] 1. A loop filter for outputting a voltage signal corresponding to a phase error of two demodulated signals generated by quadrature detection of an input modulated signal by a reproduced carrier wave, and a voltage control for outputting the reproduced carrier wave based on a control voltage. A demodulation device for a digital satellite communication mainly composed of a phase-locked loop including an oscillator and used for extracting and reproducing a carrier wave for demodulating data from the input modulation signal, the demodulation signal. Generate a sweep signal in response to the output of the synchronization detector that detects whether or not synchronization has been achieved based on the above, and the control voltage of the voltage controlled oscillator that generates the regenerated carrier wave is the sweep signal and the output voltage of the loop filter. In a carrier wave extraction circuit configured to be formed by adding the following: detecting an input frequency deviation from an output voltage deviation of the loop filter A frequency shift detector for controlling the frequency deviation, and a digital value for giving a sweep value at a predetermined interval among the sweep values from the start point to the end point of the sweep signal when the output of the sync detector indicates "unsynchronized" When the output of the synchronization detector indicates "synchronization detection", it is necessary to generate an appropriate time interval different from at least the time interval based on the output of the frequency shift detector. And a digital-analog converter for converting the output of the controller into an analog signal and generating it as a sweep signal to be added to the output voltage of the loop filter. A carrier wave extraction circuit characterized by the above.