JPS626363B2 - - Google Patents

Description

[Detailed description of the invention] This invention relates to gain control amplifiers.

Conventionally, gain control amplifiers include those in which the collector current of a grounded emitter or common base transistor is varied, and those in which a differential amplifier is used in combination. The former is commonly used as a discrete circuit, but because the bias conditions change, it is coupled using direct current, and the latter is widely used as an IC-based AGC circuit. However, it has the disadvantage that the noise figure NF is worse than the former, so it is not suitable for circuits that require low noise. In the former circuit, when the load of the amplifier is a resistor, the collector current is changed to change the gain, so the output potential changes, and in the case of an IC circuit connected directly to the next stage circuit, the bias condition of the next stage changes. This will change the . For example, as shown in Figure 1, when an amplifier 1 consisting of a common-emitter transistor is directly connected to the next stage differential amplifier 2, the base potential of the differential amplifier 2 changes by changing the gain. do. If a filter, etc. with high impedance for AC and low impedance for DC is connected between the bases of transistors 3 and 4 that make up differential amplifier 2, and the potentials of both bases are made to be the same, the differential amplifier becomes The device operates and gains can be obtained, but cross-modulation and saturation characteristics may deteriorate due to changes in bias conditions.

As shown in Figure 1, amplifier 1 and the next stage differential amplifier 2
When both are driven by the same power supply, if the gain is lowered by reducing the collector current of transistor 1, the voltage drop across load resistor 5 will be reduced, and the base potential of differential amplifier 2 will approach the power supply voltage. At this time, if the loads 6, 6 of the differential amplifier 2 are resistive loads, the collector-base voltages of the transistors 3, 4 become low and may become forward biased under certain conditions. Furthermore, even if the load of the differential amplifier is a reactive load where the DC potential does not change, the collector-base voltage will be low and approach OV. Under such bias conditions, not only the saturation characteristics of the differential amplifier 2 but also the cross-modulation characteristics deteriorate, which is not preferable as amplifier characteristics. FIG. 2 shows an example of cross-modulation characteristics and saturation characteristics when the collector-base voltage of the differential amplifier is changed.

Therefore, in order to prevent the collector-base voltage of the differential amplifier from falling below a certain level, the first step is to
It is also conceivable to provide a load resistor 5' shown by a dotted line in place of the load resistor 5 shown in the figure to provide a two-power supply system in which power is supplied to the amplifier 1 from the terminal 7'. In this case, the power supply voltage of the amplifier 1 may be made lower than the power supply voltage of the differential amplifier 2, but this causes the inconvenience that the collector-emitter voltage of the common-emitter amplifier 1 cannot be obtained sufficiently. Also, dual power supply
There are drawbacks such as the complexity of the circuit if it is carried out inside the IC, and the number of terminals on the package increases if it is supplied externally.

The object of the present invention has been made in view of the above circumstances, and is to provide a gain control amplifier with a grounded emitter that can be implemented as an IC without causing a large change in the bias conditions of the next stage. In particular, by setting the value of the resistor constituting this gain control amplifier to a specific value, the output voltage to the next stage is kept approximately constant even if the AGC voltage is changed.

FIG. 3 is a diagram showing an embodiment of the present invention.
In the figure, 10 is a gain control amplifier, which includes an amplification transistor 11 whose emitter is grounded, bias transistors 12 and 13, and a resistor.
Consists of _R14 to _R19 . For the sake of explanation, the voltage at each position is V _O , V _B as shown in the figure, and the current in the direction of the arrow is I ₁₁ , I ₁₂ ,
Let's say I ₁₃ and I ₁₇ . A gain control voltage V _A is applied to the base of the transistor 11 from a point A via a resistor R ₁₉ . Input IN (V _IN ) is applied directly to the base of transistor 11. On the other hand, the gain control voltage V _A from point A is also applied to the base of transistor 12 via resistor R ₁₈ . A collector current corresponding to that of the transistor 11 flows through the transistor 12 .

A base voltage V _B of the transistor 13 is determined by this collector current and bias resistors R ₁₆ and R ₁₇ , and a collector current I ₁₃ corresponding to the base voltage V B flows through the transistor 13 . The collector of the transistor 13 is connected to the collector of the transistor 11 in a direct current manner, and the collector of the transistor 11 is connected to the load resistor R15 _.
It is connected to the power supply terminal E20 via. or,
The collector current I ₁₃ of the transistor 13 is I ₁₃ =V _B /
It can be expressed as R ₁₄ . On the other hand, 21 is the next stage differential amplifier, which includes a pair of transistors 23 and 24 and a load 2.
5 and 26.

Therefore, the collector voltage of the transistor 11, that is, the base voltage V _O of the next stage differential amplifier 21
is determined by the sum of the collector currents of transistors 11 and 13 and the value of load resistance R ₁₅ (V _O =E−(I ₁₁ +I ₁₃ )R ₁₅ ). Therefore, if the sum of these collector currents is constant, the base voltage V _O of the differential amplifier 21 is also kept constant. now,
When the potential V _A at point A is lowered and the collector current I ₁₁ flowing through the transistor 11 is reduced, the collector current I ₁₂ of the transistor 12 is also reduced at the same time. Therefore, the voltage drop caused by the resistor R ₁₆ becomes smaller, the base voltage V _B of the transistor 13 becomes higher, and the collector current of the transistor 13 increases. At this time, when the resistors R ₁₄ , R ₁₆ and R ₁₇ have the following relationship, the sum of the collector currents of transistors 11 and 13 (I ₁₁
+I ₁₃ ) remains almost constant.

() When the emitter areas of transistors 11 and 12 are equal, R ₁₆・R ₁₇ (β-1) = R ₁₄ (R ₁₆ + R ₁₇ ) (β+1) where β=I ₁₃ /I _b : Current amplification factor () Transistor When the emitter areas of 11 and 12 are different and the ratio of emitter current to the same base voltage is 1:n, nR ₁₈ = R ₁₉ R ₁₆・R ₁₇ (nβ-1) = R ₁₄ (R ₁₆ + R ₁₇ ) (β+1) When the above relationship is substantially satisfied, the base voltage of the differential amplifier 21 is maintained at a substantially constant value even if the gain is controlled by the gain control amplifier 10 in the previous stage.

Below, the gain control amplifier 10 of FIG.
We will show the results of the analysis in the following cases. Using the values explained above, V _O = E-(I ₁₁ + I ₁₃ ) R ₁₅ ...... βI _b = I ₁₃ ...... V _B = R ₁₇・I ₁₇ ...... V _B = E-R _16(Ib + I ₁₂ + I ₁₇ ) ...... It is expressed as. Also, if the base-emitter voltages of transistors 12 and 13 are set as V _BE12 and V _BE13 , then V _A - V _BE12 /R ₁₈ β=I ₁₂ ≒ I ₁₁ ...... V _B - V _BE13 = R ₁₄・I ₁₃・The following relationship is derived: 1+β/β... So first, from the formula: V _B =E−R ₁₆ {I ₁₃ /β+I ₁₂ +V _B /R ₁₇ } From this and the formula Transform this formula to By substituting the expression and the expression into the expression The condition for the second term (V _A term) of this equation to be zero is: R ₁₆ R ₁₇ (β-1) = R ₁₄・(R ₁₆ +R ₁₇ )(β+1) When this is satisfied, the second term of the equation The third term (V _BE12 term) also becomes zero, and the first and fourth terms of the equation can be written as the following equation. In other words, ∴V ₀ ≒E (1-R ₁₅ /R ₁₆ ) +V _BE13・R ₁₅ /R ₁₄ (β≫1) In this way, as is clear from the analysis results of the gain control circuit 10, this configuration As mentioned above, when the value of _R14 is configured to be approximately equal to the value when _R16 and _R17 are connected in parallel, even if the AGC voltage is changed, the output voltage to the next stage differential amplifier 21 is becomes almost constant.

Next, Figure 4 is a reference example for the case () above, where the emitter current ratio of transistors 11 and 12 is 1:1/
6, R ₁₄ = 1KΩ, R ₁₆ = 23KΩ, R ₁₇ = 10KΩ, β
An example of the relationship between the emitter current and the collector voltage of the transistor 11 when the settings are 50, R ₁₈ = 6KΩ, and R ₁₉ =1KΩ is shown. The figure shows that the collector voltage remains almost constant regardless of the emitter current. By appropriately selecting the resistance value as in this example, the change in output voltage can be suppressed to 0.1V or less.

As described above, according to the present invention, even if gain control is performed, the bias conditions of the next-stage differential amplifier do not change significantly, so that deterioration of cross-modulation characteristics, etc. does not occur. In addition, the power supply can be shared with the next-stage differential amplifier, and it can also be easily integrated into an IC. In particular, the above relational expression is optimal for ICs where the resistance ratio can be easily controlled, since the condition is satisfied only by the resistance ratio if β is large.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing the prior art, Fig. 2 is a characteristic diagram of the circuit shown in Fig. 1, Fig. 3 is a diagram showing an embodiment of the present invention, and Fig. 4 is a reference when the emitter current ratio is different. FIG. 3 is a diagram showing characteristics of an example. 10... Gain control amplifier, 11... Amplifying transistor, 12, 13... Bias transistor, 15... Load resistor.

Claims (1)

[Scope of Claims] 1. A first transistor whose emitter is grounded and whose collector is connected to a power supply via a load resistor; and a first transistor whose collector is DC connected to a connection point between this transistor and the load resistor and whose emitter is grounded and whose collector is connected to a power supply via a load resistor. is the first
a second transistor grounded through a resistor; and a second transistor connected in series between the power supply and the ground point.
and a third resistor, a connection point between the second and third resistors, and the second resistor.
a third transistor whose collector is connected to the base of the transistor and whose emitter is grounded; and a fourth transistor which is connected to the bases of the first and third transistors and to which a gain control voltage is applied.
and a fifth resistor, wherein the resistance value of the second and third resistors when connected in parallel is set to be equal to the resistance value of the first resistor. .