JPS6263465A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To cancel noises to a neighboring signal line, by generating complementary signals based on a specified signal, arranging signal lines for said two signals in a symmetrical pattern so that said two signal lines are twisted at a constant pitch. CONSTITUTION:Based on a signal line 1, signal lines 2 and 3, which have a complementary relationship, is formed. The two lines are twisted at a constant pitch. Capacitances 1 and 2 and 3 and 4 are perfectly equal. Coupling noises 1 and 2 to a signal line 4 are 180 deg. out of phase perfectly and cancelled. Therefore, the noises do not appear on the signal line 4.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention applies to semiconductor integrated circuits, in which circuit errors are caused by coupling noise between signal lines. Prevent h crop.

[Conventional technology]

Conventionally, in a semiconductor integrated circuit device 1'lP, a normal signal Ii! as shown in FIG. There is only one, and there is also.

A pair of signal lines with a differential voltage, such as the MO8 dynamic RAM OIObus line, ran in parallel.

[Problem that the invention seeks to solve]

In the above-mentioned 5 conventional signal @O running methods, noise enters from adjacent signal lines due to the coupling capacitance that exists between the signal lines. Circuits that process voltages of several tens of rnV have the disadvantage that malfunctions are caused by this type of noise, and conventionally it has not been possible to freely place other signal lines near such signals. 7th
．． FIG. 8 shows an example of this, in which noise is transmitted from signal line 1 to signal line 2, and level fluctuations appear on signal line 2.

Figures 9 and 10 are also examples of this. Even if the signal line 1.20 pattern shape that processes the differential voltage is symmetrical and the capacitance 3.4 is equal, the capacitance with the adjacent signal line 3 is different between signal line 1 and signal line 2. Therefore, the coupling noise is also different, and noise is introduced even as a differential voltage with poor symmetry, causing malfunction.

[Means for solving problems]

According to the present invention, in order to eliminate the noise pipe generated from the L% constant signal line,
Complementary signal wires are generated from the signal wires, and the two wires are run symmetrically (pattern shape, easy value, etc.) and twisted at a constant pitch.

2. When dealing with a differential voltage on a circuit for a pair of signal lines, the two pipes should have a symmetrical butter/shape,
capacitance value, etc.) and run by twisting at a constant pitch.

〇 [Effects of the Invention] By the means explained above, 1. From a particular signal, a complementary form is obtained. By generating a signal, making both of them symmetrical, and running them twisted at a constant pitch, the coupling capacitance with adjacent signals will also be symmetrical, and noise to adjacent signals will cancel each other out. This produces the effect of canceling noise to adjacent signals.

2 By making the pair of signal lines that handle the differential voltage completely symmetrical and running them twisted at a constant pitch, the coupling noise from adjacent signals can be equalized, and this makes it possible to This can eliminate the effects of noise.

〔Example〕

Embodiments of the present invention will be described with reference to the drawings.

Figure 1.2 is an example in which signal lines 2 and 3 are created in a complementary relationship based on the % signal line 1, and these lines are twisted at a constant pitch. Since capacitances 1 and 2 and capacitances 3 and 4 are exactly equal, the couple noise to the signal line 4 is completely out of phase, like the couple noises 1 and 2 in Figure 2, and cancels out by n% times the signal 4. Noise appears in 1. do not have. Also, the third
FIG. 4 is an example of the complementary signal generation circuit of FIG.

In FIGS. 5 and 6, the signal lines 1 and 2 are twisted in order to cut the noise pipe from the signal line 3. Since not only the capacitance 3.4 but also the capacitances 1 and 2 are equal, the noise from the signal line 3 is also equal, and the differential voltage of the signal line 1.2 is not affected by noise.

[Brief explanation of the drawing]

FIG. 1 shows signal line 2 in a complementary relationship with respect to signal line 1.
, 3, and eliminates noise to the signal line 4. FIG. 2 Fi is a timing chart of FIG. 1. FIG. 3 shows an example of the configuration of the complementary signal generating circuit shown in FIG. 1. FIG. 4 is a timing chart of FIG. 3. Fifth
The figure shows an embodiment in which the influence of noise from the signal line 3 is eliminated by twisting the signal line 1°2t. FIG. 6 is a timing chart of FIG. 5. FIG. 7 is a diagram showing a conventional technique with respect to FIG. 1. FIG. 8 is a timing chart of FIG. 7. FIG. 9 is a diagram showing a conventional technique for FIG. 3. FIG. 10 is a timing chart of FIG. 9. ccS Company 1-Ichikimu%h Gi 5 Field No. 6 Figure, Preface 7 Figure Bowl 3 Figure

Claims (2)

[Claims] (1) A signal line that generates a complementary waveform from a specific signal and transmits the signal and the latter signal has conductor wiring whose pattern shapes are symmetrical and intersect at a constant pitch. Semiconductor integrated circuit device. (2) Claim (1) characterized in that, in a signal line that transmits a pair of signals that handle a differential voltage, the pattern shapes of both are symmetrical and have conductor wiring that intersects at a constant pitch. The semiconductor integrated circuit device described in .