JPS6263458A - Lead frame for semiconductor device - Google Patents
Lead frame for semiconductor deviceInfo
- Publication number
- JPS6263458A JPS6263458A JP20382585A JP20382585A JPS6263458A JP S6263458 A JPS6263458 A JP S6263458A JP 20382585 A JP20382585 A JP 20382585A JP 20382585 A JP20382585 A JP 20382585A JP S6263458 A JPS6263458 A JP S6263458A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- thickness
- tie bar
- tie
- tie bars
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49558—Insulating layers on lead frames, e.g. bridging members
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Geometry (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は樹脂封止型半導体装置用リードフレームに関し
、特にタイバーの配置及びその形状に関するものでるる
。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a lead frame for a resin-sealed semiconductor device, and particularly relates to the arrangement and shape of tie bars.
従来の樹脂封止型半導体装置用リードフレーム（以下単
にフレームと丹−ぶ）は、第３図の平面図に示すように
、半導体素子搭載領域４を中心にして、そのまわりから
延びたリードをタイバー１（別名ダムバー）で連結した
形状を有している。A conventional lead frame for a resin-sealed semiconductor device (hereinafter simply referred to as "frame") has a semiconductor element mounting area 4 at its center and leads extending from around it, as shown in the plan view of FIG. It has a shape in which it is connected by a tie bar 1 (also known as a dam bar).
上述のフレームに設けらｎているタイバーは、半導体装
置の組立ｔ−容易にする為にリードを補強すること、及
び熱硬化性樹脂封止工程での樹脂壜ｎｔ防止することを
目的としている。The tie bars provided on the frame described above are intended to reinforce the leads in order to facilitate assembly of the semiconductor device and to prevent the resin bottle from collapsing during the thermosetting resin sealing process.
しかるに上記した目的で設けら１ている従来のタイバー
１は、第３図に示すように％樹脂封止ライン２より離扛
て位置し、かつ厚でもリードと同一でめった。そのため
次の様な欠点を備えていた。However, the conventional tie bar 1 provided for the above purpose is located away from the resin sealing line 2, as shown in FIG. 3, and has the same thickness as the lead. Therefore, it had the following drawbacks.
１）樹脂封止ライン２からタイバー１まで漏ｎてきてい
る樹脂を除去する烏の手段、例えば樹脂抜き用の金型等
を要するので管理工数の増加となる。1) A means for removing the resin leaking from the resin sealing line 2 to the tie bar 1, such as a mold for removing the resin, is required, which increases the number of management steps.
２）エツチング加工により製作さｎたフレームにおいて
は、第４図（第３図のｘ−ｘ’断面図）に示すように、
エツチング加工％有の湾曲し次側面形状＃ｌｃなる為、
側面の樹脂全完全に除去出来ない。2) In the frame manufactured by etching process, as shown in Fig. 4 (cross-sectional view taken along line xx' in Fig. 3),
Due to the curved side surface shape #LC with etching processing,
The resin on the sides cannot be completely removed.
３）樹脂封止ライ／２とタイバー１との間のリード側面
５に樹脂の残滓がある場合には、外装めっき（半田ディ
ヅプ金含む）を施す際の密着不良の原因となり、この部
分からリードの耐蝕性が劣化する。3) If there is resin residue on the lead side surface 5 between the resin-sealed lie/2 and the tie bar 1, it may cause poor adhesion when applying exterior plating (including solder dip gold), and the lead will not be removed from this area. Corrosion resistance deteriorates.
４）タイバー１の切断時のストレスにより％半導体装置
會對止している樹脂にクラックが入り易く、耐湿性全損
なう。4) Due to stress when cutting the tie bar 1, cracks tend to form in the resin that holds the semiconductor device together, resulting in a complete loss of moisture resistance.
本発明のフレームは、鉄、ニッケル合金や銅合金等の板
材又は条材に、エツチング加工又はプレス加工ｒＣよっ
て所望とするフレームパターンを形成する際、フレーム
のタイバーを樹脂封止ラインの間際に位置させるととも
［、タイバーＯ切断を容易に行える様に、タイバーにス
リット状２円状。In the frame of the present invention, when a desired frame pattern is formed on a plate or strip of iron, nickel alloy, copper alloy, etc. by etching or press processing, the tie bars of the frame are positioned just in front of the resin sealing line. At the same time, the tie bar has two circular slits so that the tie bar can be easily cut.
角状などの貫通孔？設けるか、或いはタイバーの板厚の
樹脂封止側の厚さはそのままにして反対側を薄くするこ
とＶＣよって、タイバーの切断部断面積全減少させるよ
うにしたものでおる。A through hole such as a square shape? The total cross-sectional area of the cut portion of the tie bar can be reduced by providing a VC, or by leaving the thickness of the tie bar plate on the resin-sealed side unchanged and thinning the opposite side.
次に本発明の実施例について図面ケ径照して説明する。 Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明のフレームの第１の実施例を示し、（ａ
）は平面図、ｆｂｌｔ！ Ｘ −Ｘ’断面図である。す
なわち半導体素子搭載領域４を中心にし、先端に貴金属
めっき＆１１３か施さｊ、たり−ドがタイバー１で連結
さｎている。FIG. 1 shows a first embodiment of the frame of the invention, (a
) is a plan view, fblt! It is a sectional view taken along line X-X'. That is, the semiconductor element mounting area 4 is located at the center, and the tips are plated with precious metals and are connected by tie bars 1.
タイバー１は樹脂封止ライン２０間際ＶＣ設けらｎ１更
に樹脂封止ライン２側の板厚はリードと同等の厚さに保
たｎ％その反対側の板厚はリードの厚さを１／２〜１／
３薄くし几厚さに形成さ扛、この薄くした部分を１ａで
示す。第２図１ｊ本発明の７レームの第２の芙施例會示
す平面図で、タイバー１の切断部に角状の貫通孔６を設
けたものである。角孔個所以外の板厚ｒｒｓｓｖ−ドと
同等の厚さにしてるる。ま′ｆｃ貫通孔６はスリット状
でも丸穴でもよい。Tie bar 1 is provided with a VC near the resin sealing line 20. Furthermore, the plate thickness on the resin sealing line 2 side is kept at the same thickness as the lead. The plate thickness on the opposite side is 1/2 the thickness of the lead. ~1/
3. The thinned part is shown as 1a. FIG. 2 1j is a plan view showing a second embodiment of the 7-frame structure of the present invention, in which an angular through hole 6 is provided at the cut portion of the tie bar 1. The thickness of the plate other than the square holes is the same as that of the board. The fc through-hole 6 may be slit-shaped or round.
以上、第１．第２の実施例に示し友フレームは、０．２
５ｍｍｔ の４２合金の素材ｔエツチング加工で製作し
九ものである。Above is the first part. The friend frame shown in the second example is 0.2
There are 9 pieces made of 5mm thick 42 alloy material by T-etching.
本発明のフレームは、タイバーを樹脂封止ライン間際に
設けるとともに、タイバーの樹脂封止ライン側は、従来
通りリードの板厚と同等とし、その反対側の部分はタイ
バー切断が容易に行える様に板厚を薄くするか又はタイ
バーに貫通孔を設けたもので、その効果は次の様でるる
。In the frame of the present invention, the tie bar is provided just before the resin sealing line, and the resin sealing line side of the tie bar has the same thickness as the lead plate as before, and the part on the opposite side has a tie bar that can be easily cut. The plate thickness is reduced or through holes are provided in the tie bars, and the effects are as follows.
１）タイバーが樹脂封止ラインの間際であるため、タイ
バーより内側への樹脂＠詐は最小限の童で済み、タイバ
ー切断時に特別な樹脂抜きの金型は不要でろる◎
２）タイバーの一部の板厚を薄くするか、又は貫通孔を
設ける事により、タイバーの切断が容易に行え、封止樹
脂へのストレスが減少し、樹脂クラックの発生を防ぐ事
が出来、耐湿性の同上が図れる。1) Since the tie bar is right next to the resin sealing line, there is minimal amount of resin leaking inside the tie bar, and there is no need for a special resin mold when cutting the tie bar. 2) One of the tie bars By reducing the thickness of the plate or providing a through hole, the tie bar can be easily cut, stress on the sealing resin can be reduced, resin cracks can be prevented, and moisture resistance can be improved. I can figure it out.
３）本発明のフレームを使用して組立た半導体装置は、
タイバー切断後ｒｃ外装めっきを行うようにすｎば、タ
イバー切断面にも外装めっきが施さ牡るため錆の発生は
最小限なものとなり、耐蝕性の同上が図釘、る。3) A semiconductor device assembled using the frame of the present invention is
If RC exterior plating is applied after cutting the tie bar, the exterior plating will also be applied to the cut surface of the tie bar, so the occurrence of rust will be minimized, and corrosion resistance will be improved.
第１図は不発明の第１の実施例を示し、ｌａｌに平面図
、（ｂ）はｘ−ｘ’断面図、第２図は不発明の第２の実
施例？示す平面図、第３図は従来のリードフレームの平
面図、第４図はエツチング加工により製作し次第３図の
ｘ−ｘ’断面形状を示しｔものである。
１・・・・・・タイｚ＜−、ｌｌ・・・・・・タイバー
の板厚が薄い部分、２・・・・・・樹脂封止ライン、３
・・・・・・貴金属めっき膜、４・・・・・・半導体素
子搭載領域、５・・・・・・リード側面、６・・・・・
・貫通孔。
代理人 弁理士 内 原 晋１ ′怖゛−１′
第 ２ 凹Fig. 1 shows a first embodiment of the invention, where lal is a plan view, (b) is a sectional view taken along the line xx', and Fig. 2 is a second embodiment of the invention. FIG. 3 is a plan view of a conventional lead frame, and FIG. 4 shows a cross-sectional shape taken along line xx' in FIG. 3 after it has been manufactured by etching. 1...Tie z<-, ll...Thin part of the tie bar, 2...Resin sealing line, 3
...Precious metal plating film, 4...Semiconductor element mounting area, 5...Lead side surface, 6...
・Through hole. Agent Patent Attorney Susumu Uchihara 1 ``Scary゛-1'' 2nd Concave
Claims (1)
バーを樹脂封止部に接近させて設けると共に、前記タイ
バーの切断部分の肉厚を部分的に除去して切断部断面積
を減少させたことを特徴とする半導体装置用リードフレ
ーム。A lead frame for a resin-sealed semiconductor device, characterized in that a tie bar is provided close to the resin-sealed portion, and the thickness of the cut portion of the tie bar is partially removed to reduce the cross-sectional area of the cut portion. Lead frame for semiconductor devices.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20382585A JPS6263458A (en) | 1985-09-13 | 1985-09-13 | Lead frame for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20382585A JPS6263458A (en) | 1985-09-13 | 1985-09-13 | Lead frame for semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6263458A true JPS6263458A (en) | 1987-03-20 |
Family
ID=16480332
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20382585A Pending JPS6263458A (en) | 1985-09-13 | 1985-09-13 | Lead frame for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6263458A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012043882A (en) * | 2010-08-17 | 2012-03-01 | Denso Corp | Method of manufacturing semiconductor device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5669852A (en) * | 1979-11-09 | 1981-06-11 | Mitsubishi Electric Corp | Lead frame for semiconductor device |
-
1985
- 1985-09-13 JP JP20382585A patent/JPS6263458A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5669852A (en) * | 1979-11-09 | 1981-06-11 | Mitsubishi Electric Corp | Lead frame for semiconductor device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012043882A (en) * | 2010-08-17 | 2012-03-01 | Denso Corp | Method of manufacturing semiconductor device |
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