JPS6262228A - Multi-split photometer - Google Patents

Abstract

PURPOSE:To generate proper exposure information from a brightness distribution, by automatically adjusting the focus corresponding to a specified one among divided areas of an object field to obtain it with a brightness signal at the completion of the adjustement as rference value. CONSTITUTION:A photometry circuit 13 for automatic exposure control receives four signals for starting A/D conversion, CP for A/D conversion, reference CP and reading information and sends brightness information of an object field divided to a CPU serially to be converted into a parallel signal. An automatic focus detection circuit 14 receives signals for start, stop and chip select for controlling read from the CPU, sends a detection ending signal to a gate circuit 23 and display information to the CPU through a switch SO. The CPU identifies a brightness distribution using the brightness in an area where a main object exists at the completion of focus adjustment as the critevia to generate proper exposure information according to the results. The brightness signals above a specified threshold value shall not be involved in the brightness distribution of the object field. This photometer is used effectively for cameras and the like.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention This invention relates to a photometric device for determining the appropriate exposure amount in cameras and the like.

Conventional technology As a means of determining the exposure amount of a camera, etc., the field is divided into multiple regions and the brightness of the field is measured using a photoelectric conversion element. Various methods have been proposed for determining the exposure amount based on the luminance signal of the . For example, the exposure amount is determined from the average value, median value, or mode of multiple brightness signals, or the exposure amount is determined by a value obtained by shifting the maximum or minimum value of multiple brightness signals by about half the film latitude. There are some methods that determine the exposure amount based on the average value of the maximum value and minimum value of a plurality of brightness signals.

In addition, in Japanese Utility Model Publication No. 60-11475, the average value of a plurality of luminance signals is calculated, and the average value is used as a reference value, and this reference value is compared with the luminance signal of each region, and each divided region is By normalizing the brightness at If there is a high brightness area such as the sun, the brightness signal corresponding to this is not involved in the calculation of the reference value, thereby preventing the reference value from shifting due to the high brightness area.

Problems to be Solved by the Invention The above-mentioned device is capable of determining a more appropriate exposure amount by identifying the brightness distribution of the entire object field, compared to determining the exposure amount by simple average metering or spot metering. It is designed with the intention of making decisions. However, even with these devices, whether or not the exposure amount is determined appropriately is ultimately a matter of probability, and even if this probability becomes higher, the exposure amount will still be determined as intended by the photographer. There remains some uncertainty as to whether this is the case.

SUMMARY OF THE INVENTION An object of the present invention is to provide a multi-segment photometry device for a camera that can determine the exposure amount while accurately reflecting both the photographer's intention and the luminance distribution of the entire object scene.

In order to solve the above-mentioned problems, this invention divides the field into a plurality of regions and uses a plurality of photoelectrons corresponding to each region. Provided with a photometric circuit in which a conversion element is arranged, measures the brightness of each of the plurality of divided regions individually, and provides an automatic focus adjustment device that performs automatic focus adjustment on a specific region among the plurality of regions, Using the luminance signal corresponding to the above specific area at the time of completion of automatic focus adjustment as a reference value,
Appropriate exposure is determined from this reference value and brightness signals corresponding to other areas, and the specific area of the subject that the photographer places importance on is reflected in the exposure amount determination through automatic focus adjustment operation. It is an attempt to do so.

According to the embodiment of the present invention, luminance signals exceeding a predetermined threshold are not taken into consideration when determining the exposure amount.

To explain this with reference to FIG. 1 corresponding to the embodiment, numeral 1 denotes a photoelectric conversion element that divides the field into a plurality of regions and measures the brightness of each region, as shown in FIG. A plurality of them are provided corresponding to each area. The output signal is processed in the photometry circuit 13 for automatic exposure control, converted into a digital signal, and processed by a processor (hereinafter referred to as CPU).
15 is input.

The CPU 15 determines the maximum value, second largest value, minimum value, etc. of luminance information of a plurality of areas, and also determines whether the maximum luminance exceeds a predetermined threshold. The brightness distribution state of the object field is identified based on the brightness information of other areas without using the brightness information of that area, and the appropriate exposure amount is determined based on the result. At this time, the field area covered by the photoelectric conversion element PDo in Figure 5 matches the field area targeted for automatic focus adjustment, and the output signal of this photoelectric conversion element PDO is adopted as the reference value. be done.

During automatic focus adjustment, the photographer decides on a composition so that the part of the subject to be in focus falls within the specific area. This area of the subject is the area that the photographer places the most importance on, and this area must not be underexposed or overexposed. Therefore, the brightness signal corresponding to this field area at the time when the automatic focus adjustment is completed is adopted as the reference value. Moreover,
The appropriate exposure amount is determined by taking into consideration the luminance distribution state including other luminance signals, with the primary objective being that this reference value does not deviate from the latitude of the film. In order to obtain the above effect, it is sufficient that the field area for which the reference value is to be obtained corresponds to the field area for which automatic focus adjustment is to be performed.
This area does not necessarily have to be in the center of the field.

According to this invention, the exposure amount is determined so that the reference value is always within the film latitude, but consideration must be given to how other brightness values correspond to the finite film latitude. It is. That is, when the brightness values are distributed over a wide range, if an attempt is made to place the high brightness side within the film latitude, the low brightness side will deviate from the film latitude. Here, the structure of the embodiment does not take into account excessively high brightness parts such as the sun, and the low brightness side is unduly film latitude.Example Embodiments of the present invention will be described below.

(1) Overview of Configuration FIG. 1 is a block diagram schematically showing an automatic exposure and automatic focus control device for a camera incorporating the photometric device of the present invention.

In the figure, ■ is a photoelectric conversion element that divides the field into multiple areas and measures the brightness of incident light for each area, and 13 is an automatic exposure that processes the output signal from the photoelectric conversion element 1 and converts it from A/D. A control photometry circuit (hereinafter referred to as AE), 10 an automatic focus detection element, 14 an automatic focus detection circuit (hereinafter referred to as AF) that processes the output signal of the detection element 10, 15 an input from the automatic exposure control photometry circuit and others. A processor (hereinafter referred to as CPU) that processes signals, determines the exposure amount, etc., and instructs each control mechanism to operate, and 16 is a read-only memory that stores information specific to the lens' F number and focal length ring. (hereinafter referred to as ROM), 17 is a signal processing circuit for displaying the photographing conditions etc. as a result of processing by the CPU on the outside of the camera, and 18 is a signal processing circuit for controlling the exposure mechanism of the camera based on the appropriate exposure signal output from the CPU. An automatic exposure control unit (hereinafter referred to as AE control), 19 an automatic focus control unit (hereinafter referred to as AF control) that controls the focus control mechanism of the camera based on a focus control signal output from the CPU, 5o1S1 and S2 installed in the camera The photometry So, automatic focus 51%, and release S2 switches are turned on in order using one common operation switch. 23 is a gate circuit, 24
is a setting section for predetermining exposure conditions, etc. for the camera.

FIG. 2 shows how the field is divided into a plurality of regions and the photoelectric conversion elements 1 are arranged in each region in order to measure the brightness of the field and its distribution state.

FIG. 3 is a cross-sectional view showing the photometric device of the present invention incorporated into a camera. The light incident on the lens system 2 is reflected by the main mirror 4, passes through the upper condenser lens 5 and the ventazolism 6, further passes through the half prism 7 and the relay lens 8, and is incident on the photoelectric conversion element 1 arranged above it. Image. Further, the light transmitted through the semi-transparent part formed at the center of the mirror 4 is reflected downward by a sub-mirror behind the mirror 4, passes through the relay lens 9, and enters the detection element 10 for automatic focus detection. Note that this detection element 10 detects the in-focus state of the central part of the field of view shown in the figure. It's a trench.
3 is an aperture, 11 is a shutter curtain, 12 is a film surface, and 19 is an automatic focus control section (hereinafter referred to as AF control).

FIG. 4 shows in slightly more detail the circuit configuration between the operation switch section, AE section, AF section and CPU of the block diagram shown in FIG. 1.

The operation switch section has a common operation section, and the photometry switch S
o1 Auto focus switch Sls Release switch S2
The ON state can be set in this order. Photometering switch S
When O is turned on, two interrupt NTI and 1NT2 signals are sent to the CPU via the gate circuit, and the CPU
Interrupts are processed by the internal interrupt mechanism, but it is also possible to disable interrupts using an interrupt disable signal from the CPU side.

The automatic exposure control photometry circuit 13 receives an A/D conversion start signal ADSTR, an A/D conversion clock signal ADCP1, and a reference clock signal SCK from the CPU side.

Receives four types of input signals of data read signal AESTR,
The luminance information of the object field processed within the AE is sent to the CPU as serial data. Note that the luminance information sent as serial data from the AE is converted into a parallel signal by a serial-to-parallel converter (SP converter) in the CPU.

Automatic focus detection circuit (AF) 14 is the AF from the CPU side.
It receives a start signal, an AF stop signal, and a chip select signal C8 used for data readout control, and sends an automatic focus detection end signal AFE to the gate circuit connected to the photometry switch SO, and also sends display data to the CPU side. .

(2) AE Section FIG. 5 shows the circuit configuration of the AE section which processes the signal from the photoelectric conversion element, A/D converts it, and sends it to the CPU. below,
This circuit and its operation will be explained.

The output signals of the photoelectric conversion elements PDo-PD arranged in each of the plurality of divided object fields are logarithmically compressed by the amplifier AO-A8 to obtain brightness values BVo to BVs.

Among the obtained brightness values BV, ~BV8, the brightness value BVo in the center of the field is used as the reference value, and the brightness value BV in other areas
By processing I-BV as a difference including the sign from the reference value, it is possible to recognize the brightness distribution of the entire field with the center of the field as a reference. Therefore, the brightness value BVo at the center of the field is converted into an 8-bit signal by the A/D converter ADo, and the brightness value BVo is converted to a reference value BV.

and the brightness values BVI - BVB of other areas are input to the condenser CPl - CPs to obtain the positive and negative signs, and (BVi - BVo ) values (here i = 1 to 8).
A/D converters AI)1 to AD8 convert the signal into a total of 6 bits (5 bits + sign bit).

Each A/D converter has a data register that temporarily stores converted data, and is selected by chip select signals C3o-C5a issued from the P/S control section to send it to the CPU as serial data. The contents from the data register are sent to the line as an 8-bit parallel signal by the P/S control section. The P/S control section converts the parallel signal (received from the line) into a serial signal and sends it to the CPU. Note that details of the P/S control section will be explained later based on FIG. 9.

Note that the logarithmic compression amplifier A used in FIG.
As t, as illustrated in FIG.
, a compression diode 28, and a level conversion buffer 29.

(3) A/D conversion section FIG. 7 is the A/D conversion section ADo, ADi (
Figure 7 (i21-8) shows the circuit configuration.
A) shows ADo, and FIG. 7(B) shows ADl. AD2
~AD8 are omitted because they have exactly the same configuration.

The means of A/D conversion is basically the same for AD and AD1 to ADs, and a double integration method is adopted. That is,
First, an integrating capacitor is charged with a luminance value input as an analog quantity for a certain period of time. In this case, the charging current changes depending on the magnitude of the brightness value, and therefore the charge after being charged is the integral value of the brightness value. Next, this is discharged under a constant current, and the discharge time is counted using a clock pulse, and the sum of the Zulus numbers indicates the brightness value.

To briefly explain the circuit configuration of the AD, an input signal of a brightness value BVo is input to one of the switching elements 200. Further, two types of reference level signals Vstd1VrefO are supplied from the power supply circuit 300, and the reference level signal Vr
efo is input to the other side of the switching element 200, and the reference level signal Vstd is supplied to the first input side of the operational amplifier 120. The output side of the switching element 200 is connected to the second input side of the operational amplifier 120 via a resistor R. An integrating capacitor C is connected between the output side and the second input side of the operational amplifier 120, and a switching element 201 is connected to the F parallel. The output of the operational amplifier 120 is input to the first input side of the comparator 121, and the reference level signal Vstd is input to the second input side of the comparator 121. The output of the comparator 121 is connected to the control input side of the switching element 201 and the gate 20
2.203, latch 31 via flip-flop 204
It is input to the control input side.

Further, the A/D conversion circuit is provided with a counter 30 that counts the charging/discharging time of the integrating capacitor C, and a latch 31 that holds the counted contents. From the CPU side, A/
A D conversion clock signal ADCP is supplied to the φ side (counting input side) of the counter 30 via the gate 211, and an A/D conversion start signal ADSTR is supplied to the R side (reset signal side) of the counter 30. Ru.

The ADO counter 30 is used not only as a counter for A/D conversion of the input brightness value BVo, but also as a counter for A/D conversion of the brightness value BV1-BVa which is A/D converted in AD1-ADs.

Next, the operation of the circuit will be explained. First, the reference signal V
It is assumed that std is smaller than the input brightness value BVo, and that the counter 30 is in a state where it has not been reset. At this time, the output of the gate 205 is in the "L" state. Game) 2.05 output is "H" when the contents of the counter 30 are hexadecimal numbers other than 0OOH to 0FFH.
”.In other words, the counter 30 has been reset,
When the ADSTR signal is input, the output of the gate 205 is "L", and at this time the switching element 20
0 is set to the state shown in FIG. 7(a).

The input brightness value BVO is input to the operational amplifier 120 via the switching element 200 and the resistor R, and the difference between it and the reference signal Vstd input to one of them is output. This difference signal is then input to the converter ε-lator 121 and compared with one input Vstd.
When , the output of the comparator 121 is set to "L"'. At this time, since the switching element 201 is in the OFF state as shown in FIG.
-Vstd)/R flows and charging starts.

On the other hand, the counter 30 receives the A/D conversion start signal ADSTR from the CPU, and starts counting the A/D conversion clickles (AI)CP sent through the gate 211. When the count value reaches a certain value, that is, after a certain period of time has elapsed, a signal is sent to the gate 205, and the gate 205 outputs "
This state is transmitted to the switching element 200 via the line 102 and is inverted. Since the second reference voltage Vrefo is applied to the input terminal on the inverted side of the switching element 200, The first reference voltage Vstd and the second reference voltage Vrefo lower than this are input to the input side of the operational amplifier 120, and as a result, the electric charge charged in the integrating capacitor C is maintained at a constant current (Vs
It is discharged at td-Vrefo)/R. As a result of the discharge, the terminal voltage 100 of the integrating capacitor is lower than the first reference voltage Vstd.
The output of 1 turns the inverting switching element 201 ON''
', the terminals of the integrating capacitor are short-circuited, and the gate 202 is inverted to the 'H' state.

When the gate 202 enters the "H" state, its output is transmitted to the flip-flop 204 via the gate 203, and a data input command is applied to the terminal of the latch 31, and the counter 3
The count content of 0 is transferred to the latch 31.

On the other hand, the output of the counter 30 is also input to the gate 209, and when the output of the gate 202 does not go to the "H" state until the output of the gate 2o9 is inverted to the "H" state by the output from the counter 3o, that is, 1. ; When it takes a long time to discharge the integrating capacitor, the contents of the counter advance to the hexadecimal number IFOR, and at this time, the gate 209 is inverted to the "H'' state, and the flip-flop 204 outputs the data via the gate 4203. An input command is applied to the terminal of the latch 31, and the count contents of the counter 30 are transferred to the latch 31.

The output of the counter 30 is still input to the gate 212, and when the count content of the counter advances to 7EH in hexadecimal, the gate 212 becomes "H" state, and the AD
A latch 32 provided in the converters AD, -ADs operates to latch the count contents of the counter. Note that the contents latched at this time are 5 bits from b 1 '' to b 5 of the counter.

Next, the AD converter AD shown in FIG. 7(b) will be explained.

The circuit configuration is basically the same as ADO, but BV is used as an input signal and as a reference signal to judge the brightness of the field.
, a comparator 230, switching elements 221 and 222, and a flip-flop 220 are added, which compare the input luminance value BV of the first region with the reference signal BV and send out a positive/negative sign, and a counter 30 is added. A latch 32 is provided to hold the contents of.

Next, the operation of ADl will be explained. Input brightness value BV
When the two input signals 1d and reference signal BVO are compared by the converter 230, BVO>BV1, the converter 230 outputs the "°'L" state, which is input to the flip-flop 220 of the AD converter ADl. On the other hand, the fall signal of the AD conversion start signal STR sent from the AD converter ADo described above is generated when the gate 205 is in the L'' state in ADO, and this signal causes the integration When this falling signal, which determines the timing to start charging the capacitor, is input to the flip-flop 220, the "L" state of the output of the comparator 230 is transmitted to its output side. As a result, the switching elements 221 and 222 are set to the illustrated state. This is explained in Figure 7 0).
Instead, BVI can be thought of as Vref (1 replaced by Vrefl).

Now, when the AD conversion start command signal ADCH sent from the AD converter AD enters the "L'" state, the stripe switching element 223 is set to the state shown. The operational amplifier 122 has a reference signal BV.

and value signal BV, are input, and the output is the difference (BV
o -BVl) is input to the controller 123, but one input of the controller 123 is BV, and when BVo > BV+, the output of the controller 123 becomes "L" state. .

As a result, the switching element 224 is set to the state shown in the figure, so that the current (BVo
BVl)/R flows and charging starts.

On the other hand, a counter 3 common to each AD converter ADo to ADs
0 (shown in FIG. 7(a)), counting has started as described above, and when the counted value reaches a predetermined value, the gate 208 becomes "H" state, and as a result, the output of the gate 210 becomes The switching element 223 is inverted from the illustrated state, and the input side of the operational amplifier 122 is connected to BVI and BV.
l-Vrefl is applied, and the charge of the integrating capacitor C is a constant current (BV l(BV 1-Vrefl )
)/R=Vrefl/R.

When the terminal voltage 105 of the integrating capacitor becomes lower than the input brightness value BV due to discharge, the output of the condenser 123 is inverted, switching the switching element 224 to the "ON" state, shorting the terminals of the integrating capacitor, and , inverts the gate 225 to the "H" state. gate 2
The output of 25 passes through gate 226 to fritz flop 22.
7, a data input command is issued to the latch 32, and the contents of the counter 30 are latched.

Figure 8 is a time (a) chart that explains the operation of the AD converter, and Figure 8 (to) shows the timing of major operations (a) for one or more cycles to explain the situation of repeated operations. FIG. 8(2) shows the operation timing of each part of the ADO and ADl converters within one cycle.

1. To explain the operation timing of each part of AD, C
AD conversion start signal ADSTR sent from PU is °“
When the state becomes "H", the integrating capacitor starts charging and the terminal voltage 100 decreases.The counter 30 starts counting and stops counting with the hexadecimal number IFOR.The output signal 101 of the control 121 is the charging/discharging of the capacitor. The output signal 102 (STR) of the gate 205, which performs charge/discharge switching, is in the "H" state only during the charging period of the capacitor, and is in the "H" state at other times.

The latch command signal 103 is “
becomes H” state. Also, the output signal 104 of the gate 209
is H when the counter advances to the hexadecimal number IFO.
“It becomes a state.

Next, to explain the operation timing of each ADI-AD8, when ADSTR becomes H'' state, charging of the integrating capacitor starts and the terminal voltage 105 decreases.The counter 30 starts counting; The number is 7 in hexadecimal
When reaching E, the gate 212 of the ADO becomes "H", the LAT signal becomes "H", and the counter contents at that time are held in the latch 32. The switching timing for charging and discharging the integrating capacitor is AD.

This is done by the signal ADCH sent from the gate 208 when the count value of the counter reaches 3F in hexadecimal notation, that is, when the count value of the counter reaches 3F in hexadecimal notation.

The chip select signal is the counter 30 for C8o.
is sent after the content of C5I to C8s reaches hexadecimal number IFOR, and the content of the counter 30 reaches 16 for C5I to C8s.
After reaching the base number 7EH, they are sent out one after another.

(4) P/S control unit FIG. 9 is a block diagram showing the configuration of the P/S control unit. This control section has the function of converting the A/D converted 8-bit ε parallel signal into a serial signal and sending it to the CPU.

The control section includes a timing signal generation section 91 that operates based on the reference clock signal SCK and the AE data readout signal AESTR input from the CPU, and an AE readout signal AES.
The 7-bit counter 92 starts counting with TR, and chip select signals C89 to C are sequentially applied according to the contents of the counter 92.
A decoding section 93 that generates 5s, and a P/S register 94 that converts the serial signal into a serial signal and sends it out.
It consists of

Next, to explain its operation, the P/S control section starts operating in response to the AE data read signal, the 7-bit counter 92 counts clock pulses, the counted value is sequentially decoded by the decoding section, and the A/D conversion section It generates chip select signals C8o and C8s to select AD converter AD.
Send to O-AD8. The AD conversion unit sequentially selects ADs by chip select signals C8o C5s.
Conversion unit ADo = 8-bit brightness value from ADs is P/
The signal is input to the S register 94.

The P/S register 94 temporarily holds the input 8-bit parallel signal under the control of the timing signal and clock signal sent from the timing section, converts it into a serial signal, and transfers it to the CPU.

(5) Signal processing within the CPU Next, the signal processing performed within the CPU will be explained based on the flowcharts shown in FIGS. 10 to 14.

First, among the operation switches that turn on in the order of photometry, autofocus, and release, when the photometry switch S is turned on, an interrupt signal is sent to the CPU from the gate 23 shown in FIG. 4, and the interrupt processing 26 is started. will be started. In FIG. 10, it is shown as "INTSO". Next, after disabling interrupts, the So routine is entered, but first the state of the autofocus switch Sl is checked.
If it is ON, jump to the St routine. If it is OFF, the state of the photometric switch SO is checked, and if it is OFF, it is a malfunction of the SO switch, so an interrupt is allowed, the process is stopped, and the process waits for the switch SO to be turned ON again.

On the other hand, if the switch SO is ON, the program jumps to the AE subroutine for automatically determining the exposure amount. The AE subroutine will be explained later.

When returning from the AE subroutine, autofocus switch S
The state of the switch So is checked, and if it is OFF, the routine returns to check the switch So. If the switch St is ON, the routine of Sl is entered. AF start signal to automatic focus detection circuit 1
Send to 4.

After this, a series of operations such as focus detection for automatic focus adjustment and motor operation are performed independently of the processing within the CPU. After sending out the AF start signal, the state of Sl is checked, and if it is OFF, an AF stop signal is sent to the automatic focus detection circuit 14. This allows focus detection and motor operation to be stopped independently of the CPU. When the sending of the AF stop signal is finished, the process jumps to INTSo. If the switch S1 is ON, the process jumps to the AE subroutine, and when the process returns after completing a series of processes, interrupts are permitted and the state of the switch S1 is checked. If it is OFF, output the AF stop signal and INT.
If the switch S1 is ON, the program jumps to the AE subroutine again. After the above interrupts are enabled,
When the AF focus signal AFE is sent from the automatic focus detection circuit 14 to the gate 23, the falling signal of INT2 is sent from the gate 23 to the interrupt mechanism, and the INT2 signal shown in FIG.
Enter the AFE routine.

In the INT AFE routine shown in FIG. 11, interrupts are first disabled, an AF stop signal is sent to the automatic focus detection circuit 14, and the focus adjustment mechanism is disabled. Then A
After jumping to subroutine E and performing a series of processes, the state of switch S1 is checked. If it is OFF, a routine is entered to check the state of the switch SO, but if it is ON, the state of the release switch S2 is checked. If S2 is OFF, the routine returns to check the state of S1 again.

In this way, the camera continues to wait until the release switch S2 is turned ON, but when the AF switch S1 is turned OFF, the camera is unable to operate the release and enters a routine to check the state of the photometry switch So. If the release switch S2 is ON, the user enters the release operation, sets the shutter speed, aperture value, etc., and operates the shutter.

After this, the state of the photometry switch SO is checked, and if it is OFF, interrupts are permitted and the process is stopped.

If the switch So is ON, the program jumps to the So routine and starts executing the INTSo routine again.

In the AE subroutine shown in FIG. 12, AD conversion is executed and the AD conversion value is taken into the CPU.

Next, the program jumps to the division processing subroutine to be explained later, performs division photometry processing, and returns from the ring routine as a result.
Let's move on to APEX calculations. Here, the shutter speed and aperture value are determined, necessary display data is prepared and sent to the display circuit shown in the third diagram, the AE subroutine is completed, and the process returns to the original routine.

Next, the subroutine of the division process will be explained using FIGS. 13 and 14. In this routine, after determining the exposure value from the brightness values of each area of the subject, the state of the metering mode selector switch SA, which is operated from outside the camera, is checked, and the
If N, the brightness BVo at the center of the field of view is determined as the optimum spring value BVc used for the APEX calculation, and the process returns to the original routine.

If photometry mode switch SA is OFF, 4Bmax
- Jump to the min routine and check the brightness BVi of each area of the object.
The maximum value of the difference Vi between and the brightness BVo at the center of the field is 4B
vmaX, second largest value ABVA 1-30=minimum value ΔBVmin, brightness width ΔBV brightness decrease. This will be explained later.

When the processing in the ΔBmax -min routine is finished, the process returns to the division processing subroutine again and the maximum brightness is determined (BVo+ΔBVmax) 11.3 BV is determined, and if it is larger than 11.3BY, ABVmax)
2.3 Jump to BV judgment routine. 11. From 3BY, if it is a dog, BVo is used to judge the brightness in the center of the field.
> l ], 3, if it is a dog than 113, ABVmax
The maximum value ΔBVm of the brightness difference of the object field determined by the in routine
ax is discarded, and the second largest value ΔBVA is adopted as the maximum value of the new luminance difference.

Next, the routine moves on to ABVmaX) 2.3 BV determination and subsequent steps. Here, the positions where the film's edges and dots exist are determined according to the distribution of brightness in the subject, such as the maximum value, minimum value, and medium brightness of the brightness difference, and the brightness value BVc required for exposure control is determined. It is something.

The processing procedure is to determine the maximum brightness difference aBVmax) 2.3, determine the minimum brightness difference ΔBVmin (-2, 7,
Then, the brightness values BVc to be adopted are classified into three after the judgment of ΔBVw) 5 in the brightness. If we organize this, 1 ΔBVmax' ) 2.3 is satisfied, and (1)
ABVmin (-2,7 when BVc = BVo
・・・・・・・・・・・・(2)(2)
ΔBVmin≧-27 was satisfied, (Ih forceps Vw) 5
When BVc = BVo + ΔBVmin + 2.7 −
-・(5)(it) When dBVw≦5, BVc = BVo+ΔBVmax-2, 3-(6)2
ΔBVmax≦23 is satisfied, (1) ABVmin (-2,7 is satisfied, (1)
When ΔBVw) 5, BVc ” BVo+ΔBVmax-2, 3...
...(3) (11) When Vw≦5, BVc = BVo +-9Vmin +2.7 --
...(4) (2) When aBVmin≧-27, BVc = BVo ...
......(1). For example, BVc =
BVo...The number shown on the left as (1) is the first
This is the same as the classification number shown at the bottom of the flowchart in Figure 3.

FIG. 15 shows an example of the brightness value processing results. To explain this simply, the vertical axis shows the brightness value, and the horizontal direction shows examples. To explain using the example on the far left, this means that Vmax≦2.3 and ABVmin≧-27.
In this case, BVO is adopted as BVc.

The classification number in this case is 1. Also, to explain the fourth example from the right, ABVmaX) 2.3, ABVm
In the case where i n≧27 and the brightness is ΔBVw) 5, it is shown that BVO+ΔBVmin+2.7 is adopted as BVc. The classification number in this case is 5.

In addition, the number displayed below the vertical line is BVmax - BVm
It shows the size of in, <5 is smaller than 5EV, -5
is 5EV, )5 indicates that it is a dog than 5EV.

Finally, a subroutine for calculating aBVmax-min will be explained. In this routine, the field is divided into multiple regions, and the brightness BVi of each region and the brightness B of the center of the field are
The maximum value ΔBVmax of the difference from V, the second largest value Bv
A1 Same as minimum difference ΔBVmin, brightness medium ΔBVw
The flowchart is shown in FIG. 14. Here, an example is shown in which the field is divided into nine parts, and since eight areas other than the central area serving as the reference are to be processed, i==1 to 9.

First, the initial value of the variable is set at i=1. AB
VmaX−ΔBVi, ABVmin−ΔBVi, Δ
Set BVA=0. Next, ABVmin is determined by determining the magnitude of ABVmin〉ΔBVi, and ABVm
If in is a dog, ΔBVi is stored as ABVmin and the process proceeds. Also, if it is not a dog, increase i by one and i
Proceed as = i + 1.

Next, ΔBVmax is calculated, but first ABVmax)Δ
Determine the size of BVi, and if ABVmaX is too small, choose A.
ΔBVmax is stored as BVA, ΔBVi is stored as ΔBVmax, and the process proceeds to the repeat determination of the routine.

Af3Vma X75: Second largest difference value Δ for dogs
To find BVA, first, it is determined whether ΔBVA:>ABV i is large or small, and if ΔBvA is a dog, the routine repeats the determination.

Also, if ΔBVA is not large, ΔBVi is set as ΔBVA.
is stored and proceeds to the routine repetition determination.

In the routine repetition judgment, ΔBV while i is smaller than 9.
Returning to the part that calculates min, when the process reaches 9 times, that is, when the luminance of all areas of the divided object scene has been processed, the iterative process is terminated, and the previously calculated ΔBVmax and Δ
The difference ΔBVw from BVmin is determined, this subroutine is ended, and the process returns to the original routine.

As described in detail, the multi-segment photometry device of the present invention divides the field into multiple regions, measures the brightness of each region individually, and automatically adjusts the focus when the main subject is considered to be present. Using the brightness of the area as a reference value, the brightness distribution state in the field is identified from this reference value and the brightness of other areas in the field, and an appropriate exposure amount is determined. Therefore, when the photographer performs automatic focus adjustment, the brightness value of the subject area is automatically adopted as the reference value, which prevents underexposure or overexposure for this area, and also prevents multi-segment metering. Taking advantage of these advantages, the exposure amount is determined according to the brightness distribution of the subject.

[Brief explanation of the drawing]

FIG. 1 is a block diagram schematically showing the automatic exposure and automatic focus control portions of a camera incorporating the photometric device of the present invention. FIG. 2 is a diagram showing the arrangement of photoelectric conversion elements. FIG. 3 is a schematic cross-sectional view showing a situation in which the photometric device of the present invention is incorporated into a camera. Fig. 4 is a block diagram showing the main parts of the block diagram shown in Fig. 1 in slightly more detail, Fig. 5 is a block diagram of the photometry circuit,
FIG. 6 is a diagram showing an example of a logarithmic compression circuit. FIG. 7 is a block diagram showing the circuit of the A/D converter, FIG. 8 is a time chart explaining the operation of the A/D converter, and FIG.
The figure is a block diagram showing the circuit of the P/S control section. 10 to 14 are flowcharts of signal processing, and FIG. 10 shows signal processing in photometry and focus detection. 1st
Figure 1 shows the signal processing up to release. Figure 12 is AE
The subroutine is shown below. FIG. 13 shows a subroutine for division processing. FIG. 14 shows a subroutine for determining the maximum value of luminance difference and other values in the division process. FIG. 15 shows an example of the processing result of the luminance value of the object field by the division processing. 1° photoelectric conversion element, 13: Photometering circuit for automatic exposure control, 1
0: automatic focus detection element, 14: automatic focus detection circuit, 15
: Processor, 80% Sls S2° operation switch,
SA: Photometry mode selector switch = 37- Fig. 1 Fig. 3 Fig. 6 Fig. 4 Fig. 26 No. 9 F! ! F

Claims (2)

[Claims] (1) A photometry circuit that divides the field into multiple areas and measures the light and generates multiple brightness signals corresponding to the multiple areas, and automatic focusing for a specific area among the multiple areas. an automatic focus adjustment device that performs the adjustment; means for generating a luminance signal corresponding to the specific area at the time of completion of the automatic focus adjustment as a reference value; and a plurality of luminance signals corresponding to the reference value and the plurality of areas other than the specific area. 1. A multi-segment photometry device, comprising: means for identifying a distribution state of brightness in a subject based on the reference value from a brightness signal, and generating appropriate exposure information according to the result. (2) Among the plurality of brightness signals, brightness signals exceeding a predetermined threshold are not involved in identifying the brightness distribution state in the object scene. multi-segment photometry device.