JPS62259022A - Light measuring instrument using focusing detecting element - Google Patents

Abstract

PURPOSE:To accurately find the brightness of a subject under a fluorescent lamp by calculating a light measured value by using the mean value of the integration time of plural integrating operations. CONSTITUTION:Incident light beams are made meident on a condenser lens CL through a photographic lens TL and a film equivalent surface F. Then, images of ranges A and B on the film equivalent surface F are re-formed on charge storage type image sensors I1 and I2 as images A1 and B1, and A2 and B2. Then, the image sensors I1 and I2 send out two image signals corresponding to the intensity distributions of the two images formed thereupon to a focus detecting circuit consisting of a microcomputer. Then, a focus detecting circuit finds the light measured value by using the mean value of the integration time of plural integrating operation to accurately find the brightness of the subject in the presence of the fluorescent lamp.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a photometry device using an integral type focus detection element such as a charge storage type charge conversion element, By calculating the photometric value from the average value of , it is possible to perform photometry under fluorescent lighting.

(Technology from IjC) Regarding 1-', Komei No. 60-1603 discloses that Jtl+ light is performed using a focus detection element of an automatic focus detection device, but photometry under fluorescent lighting is not possible. Measures to be taken if this is done are not disclosed. In addition, as a conventional countermeasure against fluorescent lamps in photometric circuits, there is a technology that uses a filter such as a CR integration circuit to reduce the pulsating current component of the fluorescent lamp light source. No photometric device has been proposed that averages the integration time of an integral type focus detection element such as a photoelectric conversion element to obtain a photometric value under fluorescent lighting.

(Problems to be Solved by the Invention) Many recent cameras are equipped with an integral type focus detection element such as a CCD line sensor.
The D-line sensor has a plurality of light receiving sections arranged in an array, and charges are accumulated according to the amount of light received by each light receiving section. i A storage section and a monitor light-receiving section are provided, and the integration time to the storage section is controlled by the monitor output from the monitor light-receiving section so that it becomes shorter when the brightness is high and becomes longer when the brightness is low. has been done. Therefore, it is conceivable to perform photometry using the integration time to the storage section. In this case, since the 11-distance area of the dark detection element becomes spot-like, if the photometric output is taken as the spot photometric output, a special element and optical system for the spot 1111 light is not required.

However, when photography is performed under fluorescent lighting, the brightness of the subject changes at half the cycle of the AC power supply cycle due to the influence of the fluorescent lighting. When the maximum value and the minimum value are stopped, it varies depending on the fluorescent lamp, but some types have about 3Ev change and 1hi. Under such fluorescent lighting, if you try to measure the brightness of the subject using the integration time using the above-mentioned integral type focus detection element, the integration time will be short near the maximum value, and the integration time will be short near the minimum value. As a result, the brightness of the subject cannot be accurately determined.

The present invention has been made in view of the above points, and its purpose is to obtain a photometric value using the average value of the integration time of multiple integrations, so that the subject can be photographed under fluorescent lighting. An object of the present invention is to provide a photometry device using a focus detection element that can accurately determine the brightness of an object.

(Means for Solving the Problems) In order to solve the above-mentioned problem 3, in the photometry device using the focus detection element according to the present invention, as shown in the attached drawings, an integral type a focus detection means for performing focus detection using a focus detection element; an integration time control means for controlling an integration time of the focus detection element; and a storage means for storing an integration time +al for a plurality of integrations. , an averaging means for obtaining an average value of the stored integration times, and a photometry means for obtaining a photometric value from the average value of the integration times obtained by the averaging means.

(For f-ya) In the present invention, the integration time of the focus detection means is controlled by the integration time control means, and when the 1 degree of the object is high, the integration time becomes short, and when the brightness of the object is low, the integration time is becomes longer. Therefore, when photographing under fluorescent lighting, the integration time becomes longer or shorter, but in the present invention, the integration time for multiple integrations is stored, and the average of the stored integration times is Since the photometric value is obtained from this average value, even when the brightness of the subject changes from moment to moment, a
Inconsistencies such as the tl light value changing photometrically 1σ do not occur.

(Example) Preferred embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 shows an optical system of a focus detection device used in a photometric device according to one embodiment of the present invention, htArI/4.
(CL) is a condenser lens, (L L >, (L2
) is an imaging lens, (M) is an aperture that limits the light incident on the imaging lens, (11) and (12) are electrolytic storage f^ type image sensors, and the film equivalent surface (■?) A, B
Images (A 1 ) and (B
The image sensors (11) and (I2> are re-formed as (A2), (B2>) and (A2), (B2>). The image signals are sent to a focus detection circuit composed of a computer, and the focus detection circuit determines the image shift l and the focus state by having a certain correlation between the respective image signals.

Figure 3 shows the above-mentioned image sensors (11) and (12).
This figure shows a charging conversion section including:
P1. P2. ..., P (n-1), a photosensor array (PA) consisting of P n, an integral clear circuit (I
CG), a shift gate circuit (SG) that transfers the accumulated charge stored in the photosensor array (PA) to a CCD shift register (SR) described later, R1+R2+H
+H, R(n+2), R(n+)). Here, the CCD shifter is a transfer unit that sequentially transfers the accumulated charges sent from the photosensor array (PA) to the video signal output circuit (Vs) in synchronization with the transfer pulses (φ1) and (φ2). The number of cells in the register (S R) is 53 more than the number of photosensors in the photosensor array (PA). C.C.
D shift register (SR) cell R,, R2,rt,
is for empty feeding, and each photosensor P I, P 2 , ..., P (n-
+), PncI) accumulated charge is generated by the shift pulse (S
H) of the CCD shift register (SR)
*, Rs, ..., R(n+2), R(+++z)
are transferred in parallel. Each photosensor is the fourth [2I
As shown in , a photodiode (Dl), a charge storage diode (D2) using a capacitance of a PN junction,
A FET circuit (QIO) whose gate is connected to the cathode of the photodiode (Dl) and the cathode of the charge storage diode (D2), and whose gate is grounded, the cathode of the charge storage diode (D2) and the power supply +■ It consists of switches (S) connected in series. This switch (S) corresponds to the semiconductor switching element of the integral clear circuit (ICG). AM diode (
The level of the cathode 1111 of D2) is raised to the level of the power supply. That is, the photosensor is set to the initial state. When the switch (S> is opened (after the integral clear signal (ICO3) disappears and the semiconductor switching element is turned OFF), the photodiode (Dl)'s light ta current is transferred to the photodiode (Dl) for charge storage via the PE7 circuit (QIO). The charge of the diode (D2) is discharged, and the cathode voltage of the charge storage diode (D2) decreases over time.In other words, photocurrent integration is performed, which is due to the increase in the amount of light incident on the photodiode (Dl). It can be considered that negative charges are accumulated at the cathode of the charge storage diode (D2) at a rate that depends on the intensity of the incident light.Therefore, it can be assumed that each photosensor accumulates charges at a rate that depends on the intensity of the incident light. Accumulation of charge in the sensor starts after the integral clear signal ([CGS) disappears, and ends when a shift pulse is input to the shift gate circuit (SG).In other words, the input of the shift pulse causes the photo sensor to accumulate. The accumulated charge is transferred to the CCD shift register (SR) by transfer pulses (φ1) and (φ2).

The transferred accumulated charges are sequentially output to the video signal output circuit (Vs) one cell at a time.

31st J No. (T 8 ), ('r 9 ) is 7 t l
-Sensor array (PA), brightness monitor circuit (MC)
, basic signal generation circuit (R8), video signal output circuit (V
s) and a ground terminal for supplying 10 V of power to the terminal.

(MF') is a light-receiving element for brightness monitoring, which is placed near the photosensor array (PA). Including these, these also constitute a photoelectric conversion section. The brightness monitor circuit (MC) is F E ′
r circuit (Q 1 ), (Q 2 >, (Q 3 )) and a capacitor (cl), F E 'r circuit (Q
1>, the Q gate is connected to the integral clear circuit (lCQ), conducts by the integral clear signal (ICO3), and connects the gate of the FET circuit (Ql), (C2) and the capacitor (C1) ( Jl) to the power source of 10■. The light receiving element (MP) for brightness monitoring performs the same movement fj as described for the photosensor, that is, after the integral clear signal (ICGS) disappears, the light receiving element (MP) for ki degree monitoring performs the same movement fj as described for the photosensor. A negative charge is accumulated in the capacitor (C1) at a corresponding speed, and the FET circuits (C2> and (C3) constitute a buffer,
A voltage (AGCOS) equal to the voltage at the connection point (Jl) is output from the terminal (Tl) pulled out from the connection point of the T circuit <02> and (C3).

The 51st column shows the temporal change in this output voltage <AGCOS), and (ρ1) to (J27>) indicate that the rate of voltage drop changes depending on the brightness.

Note that the rising waveform shown in the figure represents induced noise due to the integral clear signal (ICGS).

Returning to the third [21I], the reference voltage generation circuit (R8) is
FET circuit (Q −i ), (Q 5 ), (Q
6) and a capacitor (C2),
The shoulder monitor circuit (M
They are exactly the same as C), and because they are manufactured in the same integrated circuit, their characteristics are also the same. Therefore, the reference voltage of the terminal (I2) immediately after the partial clear signal (ICGS) disappears (
D.

S) and the voltage (AGCOS) at the brightness monitor circuit (MC>T1) terminal are almost the same. For this reason,
It can be used as a Buddhist monk voltage for determining Jl of the voltage that decreases over time.

The video signal output circuit (Vs> is an FET circuit (C7).

(C8), (Q9) and a capacitor (C3), and the connection point (J3) connects the FET circuit (C7) and the FET circuit.
[i! l path (C8) gate and capacitor (C3)
In addition, it is connected to the output of the CCD shift register (SR). The gate of the FET circuit (C7) is connected to the (I4) terminal of the transfer pulse (φ1), and this pulse (φ
Each time 1) is input, the FET circuit (C7) becomes conductive, the capacitor (C3) is charged to the level of the power supply voltage of 10 V, and the video signal output circuit (Vs) is reset. After that, the transfer pulse (φ1) causes the capacitor (C3
) is performed by discharging the charge according to the accumulated charge of the CCD shift register (SR) to be transferred, and the terminal (
A voltage corresponding to each photosensor is output from I3) as a video signal (O8) for each pixel, and they collectively form a video signal.

FIG. 6 shows the CCD shift register (S) in this embodiment.
This is a map showing the division of functions of each cell in R). cell is 1
from number 128 to number 128, and number 27 between number 31 and 57.
The cells correspond to the image sensor (11) in FIG. 2, and the 35 cells numbered 80 to 114 correspond to the image sensor (I2) in FIG. Image sensor (I
First of all, the number of cells in the part corresponding to 2) is large.
The 27 cells corresponding to the image sensor (11) and the 27 cells corresponding to the image sensor (I2) from 80th to 106th are compared, and then the 27 cells from 81st to 107th are shifted by one pixel. The outputs corresponding to the image sensor (I2) are shifted one by one, and then the outputs corresponding to the image sensor (I2) are compared one by one, and then the outputs corresponding to the image sensor (I1) are compared with the 27 cells from 87th to 114th. This is to compare corresponding outputs.

One focus, front bin, and back bin are determined by correlating the results of each comparison.

Cells 1 to 3 are empty feed cells, and cells 4 to 15
Up to half of the reference area is a black reference area covered with a light-shielding mask made of aluminum evaporation to prevent light from entering completely, and the electrical characteristics have changed slightly due to this aluminum evaporation.

FIG. 7 shows a circuit configuration of an embodiment of the present invention.

In this circuit configuration, the control circuit (11) and the arithmetic determination circuit (12) are constituted by a microcomputer (hereinafter referred to as microcomputer), which will be described later. Release button (
(not shown) by pressing the first stroke of the switch (Sl
) is detected by the control circuit (11), the control circuit (11) starts controlling focus detection. First, the control circuit (11) outputs an integral clear signal (ICGS) to the photoelectric conversion circuit (10), resets each photosensor to its initial state, and uses the signal (ICGS) to control the brightness monitor circuit (MC). Increase the output (AGCOS) to the initial state power supply voltage level +3 times! let Then, at the same time as this integral clear signal (ICGS) disappears,
Each photosensor of the photoelectric conversion circuit (10) starts light integration, and the brightness monitor circuit (MC) starts measuring the brightness of the subject, and its output (AGCOS> changes from the initial state at a speed according to the brightness of the subject. The gain control circuit (5) uses the reference voltage (DO3>, which is the output of the reference voltage generation circuit (R3)), and the brightness monitor circuit (M
The output of C>(AGCOS>) is input, and the reference voltage (
Other reference voltages for the 4th stage based on DO3> are created internally, and these voltages and the brightness monitor voltage (AG
COS) and determine the gain. Integral clear signal (
A predetermined time T M 1 (32+a
The output of the brightness monitor circuit (MC) (AGC
When the voltage drop of OS) is large and becomes below a predetermined voltage, a high level (TINT) signal is output from the gain control circuit (5), and the control circuit (11) and the AND circuit (AN)
is output to.

The above-mentioned (TINT) is used as the input of the AND circuit (,AN).
The signal and the SH pulse enable signal (SHEN) from the control circuit 1\8 (11) are input, and the output signal is output to the OR circuit (OR). The output of the OR circuit (OR) is input to a shift pulse generation circuit (6), and in response, the shift pulse generation circuit (6) outputs a shift pulse (S11>) to the photoelectric conversion circuit (10).This signal (SH), each photosensor of the photoelectric conversion circuit (1o) completes the integration, and the N-multiplied charges are transferred to the CCD shift register (S).
In this embodiment, by providing an AND circuit (AN), 0 is transferred in parallel to the corresponding cell of (T
If the CCD pixel data is not usable after the INT> signal is generated, the SH pulse enable signal (SHEN) from the control circuit (11) is set to the LJ level, thereby preventing data from being sent to the CCD pixel register. It is possible to prohibit transfer. Note that the (TINT) signal is used as a TINT interrupt signal in the control circuit (11).

On the other hand, the control circuit (11) outputs a clock pulse (CL) to the transfer pulse generation circuit (7) from the time when the imaging preparation switch (Sl) is turned on. Based on the clock pulse, this transfer pulse generation circuit (7) outputs transfer pulses (φ1) and (φ2) whose phases are shifted by 180 degrees from each other. )
When the output becomes High level, a transfer pulse (φ1) that rises in synchronization with this is output. In other words, the transfer pulse (φ1) is synchronized with the shift pulse (Sl-1>, but since the CCD shift register (SR) has a slight photosensitivity, the shift pulse (SH
) and the transfer pulse (φ1) are not synchronized,
The CCD shift register (
SR) senses light, and charges corresponding to the intensity of the light are accumulated as false signals. Therefore, the transfer pulse (φ1) is synchronized with the shift pulse (S) to eliminate the above-mentioned lag time and to prevent the generation of erroneous signals. After this, the transfer pulses (φ1), (φ2>
is sent to the photoelectric conversion circuit (10). Photoelectric conversion circuit (1
0) is synchronized with the falling edge of (φ1) among these transfer pulses, the charge stored in the CCD shift register (SR) is transferred to the video signal in order from the end of the cell (cell number 1 in Figure 6). (O8) and is output to the subtraction circuit (4). The video signal (O3) has a lower voltage as the intensity of light entering the corresponding photosensor becomes stronger.
The voltage (DO3-O3) subtracted from the reference voltage (DO3>) by the subtraction circuit (4) is output as a pixel signal.

After the integral clear signal (ICGS) disappears, the output voltage (AGCOS) of the brightness monitor circuit (M c ) does not become lower than the predetermined voltage within the integral control time T M 1 (32 m5ec), and the output voltage from the gain control circuit (5) If the (TINT) signal is not output, r81TNi 1 (
32m5ec), the control circuit (11) outputs a shift pulse generation command signal (SHM) to the shift pulse generation circuit (6) through the OR circuit (OR). The shift pulse generation circuit (6) receives this signal and outputs a shift pulse (SL-1) to the photoelectric conversion circuit (10), and transfers the accumulated charge of the photosensor array (PA) to the CCD shift register (SR). Then, as in the case described above, the video signal output circuit (Vs) outputs the video signal <O3) by the transfer pulses (φ1) and (φ2), and the subtraction circuit (4) outputs the video signal (()O3-O5). ) is output as the iii image signal. The peak hold circuit (1) receives pixel signals (Dos-os) corresponding to the 7th to 10th aluminum mask portions of the CCD shift register (SR) and outputs them from the control f11 circuit (11). It receives the incoming sample hold signal (S/H) and holds those pixel signals.This signal is output to the variable gain amplifier circuit (2), and this signal and the 11 output from the subtraction circuit (4)
The pixel signals after the pixel signal are subtracted by the variable gain amplifier circuit (2), and the output of this difference is amplified with a gain controlled by the gain control circuit (5). This amplified signal is A/D
The signal is A/D converted by the conversion circuit (3) and output as pixel signal data to the calculation/determination circuit (12) via the control circuit (11). On the other hand, the gain control data obtained by the gain control circuit (5) is also passed through the control circuit (11) to the calculation discrimination circuit (
12), and as a result, the calculation determination circuit (12) performs calculations on both data.

As a result of this calculation, when it is determined that focus detection is possible,
The amount of image shift until in-focus is calculated by a calculation/discrimination circuit (12). Further, the driving amount of the lens corresponding to the amount of image shift is determined based on the pixel signal data by the arithmetic determination circuit (1).
2) and output to the lens driving device (8).

This drive device (8) drives the at shadow lens (9) by the amount of drive IfjJ of the lens. And the photographic lens (9
) until it reaches the in-focus position II1. II 111 circuit (11) repeats the sequence from generation of integral clear signal < IC08) to lens drive. When it is determined that focus detection is not possible as a result of the focus detection calculation, the display circuit (13) indicates that focus detection is not possible. Display is performed.

When focus detection is determined to be impossible due to low brightness (LO-LIGHT), if focus detection using auxiliary light is possible, focus detection using auxiliary light is performed by a command from control circuit &8 (11). I do.

FIG. 8 shows an example of the seventh I2I gain control circuit (5) and variable gain amplifier circuit (2). In Figure 8,
(Tl 1), (Tl 2>, (1'l 3) are terminals connected to the terminals (T 1 ), (T 2 ), and (73) in FIG. 3, respectively. (T14) is the setting After the integration limit time TM1 (32asec) has elapsed, the control circuit (1
1) Shift pulse generation command signal (SHM
), (T15) is the terminal for inputting the fifth
[Output when entering zone (E) in 2I (
TINT) signal output terminal (T 16 ”) is an output terminal for outputting the pixel signal amplified by the variable gain amplifier circuit (2) to the A/D conversion circuit (3). (Bl)
.

(B2>, (B3) are buffers, (4) is a subtraction circuit that subtracts the video signal (voltage) O8 and the reference voltage (DOS>),
(1) is a peak hold circuit that holds dark output correction data.

First, to explain the gain control circuit (5), after the integral clear signal (IC ('3S) disappears, the brightness monitor circuit (M
A comparator (ACI) that determines the degree of drop in the output voltage (AGC (, Is)) of C) in steps.

(AC2), (AC3), and (AC4) are provided.

The inverting input of each comparator is connected to the output voltage (A G C0
8) are respectively connected to the input terminals (Tll). Comparators (A C1), (A C2), (A C
3), the non-inverting input of (AC4) is the connection point (J4) between the resistor (R4) and constant current (154), the connection point (J5) between the resistor (R3) and constant current (Is3), and the resistor ( Resistors (R1>, (R2), ( R3) and (R4> are connected to the terminal (T12>) into which the reference voltage (D'O3> is input via the buffer (B2).The reference voltage of the comparator is connected to the reference voltage generation circuit (R3). The output voltage of (
The voltage obtained by multiplying (resistance value) and (constant current value) is subtracted from DOS>.If you choose the resistance value and constant current value appropriately, you can create any reference voltage. It is possible. By inverting the reference voltage of the desired comparator in steps in this way, it is possible to invert the comparator in steps according to the degree of drop in the output voltage (AGCO3) of the luminance monitor circuit (MC>). The outputs of the comparators <ACl), (AC2>, and (AC3>) are D flip 70 tubes (DF 1) and (DF2>, respectively).
, (L)R3) is input to the data terminal (D).

A shift pulse generation command signal (S)IM) of the ft1l lit Eljl path (11) is input to the clock pulse input terminal (CP) that determines the timing at which data is stored in these D flip-flops. Alternatively, the shift pulse command signal (SHM) is input to the clock pulse input terminal (CP) after the elapse of the precision limit time T M 1 <32 m5ec), and at this timing, the comparators (AC1) and (AC2 >, the output signal of the comparator (AC4) that takes in the information of (AC3) (
e) is the (TINT) signal that is output when the output voltage (80C03) of the brightness monitor circuit (MC) enters the zone (E) in FIG. 5 within the integration limit time. The AND circuit (ANl) inputs the output Q of the D flip-flop (DPI>) and the output ○ of the D flip-flop (DF2), and the AND circuit (AN2>
The output Q of the D flip-flop (DF2) and the output Q of the D flip-flop (DF
The output Q of 3) is input, and the output signals are (b) and (c), respectively.
), and the output signal at the output port of the D flip-flop (DPI>) is (a), and the output signal of the D flip-flop <D
Let the output signal of the output Q of F3) be (d), and these signals (a), (b), (c), (d) and (
TINT) signal (e) respectively corresponds to zone (A) in FIG.
), (B), (C).

It corresponds to (D) and (E). The conditions of these signals are shown in Table 1.

Among these signals, (a), (b), (c),
(d), the gain corresponding to each (3S7) is set in the variable gain amplifier circuit (2) described next. In the variable gain amplifier circuit (2), (OP) is an operational amplifier, and its input Terminals (f) and (g) are input resistance (R5)
, (R6), are connected to the subtraction circuit (4) and the sample bold circuit (1), respectively. Resistance (R5) ~ (
R14) is a resistor that determines the gain, and resistors (R5),
(1', 6).

If the resistance values of (R7), (R8), (R11), and (R12) are r, then the resistances (R9) and (R13) are 2'', the resistance (RIO), and (R14> are 4''). Set the resistance value to have the resistance ratio.
) is an analog switch, and the above (a), (b), (
After receiving the signals c) and (d), the analog switch (ASI
) to (AS 4 ) select resistors (R7) to (RIO) and determine the feedback resistance value of the operational amplifier (OP), whereas analog switches (AS5) to (AS8) select resistors (
R11) to [14] are selected to determine the bias resistance value of the operational amplifier 25 (OP). (a), (b) above
, (e) and (d) are respectively rHigh,
Analog switch (ASI) that conducts when it becomes 1 ~
(AS8) and the resistance and gain selected at that time are shown in Table 2.

(The following is a margin) Table 1 Table 2 No. 9 [Z is a block circuit diagram showing the overall configuration of a circuit that controls the operation of a camera using a photometric device according to the present embodiment. (21) is a microcomputer that performs sequence control of the entire camera, calculations for automatic focus adjustment, and calculations for exposure control.

(22) is an interchangeable lens, and this lens has a built-in ROM that stores various lens data.
The stored contents of the ROM are read out to the camera according to instructions from a microcomputer (21). (23) is
This is a motor that drives the lens and an autofocus control section that controls this motor, and is controlled by signals from a microcomputer (21). (24) is an autofocus detection section which is a circuit section excluding the control circuit (11) from the control circuit section (15) surrounded by the dotted line in the circuit diagram shown in Fig. 7, and (25) is a circuit section from the microcomputer (21). (26) an exposure control unit that controls the shutter and aperture based on the data of the
is a photometry section including a light receiving element that measures light over substantially the entire area of the photographic screen. (27) is a circuit that reads the code pattern of the film in which the characteristics of the film are shown as a code pattern (hereinafter referred to as DX code) on the container. (28)
is an externally mounted strobe that has an auxiliary light used for focus detection. (29) is a display unit that displays photographing information and the state of focus detection.

(Sl) is the shooting preparation switch that is turned on with the first stroke of the release button, (s2) is the release switch that is turned on with the second stroke of the release button to perform the release, and (113L SW) is the wavelength The whole or part of the light source or its cover is designed so that the output (intensity) of the light from the first light source increases as the length increases, but the output direction of the light remains almost constant even if the wavelength becomes longer. This is a switch that is turned on by the photographer's operation (%) when using a so-called blue flat light source.

The operation of the circuit composed of the above will be explained with reference to the schematic flowchart 1 of the microcomputer (21) shown in Fig. 10.The circuit 7 of the entire circuit is equipped with a battery (El) which is a power source. , the terminal (CLR) changes from “L” level to “14”.
” level is input, the microcontroller (21)
Execute the flow from step #0 6 Next, the microcomputer (21) initializes all input/output terminals and internal register flags, and turns the shooting preparation switch (Sl) to OFF.
Determine whether the AF is set to N (#5.10). If the two (sl) of
The clock to the detection unit (24) is stopped, and in the flow, the rotation of the motor that drives the lens is stopped, photometry and autofocus are stopped (#15 to 25), and all the displays are turned off and the power supply is turned off. L・Langister (T
ri) to 0FFL, reset all flags to 1, and proceed to step #10 (#3o to -40>.

When the photographing preparation switch (sl) is turned on in step #10, the clock to the AP detection unit (24) is started by hardware, and the flow proceeds to step #45, where the power supply transistor (Tri) is turned on. Power is thereby supplied to each circuit. The microcomputer (21) sets the metering to star 1, reads the DX code, and inserts the interchangeable lens (22).
This input method of inputting lens information from (#50 to #60) is disclosed in, for example, Japanese Patent Laid-Open No. 60-4915, but will not be described here because it is not directly related to the present invention.

This input information includes the maximum aperture value, a signal indicating whether or not the lens is capable of detecting focus, the aperture value when the lens is wide open (the largest aperture value), and the defocus I motor. Conversion coefficient for converting to the rotation speed (
KL) is input.

Next, the AF operation is started, and the integration is performed on the CCD (#65.70>. When the integration in step #7o is performed a predetermined number of times (four times in the embodiment), the video data is input, and this data is is calculated based on a predetermined calculation formula to obtain the defocus position (#75.80).Based on this calculation result, it is determined whether or not focus detection is possible,
If this is not possible, predetermined processing is performed to adjust the brightness of the spot part of the shooting screen ([1vsp) and the brightness of approximately the entire screen (B
VAV) (#85.90, 105, 110),
On the other hand, if focus detection is possible in step #85,
At this time as well, a predetermined process is performed to determine whether the brightness of the spot part is locked. If it is locked, the process goes to step #110; if it is not locked, the process goes to step #105 (#95 , 100). Microcomputer (21)
After calculating the brightness of approximately the entire screen (BVAV), calculate the brightness for exposure from the brightness of the spot portion (B VSII) and the brightness of approximately the entire screen (BVAV) (#115),
Then, the exposure value is determined and displayed (#115 to 125>).

Next, it is determined whether the release switch (S2) is turned on, and if it is turned on, the lens drive motor is stopped and the f! The switch (S) performs output control.
If 2) is not turned on, the process moves to step #10 and the subsequent flow is executed.

11, 12, and 1UjU show a detailed flowchart 1 from the start of AP operation in step #65 in FIG. 10 to the photometry calculation in step #115. To explain, in step #145, It is determined whether the auxiliary light flag indicating the light emission mode is set, and if it is not set, the process moves to step #160, and if it is set, the light emission flag indicating the auxiliary light emission is set and the auxiliary light is activated. Outputs a signal indicating light emission (#14
5-155). As a result, auxiliary light is emitted.

Next, the microcomputer (21) resets the counter register for spot photometry (#160).

Here, a description will be given of photometry of a spot portion using a monitor light receiving element used for AF detection.

The microcomputer (21) is provided with a register for timer counting, which counts the elapsed time from the start of integration, so that the count value is added to the counter register by 1 every 2 μsec.

By reading this count value, the brightness of the spot portion can be determined. When the integration time passes 32m5ee, the integration ends, so it is no longer possible to use the integration time to determine the brightness. Therefore, when the integration time passes 32m5ec, the brightness is determined by detecting the output of the monitor of the light receiving element. It will be done. Specifically, this is performed using AGC data and pixel output for amplifying CCD integral data. Tables 3 and 4 show the relationship between the brightness of this spot, the contents of the counter register, and the AGC data. By value is 13 to 3
The values up to 1 are the contents of the counter register, and the By values from 2 to -1 are the AGC data and the CCD below the monitor light receiving section.
Calculating the average of pixels (31-57) (see Figure 6)
, and the unit of the By value is ' / * B v. To explain this, when the BV value is 13 to 3 = i, the By value is adjusted at the maximum bit where 1 is set. As a numerical value, the lower 3 bits are '/2Bv,'
/4By,'/sBv.

For example, let a++ be the largest bit with a value of 1, and...
a+-, ++az++asr&@'H' ・= ・・
' ・1010..., then the brightness at that time is
5・(18Bv), the By value is from 2 to -1,
The integer value of the By value is determined from the AGC data and is 1/. By
The unit is determined from the pixel output of the CCD. In addition, as another method of determining brightness, the By value can be calculated using AGC data 1°2.
．． 1.5, 0.5, -0.5 for 4, respectively,
Then, using half the voltage that the CCD pixel can take as a reference,
The average of COD pixels is the deviation from this base value, 1/,
Find ΔBv in Ev units and use the above By value of 1.5, 0.5
．． It is also possible to correct it to -0.5.

(The following is a margin) The flowchart in Table 3 and FIG. 1 shows the details of step #70 for CCD integration. Without referring to FIG. 1, the method for determining the average integration time will be explained. First, the microcomputer (1) starts the CCD for 1 minute, and also resets and starts the 311 Pulmo timer (#500 to 5) to prohibit SH pulse generation.
10) Then, a certain period of time (32 msec) is counted in order to regulate the maximum value of the CCD integration time. CCD
[If the integration ends before the maximum value of minute time is reached, T
An INT interrupt occurs, a flag (TITF) indicating this is set, and the process proceeds to step #520 (#615). When a certain period of time (32m5ec) has been counted, the process also proceeds to step #52o, and the callan 1-shita Read the integral time timer value from the accumulator (Ace)', transfer the contents of register 3 to register 4, transfer the contents of register 2 to register 3, transfer the contents of register 1 to register 2, and transfer the contents of the accumulator (ACC). Replace with register 1 (#5
(#54L ~#
543), where the variable N is a variable that is reset to 0 when the switch (Sl) is turned off, as shown in FIG. 10, and counts the number of integrations. When the value of variable N is 4 or more, the contents of the four registers mentioned above are added, divided by 4 to find the average, and stored in register 5 (#545). In this example, register 5 is used as a counter register. It is said that

Next, it is determined whether the integrated pixel data is "acceptable"(#550). If it is unusable, for example,
During data dumping, if the previous data has not been processed yet (if it is very bright), the next data cannot be used, so proceed to step #605 and CC
Start D-integration, reset and start the timer, and return to the step before the interrupt (#605, 6
10).

When integrated pixel data can be used, the SH pulse enable signal (SHEN) is set to the "■ (" level.T1 N
'r interrupt, at this point the S[(shift pulse is generated from the pulse generation circuit (#55)
2) Next, determine whether the flow is from the TiN2 interrupt using the inclusion flag (TITF), and if it is set, reset this flag (TITF) and reset the low brightness flag (L L F ). Te, Stella 7# 585
Proceed to (#555 to #565).

When the flag (TITF) is not set, that is, when a certain period of time (32 msec) is counted,
Set the low luminance flag (LLF), set the SH pulse enable signal (SHEN) to rH level, and generate a shift pulse from the shift pulse generation circuit (#570.#5
80), then the SH pulse enable signal (SHEN) is set to “L”.
” level and stop the auxiliary light emission (#585,
# 590), start the CCD MY minutes,
Reset and start the timer, step #75
Proceed to the data dump flow (#595.#600
).

Next, the microcomputer (21) inputs the CCD data that has been integrated. At this time, the peak hold circuit (1) outputs a sample hold signal for holding data. Based on this input data, defocus calculation is performed to obtain defocus violet (△ε), and based on this result, it is determined whether or not focus detection is possible. If focus detection is possible, Stella 7 Proceed to #215, step #21
In step 5, the low contrast flag (LCF) indicating low contrast I is reset, and the defocus I (Δε)
is smaller than a predetermined value (ε1) (#22
0), if it is smaller than this predetermined value (tl), it indicates that it is in focus, and if it is smaller, the focus flag (focus F) is set.
to display the focus (#225.230>,
On the other hand, if Stella 7 #220 determines that it is not in focus, it sets the focus flag (focus F) and multiplies defocus 1 by the conversion coefficient (KL) input from the interchangeable lens (22). Find the rotational movement of the motor Ji (n) e and drive the motor by this amount (number of rotations) (#23
5 to 245>, and when the in-focus display is performed, the process similarly proceeds to step #100, where a flag (BvspL F ) indicating that the brightness value of the spot portion has been locked is determined, and this flag is reset. If so, step #28
If it is set, the process advances to step #320.

If it is determined in step #85 that focus detection is not possible, a low contrast flag (LCF) is set.

Reset the focus flag (focus F). (#250.2
55), then determine whether the gain data (AGCn) is 2 or more, and if it is less than 2, it is determined as low contrast 1-, and the motor that drives the lens is driven to detect the contrast. (#275.280), If the gain data (A If the auxiliary light cannot be emitted, the process goes to step #275; if the auxiliary light can be emitted, the auxiliary light flag (
I set the auxiliary light F) and proceed to step #285.
#270) In 'L' step #285, the low luminance flag (LLF) indicating low luminance is set to 'l'JJ, and if this flag is set, 11 obtained data<AGc)3
Based on this, the brightness of the spot part (Bvsp
), and then in order to find the unit '/sBv, the output data (
Brightness (Bvsp) is calculated by averaging the values (already input in the data dump) and converting them to 18 Bv. Then, if the low brightness flag is not set, the contents of the counter register are determined and the brightness of the spot (Bvsp) is determined (#
285 to 305), when the switch (BLSW) indicating the use of a specific light source such as blue flat is turned on, the brightness of the spot (Bvsp) is set to a predetermined value! Add only (0,5Ev) to find a new brightness (B vsp) (#310
゜315>, if not ON, step #3
Skip step 15 and proceed to step #320 in the same way as step #315.

In step #320, the luminance of approximately the entire screen (BVAVO) is input from the photometry circuit (26), and the open aperture value (Ay, ) of the lens is added to this (#320, 325).

In the following cases, the brightness of approximately the entire screen ([1VAV) is used as the brightness for exposure (#37
0).

(i) When the low contrast flag (LCF) is set (#330), this means that if black detection is not possible, it is not clear where the spot part is metering, and the This is because there is a possibility that photometry will not be performed for the subject.

(11) When the light emission flag (light emission!?) indicating that the fill light has been emitted is set (#335), near-infrared light is emitted toward the subject as the fill light, so the subject brightness is certain. This is because it cannot be obtained.

(iii) When the brightness (Bvsp) of the spot portion is -1 or less (#340). The first reason for this is that for a subject that is so dark, there is no difference between average photometry and spot photometry, and another reason is that -1 or less cannot be considered as a specific brightness.

(iv) When a lens that cannot detect focus is attached (
#345), This is because in the optical system shown in Figure 2, when the maximum aperture value becomes large, part of the luminous flux is eclipsed, and the light incident on the monitor is not constant for the same subject brightness. . This is true not only when the maximum aperture value is large, but also for lenses with anti-qt targets.

(V) Effective aperture value (Avo, nominal open aperture value) in the retracted state and effective aperture value (Avo, nominal open aperture value) in the extended state
l ) when the difference is 0.5 Ev or more (#350)
The light receiving element for monitoring measures the brightness (Bvsp) of the subject itself, regardless of the open aperture value of the lens (effective aperture value in the retracted state) unless it is eclipsed by the aperture. &e, when performing control using the number of aperture steps from the open aperture value, since the number of aperture steps is the same, the effective aperture value (Av.) in the above-mentioned retracted state and the effective aperture value (Av.) in the extended state v*+) appears as an error.

In the above five cases, for each reason, the brightness of approximately the entire screen (BVAV) is used as the brightness for exposure (#3
30 to 350, 370>, in cases other than the above, proceed to step #355, and check whether the absolute value of the difference between the brightness of the spot (Bvsp) and 5r4 degrees (I3VAV) of approximately the entire screen is 2 or more. If there are 2 or more, use the spot brightness (B vsp) for exposure when shooting in a backlit situation or on a stage (or use the spot brightness weighted with the spot brightness and the average brightness). If it is less than 2, the average of both h° is taken as the brightness for exposure (#360, 365).

Next, the process advances to step #375, and when the focus flag (focus F) is set, the flag (B vsp lock F) is set so that the spot area is memorized in the next photometry, and the focus flag is set. Sera!・When not done,
Skiruff step #380.

The process then proceeds to the exposure calculation flow in step #120 shown in FIG.

The above is the flowchart 1 of the microcomputer (21) according to the tree embodiment.

In addition, in the above explanation, all CCD pixels (31 to 57) were averaged as a method for calculating brightness in units of 17°Bv using AGC data, but CCD pixels (
You may take the average of the maximum and minimum values of 31 to 5)) and convert this to breath in Bv units.

(Effects of the Invention) As described above, the present invention includes a focus detection means that performs focus detection using an integral type focus detection element, and an integration time that controls the integration time of the heat detection element. In the photometry device equipped with a control means, the integration time for multiple integrations is stored, the average value of the stored integration times is calculated, and the photometry value is obtained from this average value. Even when the brightness of the subject changes from moment to moment, such as during photometry, the inconvenience of the photometry value fluctuating each time is eliminated, and the effect is that the correct brightness of the subject can be obtained. be.

In addition, in order to obtain the above average value as quickly as possible, the photometry time can be shortened by performing so-called renormalization integration, which performs integration during data dump or calculation, and using the integration time at that time. Therefore, it is convenient.

[Brief explanation of drawings]

Fig. 1 is a flowchart for explaining the operation of an embodiment of the present invention, Fig. 2 is a schematic configuration diagram of an optical system used in the above embodiment, and Fig. 3 is a diagram of a photoelectric conversion section used in the above embodiment. 4 is a circuit diagram for explaining the principle of operation of the main parts of the photoelectric conversion section same as above, and FIG. 5 is a characteristic diagram showing temporal changes in the output voltage of the brightness monitor circuit used in the above embodiment.
6UA is a schematic configuration diagram showing the configuration of a CCD shift register used in the above embodiment, FIG. 7 is a block circuit diagram showing the circuit configuration of the above embodiment, and FIG. 8 is a gain control circuit and a FIG. 9 is a block circuit diagram showing the overall configuration of a circuit that controls the operation of a camera using the same embodiment as above, and FIGS. 10 to 12 are circuit diagrams showing the structure of the variable gain amplifier circuit. It is a flowchart for explaining operation in an example. (11), (I2> is an image sensor, #65 to #9
5 is a focus detection step, (MC) is an 11-degree monitor circuit, <AC4) is a comparator, #520 to #540 are integration time storage steps, #545 is an integration time average value calculation step', #300. #305 is a step for training.

Claims (4)

[Claims] (1) A focus detection means that performs focus detection using an integral type focus detection element, an integration time control means that controls the integration time of the focus detection element, and an integration time that stores the integration time for multiple integrations. A focusing device comprising a storage means for determining the average value of the stored integration times, an averaging means for determining the average value of the stored integration times, and a photometry means for obtaining a photometric value from the average value of the integration times determined by the averaging means. A photometric device using a detection element. (2) The apparatus according to claim 1, wherein the photometry means is a photometry means that outputs a spot photometry value for a focus detection range by the focus detection element. Photometric device used. (3) In the apparatus according to claim 1, the focus detecting means performs a first integral operation after the first integral operation is completed and before the integral data obtained by the first integral operation is processed. The focus detection means drives the focus detection element so that the second integration operation is started, and the storage means is a memory that stores both the integration times required for the first and second integration operations. 1. A photometric device using a focus detection element, characterized in that: (4) In the apparatus according to claim 1, the photometric means is a photometric means that obtains a photometric value from the latest integration time when the number of times the accumulation time is stored in the storage means does not reach a predetermined number of times. A photometric device using a focus detection element characterized by: