JPS62188918A - Electric charge storage type photoelectric transducer element - Google Patents

Abstract

PURPOSE:To enable the storing time of electric charge to a storage to be controlled by using the suitably thinned-out photoelectric current output of a monitoring photosensitive element. CONSTITUTION:Monitoring photosensitive elements 101 are provided between each of a plurality of adjacent photosensitive elements 100 arranged like an array while sandwiching channel stoppers between the elements 100 and 101. The elements 101 produce photoelectric current corresponding to a luminance within the range that the elements 100 detect luminance distribution. However, the photoelectric current output of the elements 101 is thinned out every approximately equal interval and the electric charge corresponding to the sum total of the thinned-out photoelectric current output is stored in a monitoring charge storage C1. That is, since the storage output corresponding to a luminance in average within a luminance monitoring range is obtained, the saturation of the storage output in a high luminance and the shortage in the storage output in a low luminance are not generated. Further, since the photoelectric current from the elements 101 is suitably thinned out, the charge storing speeds of both can be substantially matched to each other. Accordingly, be observing the storage condition of the storage C1, the charge storage condition from a photosensitive portion to the storage can be substantially determined to enable a storing storage time to be controlled.

Description

Detailed Description of the Invention (Industrial Field of Application) The present invention relates to a charge accumulation type photoelectric conversion element suitable for use as a focus detection element of a camera, and more specifically relates to a charge accumulation type photoelectric conversion element suitable for use as a focus detection element of a camera. The present invention relates to a charge accumulation type photoelectric conversion element in which the photocurrent output from a monitoring light receiving element disposed between each light receiving part is appropriately thinned out for use in order to control time.

(Prior Art) Conventionally, a charge storage type photoelectric sensor such as a CCD line sensor has a plurality of light receiving sections arranged in an array and a plurality of storage sections that accumulate charges according to the amount of light received at each light receiving section. It has been proposed to use conversion elements as focus detection elements in cameras.

A CCD line sensor is suitable as a focus detection element because it can detect the luminance distribution of light in a portion where a plurality of light receiving sections are arranged. however,
The CCD line sensor does not detect the absolute amount of light received, but by looking at the relative value of the charge accumulated in the storage section, it can determine the brightness distribution of the light irradiated to each light receiving section. If the received light is too strong, the output from the storage section will be saturated and the output signal will be distorted, and if the received light is too weak, the output from the storage section will be low, resulting in poor S/N ratio. There is a same order. Therefore, a light-receiving element for brightness monitoring is placed near the array of the plurality of light-receiving parts, and the charge accumulation time in the storage part is controlled according to the brightness monitor output, and when the brightness is high, the charge is transferred to the storage part. It has been proposed to control the charge accumulation amount to an appropriate value by shortening the charge accumulation time in the storage section and lengthening the charge accumulation time when the luminance is low.

FIG. 14 is an explanatory diagram showing the distance measurement range (&) measured by the CCD line sensor and the photometry range (b) of the monitoring light receiving element provided near the CCD line sensor in the above conventional example. It is.

Here, the distance measurement range (a) can be seen by looking through the finder. The photometric range (b) is not actually shown and cannot be seen even when looking through the finder. There is a possibility that the amount of light incident on the line sensor is different.

(Problems to be Solved by the Invention) As mentioned above, when the light receiving element for the monitor is arranged near the CCD line sensor, the part viewed by the monitor part and the part seen by the CCD pixel part are different. The brightness of the two images may differ, which causes problems in photometry and focus detection as shown in (a) and (b) below.

(B) First, in the case of photometry, some areas of the monitor are not displayed as shown in Figure 14, so the photographer can
The subject to be photographed may be included only in the distance measurement ranges marked , >, but may not be included in the part of the monitor indicated by <b) in the figure, which may result in erroneous light measurement.

(b) Next, in the case of focus detection, the integration time is controlled by the output for the monitor, so the monitor part and the CC
If the brightness of the D pixel portion is different, the output of the CCD pixel may not fall within the required level range, and accurate focus detection may not be possible.

For example, if only a part of the monitor is very bright, the integration time to the CCD pixel will be short and the output level of the CCD pixel will be too low. Conversely, if only a part of the monitor is dark, the integration time to the CCD pixel will be too low. Since the integration time of CCD becomes longer,
Pixel output may become saturated.

Therefore, in order to measure the same range as the distance measurement range seen by each light receiving part of the photoelectric conversion element, a monitor light receiving element is placed between each light receiving part. It is conceivable to monitor the brightness of the range and use this brightness monitor output to control the charge accumulation time in the storage section (
(Refer to the structure shown in FIG. 1(a)) In this case, the light receiving element for the monitor has a minimum size limit due to manufacturing problems, and currently, the size of the light receiving element for the monitor is as small as possible. The light from the light receiving element for each monitor is 1! Taking the total output power, when the monitor light receiving element is placed near the CCD image sensor (
14), the photocurrent output is larger, which shortens the integration time of the COD to the storage section, and there is a problem that the output level of the CCD pixel becomes smaller. When this output becomes small, there is a problem that accurate automatic focus detection is no longer possible, resulting in incorrect focus detection.

One possible solution to this problem is to increase the capacitance of a capacitor (see capacitor (C1) in FIG. 2) for integrating the photocurrent output from the monitoring light-receiving element. However, since the charge storage type photoelectric conversion element is refined on an integrated circuit, in order to increase the size of the capacitor, a large area must be secured, which increases the chip area of the IC and increases its own cost. There has been a problem in that not only this occurs, but also costs increase due to poor yield.

The present invention has been made in view of these points, and its purpose is to appropriately thin out and use the photocurrent output of a monitor light receiving element arranged between a plurality of light receiving sections. In order to achieve an appropriate level of accumulation from the light receiving section to the storage section without increasing the size of the charge storage section for integrating the photocurrent output from the monitoring light receiving element,
An object of the present invention is to provide a charge storage type photoelectric conversion element in which the time for storing charge in a storage section can be controlled.

(Means for Solving the Problems) In order to solve the above-mentioned problems, the charge storage type photoelectric conversion element according to the present invention is arranged in an array as shown in the attached drawings. The monitor includes a plurality of light receiving sections (CCD photodiodes (100)) and a plurality of accumulation sections that accumulate electric charges in accordance with the amount of light received in each light receiving section, and controls the accumulation time of charge in the accumulation sections. A monitor photodiode (101) is disposed between each light receiving section, and the photocurrent output from the monitor photodiode is thinned out at approximately equal intervals, depending on the sum of the thinned photocurrent outputs. A charge storage unit for monitoring (a capacitor (C1)) is provided to store the charge accumulated, and the storage time is controlled according to a monitor output (AGCO3) obtained from the charge storage unit for monitoring. It is something.

Note that the descriptions in parentheses here indicate correspondence with the examples, and are not intended to limit the scope of the invention.

(Function) In the charge storage type photoelectric conversion element of the present invention, the plurality of monitor light receiving elements disposed between the respective light receiving parts detect the luminance distribution within the range of the light receiving parts. Each generates a photocurrent output according to the current.

The photocurrent outputs of the monitoring light-receiving elements are appropriately thinned out, and charges corresponding to the sum of the thinned out photocurrent outputs are accumulated in the monitoring charge storage section.

As a result, the charge storage section for monitoring obtains an accumulation output according to the average brightness within the brightness monitor range, and the accumulation time from the light receiving section to the storage section is controlled according to this brightness monitor output. Ru. Therefore, inconveniences such as accumulated output saturation at high brightness or insufficient accumulated output at low brightness do not occur.In addition, the total photocurrent from the monitor photodetector is determined by minimizing the area of the monitor photodetector. Even if it is made smaller, it is normally larger than the photocurrent obtained at each light receiving element, but since the photocurrent from the monitoring light receiving element is thinned out appropriately, the storage area of each light receiving element is Compared to
Even if the capacity of the monitor charge storage section is not particularly increased, the charge storage speeds of both can be roughly matched.

Therefore, by looking at the charge accumulation state in the monitor charge accumulation section, it is possible to roughly know the charge accumulation state from the light receiving section to the accumulation section, thereby making it possible to control the accumulation time.

(Example) Preferred embodiments of the present invention will be described below with reference to the drawings.

FIG. 3 shows an optical system of a focus detection device used in a photometric device according to an embodiment of the present invention. In FIG. 3, (TL) is a photographing lens, (F) is a film equivalent surface, and (CL) is a Condenser lens, (L 1 ) and (L2) are imaging lenses, (M) is an aperture that restricts the light incident on the imaging lens, (
I1), (I2> are charge accumulation type image sensors °-
The image in the range A and H of the film equivalent surface (F) is captured by a condenser lens (CL), an imaging lens (LL),
(L2) by image sensor −<I 1), (I
2) Images (A 1 ), (B 1 ') and (A
2 ), reformed as (B 2 '). The image sensors (I 1) and (I 2) send two image signals corresponding to the intensity distribution of the two images formed thereon to a focus detection circuit refined by a microcomputer, and perform focus detection. The circuit determines the amount of image shift and the in-focus state by having a certain correlation between the respective image signals.

FIG. 2 shows the above-mentioned image sensors (Il) and (I2).
This figure shows a photoelectric conversion unit including:
A photosensor array (PA) consisting of P++Px+ HHH, P(n +), and Pn, an integral clear circuit (ICG) that initializes this photosensor array (PA)
, a shift gate circuit (SG) that transfers the accumulated charge stored in the photosensor array (PA) to a CCD shift register (SR) described later, R+, Rz, .
It is equipped with a CCD shift register (SR) consisting of R(n+z) and R(n+z). Here, the CCD shifter is a transfer unit that sequentially transfers the accumulated charges sent from the photosensor array (PA) to the video signal output circuit (Vs) in synchronization with the transfer pulses (φ1) and (φ2). The number of cells in the register (SR) is.

Cell R of the CCD shift register (SR), which has three more photosensors than the number of photosensors in the photosensor array (PA),
,R,,R, are for empty feeding, and each photosensor PxPx,...,P(n
+), the accumulated charge of Pn is generated by a shift pulse (S
H) of the CCD shift register (SR) cell R,
, Rs, ・--, R(n+2>, R(n+3>) are transferred in parallel.As shown in Figure 4, each photosensor utilizes the junction capacitance of a photodiode (Dl) and a PN junction. Charge storage diode (D2), photodiode (Dl) cathode and charge storage diode (D2)
) and the gate is grounded.
ET circuit (QIO), a switch (S) connected in series with the cathode of the charge storage diode (D2) and the power supply
). This switch (S) corresponds to the semiconductor switching element of the integral clear circuit (ICG), and this switch is closed (integral clear signal (ICG)
CGS) is sent and the semiconductor switching element is turned ON), the level on the cathode side of the charge storage diode (D2) is raised to the level of the power supply element V. That is, the photosensor is set to the initial state. When the switch (S) is opened (after the integral clear signal (ICGS) disappears and the semiconductor switching element turns OFF), F
Photodiode (Dl) via ET@ path (Q10)
The photocurrent discharges the charge in the charge storage diode (D2), and the cathode voltage of the charge storage and storage diode (D2) decreases over time. In other words, photocurrent integration is performed, which is performed by the charge storage diode (Dl) at a speed corresponding to the intensity of light incident on the photodiode (Dl).
It can be considered that negative charges are accumulated on the cathode of 2).

Therefore, it is considered that each photosensor accumulates charge at a rate corresponding to the intensity of incident light. Accumulation of charges in the photosensor starts after the integral clear signal (ICGS) disappears, and ends when a shift pulse is input to the shift gate circuit (SG). That is, the accumulated charge of the photosensor is transferred to the CCD shift register (SR) by inputting a shift pulse. In the CCD shift register (S R), transfer pulses (φ1>, (φ2))
The transferred accumulated charges are sequentially output to the video signal output port N (VS) one cell at a time. (T8) and (T9) in Fig. 2 are photosensor array (PA), brightness monitor times N (M
C>, reference signal generation circuit <R3>, video signal output circuit (
These are a power supply terminal and a ground terminal for supplying power +■ to Vs).

FIG. 1(a) shows the configuration of a photosensor array (PA). (100) is a CCD photodiode which is a light receiving part of a CCD, and (101) is a monitor photodiode which is a light receiving element for monitoring.

A monitor photodiode (Lot) is placed between the CCD photodiodes (100). Channel stoppers (102) are provided on both sides of the monitor photodiode (101) to prevent charge movement between the monitor photodiode (101) and the CCD photodiode (100). Monitor photodiodes are divided into those that are used for monitoring and those that are not used. This is to correspond to the area of the monitor light receiving section shown in Figure 14.
The ratio used for monitoring can be changed depending on the thickness of the photodiode for monitoring shown in Figure 1 (a).
In the figure, the cathode of the unused photodiode is connected to the power supply +■, but it can also be connected to an oven.
The luminance monitor circuit (MC) and the reference signal generation circuit (R
8>, these including the video signal output circuit (Vs) also constitute a photoelectric conversion section.

The brightness monitor circuit (MC) is a FET circuit (Ql).

(Q 2 ), (Q 3 ') and capacitor (C1)
The gate of the FET circuit (Ql) is connected to the integral clear circuit (ICG), and the gate of the FET circuit (Ql) is connected to the integral clear signal (ICG).
CGS) conducts, FET circuit (Ql), (C2)
Pull up the connection point (Jl) between the gate of and the capacitor (C1) to the power supply terminal ■. A monitor photodiode (101) for monitoring brightness performs the same operation as the circuit shown in FIG. 4 described above. That is, after the integral clear signal (ICGS) disappears, the monitor photodiode (101) accumulates negative charges in the capacitor (C1) at a speed corresponding to the intensity of the incident light. The FET circuits (C2) and (C3) constitute a buffer, and the FET circuits (C2>, (C3)
) A voltage (AGCO3>) equal to the voltage at the connection point (Jl) is output from the terminal (T1) pulled out from the connection point of the connection point (Jl).

FIG. 5 shows the temporal change of this output voltage (AGCO8), and (C1) to (I7) show that the speed of voltage drop changes depending on the brightness. Note that the rising waveform shown in the figure is the integral clear signal (IC
GS) represents the induced noise.

Returning to FIG. 2, the reference voltage generation circuit (R8) is a FET
It consists of circuits (Q 4 ), (Q 5 ), (Q 6 ) and a capacitor (C2), and the connection point (J2
) is connected only to the gates of the FET circuit (C4) and FET circuit (C5), and to the capacitor (C2). Since they are created internally, their characteristics are the same. Therefore, the reference voltage (D) of the terminal (I2) immediately after the disappearance of the integral clear signal (ICGS).

S) and the voltage at the brightness monitor circuit (MC>T1) terminal (A It can be used as

The video signal output circuit (Vs) is a FET circuit (C7).

(Q 8 ), (Q 9 ') and capacitor (C3
), and the connection point (J3) is an FET circuit (C7
) and the gate and capacitor (C8) of the FET circuit (C8)
3), it is also connected to the output of the CCD shift register (SR). The gate of the FET circuit (C7) is connected to the (I4) terminal of the transfer pulse (φ1), and each time this pulse (φ1) is input, the FET circuit (C7) becomes conductive and the capacitor (C3) is connected to the power supply voltage. The voltage is charged to the level of the slave V, and the video signal output circuit (Vs) is reset.

Thereafter, the transfer pulse (φ1) causes the capacitor (C
3) repeatedly discharges the charge according to the accumulated charge of the CCD shift register (SR) to be transferred, and each A voltage corresponding to the photosensor is output as a video signal (OS) for each pixel, and these together form a video signal.

FIG. 6 shows the CCD shift register (S) in this embodiment.
This is a map showing the division of functions of each cell in R). cell is 1
from number 128 to number 128, and number 27 between number 31 and 57.
The cell corresponds to the image sensor (11) in FIG.
The 35 cells numbered 0 to 114 correspond to the image sensor (section 2) in FIG. First of all, the number of cells corresponding to the image sensor (I2) is large: 27 cells corresponding to the image sensor (11) and cells numbered 80 to 106 corresponding to the image sensor (I2). 27
Image sensor (I2) This is to sequentially compare the outputs corresponding to the image sensor (11) while shifting the outputs corresponding to the image sensor (11) one by one.

In-focus, front focus, and rear focus are determined by correlating the results of the respective comparisons.

Cells 1 to 3 are empty feed cells, and cells 4 to 15
Up to half of the reference area is a black reference area covered with a light-shielding mask made of aluminum evaporation to prevent light from entering completely, and the electrical characteristics have changed slightly due to this aluminum evaporation.

FIG. 7 shows the circuit configuration of an automatic focus detection device using the charge accumulation type photoelectric conversion element of the present invention. ). The control circuit (11) turns on the switch (Sl) by pressing the first stroke of the release button (not shown).
When detected, the control circuit (11) starts controlling focus detection.

First, the control circuit (11) outputs an integral clear signal (ICGS).
is output to the photoelectric conversion circuit (10), each photosensor is reset to the initial state, and the above signal (ICGS) is output to the photoelectric conversion circuit (10).
The output (AG) of the brightness monitor circuit (MC) is determined by
COS) is restored to the initial power supply voltage level. Then, at the same time as this integral clear signal (ICGS) disappears, each photosensor of the photoelectric conversion circuit (10) starts light integration, and the brightness monitor circuit (MCGS)
starts measuring the brightness of the subject, and its output (A G C
OS) drops from the initial state power supply voltage at a speed corresponding to the subject brightness.

The gain control circuit (5) uses the reference voltage (DOS) that is the output of the reference voltage generation circuit (R3) and the brightness monitor circuit <M
The output of C> (AGCO8) is input, and the reference voltage (D
Other reference voltages in four stages based on the OS) are created internally, and these voltages and the brightness monitor voltage (A
COS) and determine the gain.

Predetermined time TM from disappearance of integral clear signal (ICGS)
Brightness monitor circuit (MC) within 1 (32m5ec)
When the voltage drop of the output (AGCO3) is large and becomes below a predetermined voltage, the gain control circuit (5) outputs a Higb level (TINT) signal, which is output to the control circuit (11) and the OR circuit (OR). . This output signal has OR times n(
The shift pulse generating circuit (6) outputs a shift pulse (SH) to the photoelectric conversion circuit (10) in response to the shift pulse generating circuit (6). This signal (SH) causes each photosensor of the photoelectric conversion circuit N (10) to complete integration, and the accumulated charges are transferred in parallel to the corresponding cells of the CCD shift register (SR).

On the other hand, the control circuit (11) outputs the tarok pulse (CL) to the transfer pulse generation circuit (7) from the time when the imaging preparation switch (Sl) is turned on. Based on the clock pulse, this transfer pulse generation circuit (7) outputs transfer pulses (φ1) and <φ2) whose phases are shifted by 180° from each other. The transfer pulse generation circuit (7) is an OR circuit (OR)
When the output becomes High level, a transfer pulse (φ1) that rises in synchronization with this is output. In other words, the transfer pulse (φ1) is synchronized with the shift pulse (SH), but since the CCD shift register (SR) has slight photosensitivity, the shift pulse (SH) and transfer pulse (φ1) are synchronized. If the CCD shift register (SR) is not synchronized, the CCD shift register (SR
) senses light, and a charge corresponding to the intensity of light is accumulated as a false signal. Therefore, the transfer pulse (φ1) is changed to the shift pulse (
SH) to eliminate the aforementioned time lag and prevent the generation of erroneous signals. Thereafter, the transfer pulses (φ1) and (φ2) are sent from the transfer pulse generation circuit (7) to the photoelectric conversion circuit (10). The photoelectric conversion circuit (10) transfers the charge stored in the CCD shift register (SR) from the cell end (cell number 1 in Figure 6) in synchronization with the falling edge of (φ1) among these transfer pulses. The signals are sequentially outputted as a video signal (O8) and outputted to the subtraction circuit (4). The video signal (O8) has a lower voltage as the intensity of light incident on the corresponding photosensor increases, and the voltage (DOS-OS) subtracted from the reference voltage (DOS) by the subtraction circuit (4) is output as a pixel signal.

After the integral clear signal (ICGS) disappears, the output voltage (AGCO8) of the brightness monitor circuit (MC) does not fall below the predetermined voltage within the integral control time T M 1 (32 m5ec), and the gain control circuit R (5) If the (TINT) signal is not output from the integration limit time TM 1 (32m5
ec), the control circuit (11) outputs a shift pulse generation command signal (SHM) to the shift pulse generation circuit (6) through the OR circuit (OR). The shift pulse generation circuit (6) receives this signal and generates a shift pulse (SH
) is output to the photoelectric conversion circuit (10), and the accumulated charge of the photosensor array (PA) is output to the CCD shift register (SR
). Then, as in the case described above, the video signal output port B (Vs
) outputs a video signal (OS), and the subtraction circuit (4) outputs (DOS-OS> as an image signal. The peak hold circuit (1) outputs a CCD shift register (SR).
) When the pixel signals (Dos-os>) corresponding to the 7th to 10th aluminum mask portions of
H) and hold those pixel signals. This signal is output to the variable gain amplifier circuit (2), this signal and the 11th and subsequent pixel signals output from the subtraction circuit (4) are subtracted by the variable gain amplifier circuit (2>, and the output of this difference is , and is amplified with a gain controlled by a gain control circuit (5).

This amplified signal is A/D converted by an A/D conversion circuit (3) and outputted as pixel signal data to an arithmetic/discrimination circuit B (12) through a control circuit (11). On the other hand, the gain control data obtained by the gain control circuit (5) is also
1) to the arithmetic discrimination circuit (12), and as a result, the arithmetic discrimination circuit (12) performs arithmetic operations on both data.

As a result of this calculation, when it is determined that focus detection is possible,
The amount of deviation of the image until it comes into focus is calculated by the calculation/discrimination aperture F1B (12). Further, a lens drive amount corresponding to the amount of image shift is also calculated by the calculation/discrimination circuit (12) based on the pixel signal data, and is output to the lens driving device (8). This drive device (8) drives the photographing lens (9) by the amount by which the lens is driven. Then, the control port R (11) repeats the sequence from generation of the integral clear signal (ICGS) to lens drive until the photographing lens (9) reaches the in-focus position.As a result of the focus detection calculation, the focus detection is disabled. When it is determined, the display circuit (13) displays that the focus cannot be detected. When focus detection is determined to be impossible due to low brightness (LO-LIGHT), if focus detection using auxiliary light is possible, a command from the control circuit (11) causes focus detection to be performed using auxiliary light. conduct.

FIG. 8 shows an example of the gain control circuit (5) and variable gain amplifier circuit (2) shown in FIG. In Figure 8, (T
11), (T 12>, and (713) are the terminals connected to the terminals (T 1 ), (T 2 ), and (T 3 ) in FIG. 2, respectively. (T14) is the set integration limit. After time TM1 (32m5ec), the control circuit (1
1) Shift pulse generation command signal (SHM
), (T15) is the terminal for inputting the fifth
Output when entering zone (E) in the figure (TI
NT) signal output terminal (T16) outputs the pixel signal amplified by the variable gain amplifier circuit (2) to the A/D conversion circuit (3).
This is an output terminal for outputting to. (Bl).

(B2) and (B3) are buffers, (4) is a subtraction circuit that subtracts the video signal (voltage) O8 and the reference voltage (DOS), and (1) is a peak hold circuit that holds dark output correction data. .

First, to explain the gain control circuit (5), after the integral clear signal (ICGS) disappears, the brightness monitor number N (M
A comparator (ACl>) that determines in steps the extent of the drop in the output voltage (AG COS>) of C>.

(AC2), (AC3), and (AC4) are provided.

The inverting input of each comparator is connected to the output voltage (A G C08) of the brightness monitor circuit (MC) via the buffer (B1).
) are respectively connected to the input terminals (Tll).

Comparator (A C1), (A C2>, (A C3)
), (AC4) non-inverting inputs are the connection point (J4) between the resistor (R4) and constant current (IS4), the connection point (J5) between the resistor (R3) and constant current (IS3), and the resistor (R2). ) and the constant current (IS2>) and the connection point (J7) between the resistor (R1) and the constant current (ISI), respectively.

The resistors (R1), (R2), (R3), and (R4) are connected to a terminal (TI2) to which a reference voltage (D OS ) is input via a buffer (B2). The reference voltage of the comparator is the output voltage (
The voltage obtained by multiplying (resistance value) and (constant current value) is subtracted from (DOS), and any reference voltage can be created by selecting the resistance value and constant current value appropriately. is possible. By creating the desired reference voltage for the comparator in steps in this way, the comparator can be inverted step-by-step depending on the degree of drop in the output voltage (AGCOS) of the luminance monitor circuit (MC). It becomes possible.

The outputs of the comparators (ACl), (AC2), and (AC3) are D flip 70 tubes (DPI) and (DF2), respectively.
), (DF3) are input to the data terminals (D>).

A shift pulse generation command signal (SH
M) is input. Specifically, the integral limit time TM 1
(32m5ec) after the shift pulse command signal (
SHM) is input to the clock pulse input terminal (CP), and at this timing the comparator (ACl), (A
The output signal (e) of the comparator (AC4), which takes in the information of C2) and (AC3), indicates that the output voltage (AGCOS) of the brightness monitor circuit (MC) within the integration limit time reaches the zone ( (TIN) output when entering E)
T) It is a signal. The AND circuit (ANl) receives the output Q of the D flip-flop (<DPI) and the output Q of the D flip-flop (DF2) as inputs, and
2) uses the output Q of the D flip-flop (DP2) and the output ○ of the D flip-flop (DF3) as inputs,
The output signals are shown as (b) and (e), respectively. Also, the output signal of the output 0 of the D flip-flop (DPI>) is (a)
, the output signal of the output Q of the D flipflop (D F 3 >) is (d), and these signals (n), (b)
, (c), (d) and (TINT) signal (e) correspond to zones (A), (B), and (C) of FIG. 5, respectively.

It corresponds to (D) and (E). Table 1 shows the states of these signals.

Among these signals (a), (b), (c)
, (d), the gain corresponding to each signal is set in the variable gain amplifier circuit (2) described next. In the variable gain amplifier circuit (2), (OP) is an operational amplifier, and its input terminals (f) and (g) are input resistors (R5),
(R6') are connected to the subtraction circuit (4) and the sample and hold circuit (1), respectively. Resistance (R5) ~ (
R14) is a resistor that determines the gain, and resistors (R5),
(R6).

If the resistance values of (R7), (R8), (R11), and (R12) are ``, then the resistance ratio is such that the resistances (R9) and (R13) are 2r, and the resistances (RIO) and (R14) are 4r. (ASI) to (AS8) are analog switches, and (a), (1+),
Upon receiving the signals (c) and (d), the analog switches (ASI) to (A S 4 ) connect resistors <R7) to (R).
, O) and determine the feedback resistance value of the operational amplifier (OP), whereas the analog switches (A S 5 ) to (
AS8) selects the resistors (R11) to (R14) and determines the bias resistance value of the operational amplifier (OP). Said (
The correspondence between the analog switches (ASI) to (AS8) that become conductive when each of the signals in a), (b), (c), and (d) becomes rHigJ, and the resistance and gain selected at that time are as follows. It is shown in Table 2.

(The following are blank spaces) Table 1, Table 2, and FIG. 9 are professional circuit diagrams showing the overall configuration of a circuit for controlling the operation of a camera using the above-mentioned automatic focus detection device. (21) is a microcomputer that controls the entire camera.

(22) is an interchangeable lens, and this lens has a built-in ROM that stores and stores various lens data.The contents of the ROM are read out to the camera by commands from the microcomputer (21). It has become. (23) is a motor that drives the lens and an autofocus control section that controls this motor, and is controlled by signals from the microcomputer (21). (24) is an autofocus detection section which is a circuit section excluding the control circuit (11) from the control circuit section (15) surrounded by the dotted line in the circuit diagram shown in Fig. 7, and (25) is a circuit section from the microcomputer (21). an exposure control unit (26) that controls the shutter and aperture based on the data of
) is a photometry section including a light receiving element that measures light over substantially the entire area of the photographic screen. (30) is a fluorescent lamp detection circuit which inputs the output of the photometry section and detects whether or not the light source is a fluorescent lamp. (
27) is a circuit that reads the code pattern of the film in which the characteristics of the film are shown as a code pattern (hereinafter referred to as DX code) on the container. (28) is an externally mounted strobe, which has an auxiliary light used during focus detection. (29) is a display unit that displays photographing information and the state of focus detection. (sl) is a shooting preparation switch that is turned on with the first stroke of the release button, (S2
) is the release switch for performing the release upon the second stroke of the release button 'C-0N, (BLSW)
The light source, or its cover as a whole, or When using a so-called blue flat light source in which a portion of the light source is blue, the light may be turned off by the photographer's operation.
This is a switch for N.

The operation of the circuit composed of the above will be explained with reference to the schematic flowchart of the microcomputer (21) shown in FIG. ) from “L” level to r )(”
A signal that changes the level is input, and the microcomputer (21) executes the flow from step #0. Next, the microcontroller (
21) Initialize all input/output terminals and internal register flags, and turn on the shooting preparation switch (Sl).
(#5.10). When this switch (Sl) is OFF, the clock to the AP detection unit (24) is stopped by hardware, and in the flow, the rotation of the motor that drives the lens is stopped, and photometry and autofocus are stopped ( #15-25). Then, turn off all the displays and turn off the power supply transistor (Tri).
0FFL, reset all flags, and proceed to step #
10 (#30-40).

When the photographing preparation switch (Sl) is O'N in step #10, the clock to the AF detection section (24) is started by hardware, and the flow proceeds to step #45, where the power supply transistor (Trl) is turned on. do. Power is thereby supplied to each circuit. The microcomputer (21) starts photometry, reads the DX code, and inserts the interchangeable lens (22).
This input method of inputting lens information from (#50 to #60) is disclosed in, for example, Japanese Patent Laid-Open No. 60-4915, but will not be described here because it is not directly related to the present invention.

This input information includes the open aperture value, a signal indicating whether or not the lens can detect focus, the aperture value when the lens is fully extended in the open state (largest aperture value), and the amount of defocus when the motor rotates. Conversion coefficient for converting to number (
KL) is input.

Next, start the AP operation and have the CCD perform integration (#65.70). When the integration is complete, input the video data, calculate this data based on a predetermined calculation formula, and calculate the defocus amount. Based on this calculation result, it is determined whether focus detection is possible or not. If it is not possible, predetermined processing is performed to determine the brightness (Bvsp) of the spot part of the shooting screen and the brightness of approximately the entire screen. Brightness (BVAV
) (#85.90,105,110), on the other hand,
If the focus can be detected in step #85, predetermined processing is performed at this time as well, and it is determined whether the brightness of the spot portion is locked. If it is locked, step #85 is performed.
110/\, if not locked, step #1
Proceed to 05 (#95.100>, the microcomputer (21) is
After calculating the brightness of approximately the entire screen (B VAV), calculate the brightness of the spot portion (B vsp) and the brightness of approximately the entire screen (B VAV).
The brightness for exposure is determined from the VAV) (#115), and the exposure value is determined and displayed (#115 to 125).

Next, it is determined whether the release switch (S2) is ON, and if it is ON, the switch (S2) stops the lens drive motor and performs exposure control.
) is not turned on, the process moves to step #10 and the subsequent flow is executed.

11 and 12 show detailed flowcharts from the AP operation start in step #65 in FIG. 10 to the photometry calculation in step #115. Determine whether the light flag is set, and if it is not set, proceed to step #160; if it is set, set a light emission flag indicating auxiliary light emission and output a signal indicating auxiliary light emission. (#145-16o).

This causes the primary microcontroller to emit the auxiliary light (
21) resets the counter register for spot photometry. Here, a description will be given of photometry of a spot portion using a monitor light receiving element used for AP detection.

The microcomputer (21) is provided with a register for timer counting, which counts the elapsed time from the start of integration, so that the count value is added to the counter register by 1 every 2 μsec.

By reading this count value, the brightness of the spot portion can be determined. When the integration time exceeds 32m5ec, the integration ends and the brightness cannot be determined using the integration time.Therefore, when the integration time exceeds 32m5ec, the brightness is determined by detecting the output of the monitor of the light receiving element. . Specifically, this is performed using AGC data and pixel output for amplifying COD integral data. Tables 3 and 4 show the relationship between the brightness of this spot portion, the contents of the counter register, and the AGC data. In the table, brightness is indicated by Apex value (B v).0 As is clear from the table, Bv values from 13 to 3 are the contents of the counter register, and Bv values from 2 to -1 are the contents of the counter register, and Bv values from 2 to -1 are the contents of the AGC data and monitor light reception. The average of the CCD pixels (31 to 57) under the section is calculated (see Figure 6).
The minimum unit of the Bv value is 18 Bv, and to explain this, for Bv values from 13 to 3, the highest bit with a 1 is considered an integer value of the Bv value, and the lower 3 bits are the integer value of the Bv value. in order '/2BV, '/4BV, 'B
It is set as v.

For example, if the a-th bit is the largest bit with a 1, ・'al
l+"IO+"-9al"'""'・' 10
10..., then the brightness at that time is 5.(18 Bv).For Bv values from 2 to -1, the integer value of the Bv value is determined by AGC data, and the unit is '/sBv. , C
It is determined from the OD pixel output. Also, to find another brightness, the Bv value is 1.5, 0.5, respectively, for AGC data of 1°2.4. −0.5, and C
Using half the voltage that the CD pixel takes as a reference, the average of the CCD pixels is taken as the deviation from this reference, and ΔBv in units of '/a-E v is determined, and the above Bv values 1.5, 0.5, . =0
．． It is also possible to correct it to 5.

(Left below) Return to the flowchart in Table 3, Table 4, and Figure 11. Microcontroller (21)
After resetting the contents of the counter, outputs a pulsed integration clear signal indicating the start of integration. Then, the timer that measures the integration time is reset and started (#170). As described above, during this integration, the counter register counts up every time the timer elapses by 125 μSee. If the monitor output reaches a predetermined value within 3'; 2 whsec from the start of m minutes, it indicates the end of integration (TINT)
A signal is output from the gain control circuit (5) to the microcomputer (21). The microcomputer (21) then performs step #1.
75, the process moves to step #200, the timer is stopped, and the low brightness flag (
LLF) and proceed to step #210 (#
200, 205), on the other hand, if the integration is not completed within 32 m5ec, the process proceeds from step #180 to #185 after 32m5ec has elapsed, and a shift pulse generation command signal (SHM) is output. Then, the timer is stopped, the low brightness flag is set, and the auxiliary light emission is stopped (#190.195.210>.Then, the microcontroller (
21) inputs the CCD data that has been integrated.

At this time, the peak hold circuit (1) outputs a sample bold signal for holding data.

Based on this input data, defocus calculation is performed to obtain the defocus amount (△ε), and based on this result, it is determined whether or not focus detection is possible. If focus detection is possible, step # In step #215, a low contrast flag (
LCF) and determine whether the defocus amount (Δε) is smaller than a predetermined value (ε1) (#220);
If it is smaller than this predetermined value (ε1), it indicates that the focus is on, and if it is smaller, the focus flag (focus F) is set and the focus is displayed (#225.230). If it is determined in #220 that the focus is not in focus,
Reset the focus flag (focus F) and attach the interchangeable lens (22
) Multiply the defocus amount by the conversion coefficient (KL) input from Similarly, when performing step #10
0, a flag (BvspLF) indicating that the brightness value of the spot portion has been locked is determined, and if this flag has been reset, the process proceeds to step #285, and if it has been set, the process proceeds to step #320.

If it is determined that focus cannot be detected in step #85, a low contrast flag (LCF) is set and a focus flag (
Reset the focus F). (#250.255) Next, it is determined whether the gain data (A G C) is 2 or more, and if it is less than 2, it is considered low contrast, and the motor that drives the lens is activated to detect the contrast. drive (#275.280), gain data (A G
If C) is 2 or more, it is determined whether or not the auxiliary light can be emitted (#265). Specifically, it is determined based on the signal from the strobe whether the strobe is attached and its power is turned on. If the auxiliary light cannot be emitted, step #275
If the light can be emitted, the auxiliary light flag (auxiliary light F) is set, and the process proceeds to step #285 (#270>).

In step #285, a low luminance flag (LL
F), and if this flag is set, input the gain data (A
．． In order to obtain the Bv unit, the output data (already input in the data dump) of the CCD pixels (31 to 57) are averaged and this is converted to '/@Bv to obtain the brightness (Bvsp).

If the low brightness flag is not set, the content of the counter register is determined and the brightness of the spot (Bv
sp) (#285-305), the switch (BLSW) indicating the use of a specific light source such as blue flat is on.
N, a predetermined amount (0,5Ev) is added to the brightness (B vsp) of the spot, and a new brightness (B vsp) is added to the brightness (B vsp) of the spot.
p) (# 310, 315). If not ON, step -# 315 is skipped and the process proceeds to step # 320 in the same way as step # 315.

In step #320, the luminance (Bv^v.) of approximately the entire screen is input from the photometry circuit (26), and the open aperture value (Avo) of the lens is added to this (#320.325).

In the following cases, approximately the brightness of the entire screen (BVAV) is used as the brightness for exposure (#370
).

(i) When the low contrast flag (LCF) is set (#3:30). This is because if focus detection is impossible, it is not clear where the spot section is photometering, and there is a possibility that the intended subject will not be photometered.

(ii) When the flash flag (flash F) indicating that the auxiliary light has been emitted is set (#335), near-infrared light is emitted toward the subject as the auxiliary light, so the brightness of the subject is certain. Because you can't get it.

(iii> When the brightness (Bvsp) of the spot part is -1 or less (#340), the first reason is that for such a dark subject, there is no difference between average metering and spot metering, and another reason is that This is because a value below -1 cannot be measured as a specific brightness.

(iv) When a lens that cannot detect focus is attached (
#345), This is because in the optical system shown in Figure 3, when the open aperture value becomes large, part of the light flux is eclipsed, and the light that enters the monitor is not constant for the same subject brightness. . This applies not only to large apertures, but also to reflective telephoto lenses.

(v) When the difference between the effective aperture value (Avo, nominal open aperture value) in the retracted state and the effective aperture value (AVQI) in the extended state is 0.5 Ev or more (#350). The light receiving element for monitoring measures the brightness (B vsp) of the subject itself, regardless of the open aperture value of the lens (effective aperture value in the retracted state), as long as there is no vignetting due to the aperture. Therefore, when controlling by the number of aperture steps from the open aperture value, the difference between the effective aperture value in the retracted state (AyO) and the effective aperture value in the extended state (Avo+) is because the number of aperture steps is the same. appears as an error.

(vi) When shooting under fluorescent lighting (#3
28), because under a fluorescent lamp, the brightness changes moment by moment within a certain period [1/(frequency twice the power supply frequency being used)] due to the characteristics of the fluorescent lamp. The monitor light-receiving element that performs spot photometry is not configured to smooth changes in brightness, and if the integration time is shorter than the period of the fluorescent lamp mentioned above, the In this embodiment, where the integration time changes and the brightness of the object is determined based on this integration time, the data on the brightness of the object changes each time the light is measured.

In the above six cases, for each reason, the brightness of approximately the entire screen (BVAV) is used as the brightness for exposure (#
328 to 350, 370), in cases other than the above, proceed to steps #3 to #5, and determine whether the absolute value of the difference between the brightness of the spot (B vsp) and the brightness of approximately the entire screen (BVAV) is 2 or more. If there are 2 or more, use the spot brightness (B vsp) for exposure (or use the spot brightness weighted with the spot brightness) for backlit shooting or stage shooting. (using the composite brightness from the average brightness), and if it is less than 2, the average of both is taken and used as the brightness for exposure (#360.365).

Next, proceed to step #375, and when the focus flag (focus F) is set, set the flag (Bvsp lock F) so that the spot area will be memorized in the next photometry, and the focus flag will be set. If not, step #380 is skipped and step #380 shown in FIG.
The process proceeds to step 120 of the exposure calculation flow.

The above is the flowchart of the microcomputer (21) according to this embodiment.

In addition, in the above explanation, all CCD pixels (31 to 57) are averaged to obtain the 1 Bv unit when calculating brightness using AGC data, but COD pixels (3
The maximum and minimum values of 1 to 5)) may be averaged and converted to 1 in Bv units.

FIG. 13 shows #10 in the flowchart of FIG.
5 shows a modified flow of the group No. 5. First, calculate the brightness by measuring the integration time (see Table 3). Then, take the total average of the pixel output or the average of the peak value and the bottom value, calculate the Ev unit to ', and calculate the above brightness. to correct. To briefly explain how to obtain this correction value, first, 172 of the possible ranges of pixel output are determined. Then, the range from this level to the highest value that the pixel can take is divided into 1 in Ev units, and when the average value is within this level range, it is added to the luminance obtained from a part of the monitor. Similarly, a level range is set for values below the 172 level in Ev units of 1, and when the average value obtained from the above pixel output is within this lower level range, the average value obtained from a part of the monitor is Subtract the amount of the level range from the brightness to obtain the brightness. Since the brightness obtained by this method is obtained based on the brightness distribution of the subject obtained on the CCD, more accurate brightness data can be obtained than when the brightness data is obtained from only a portion of the monitor.

(Effects of the Invention) As described above, in the present invention, since the light receiving element for monitoring is arranged between each light receiving part, the brightness distribution is determined by the plurality of light receiving parts arranged in an array. It has the effect of being able to monitor the brightness within the detection range, controlling the accumulation time according to the amount of light incident on the light receiving element, and controlling the photocurrent output from the monitoring light receiving element. Instead of using all of them, they are thinned out at approximately equal intervals, and charges corresponding to the sum of the thinned out photocurrent outputs are multiplied by N in a charge storage section for monitoring, and the charge storage section for monitoring is used to Since the storage time from the light receiving section to the storage section is controlled in accordance with the brightness monitor output, there is an advantage that there is no need to increase the size of the charge storage section for monitoring.

[Brief explanation of drawings]

FIG. 1(a) is a schematic configuration diagram of a charge storage type photoelectric conversion device according to an embodiment of the present invention, FIG. 1(b) is an equivalent circuit diagram of the main part of the same device, and FIG. 2 is a schematic diagram of the same device. 3 is a schematic configuration diagram of an optical system in an automatic focus detection device using the above element, and FIG. 4 is a circuit diagram for explaining the principle of operation of the main parts of the above photoelectric conversion section. FIG. 5 is a characteristic diagram showing temporal changes in the output voltage of the brightness monitor circuit used in the photoelectric conversion section as described above, and FIG. 6 is a schematic configuration diagram showing the configuration of a CCD shift register used in the photoelectric conversion section as described above. 7th
The figure is a block circuit diagram showing the circuit configuration of an automatic focus detection device using the above element, FIG. 8 is a circuit diagram showing the configuration of a gain control circuit and a variable gain amplifier circuit used in the above automatic focus detection device, and FIG. The figure is a block circuit diagram showing the overall configuration of a circuit that controls the operation of the camera using the automatic focus detection device as described above, FIGS. 10 to 12 are flowcharts for explaining the operation of the camera as described above, and FIG. 13 14 is an explanatory diagram showing the distance measurement range and photometry range in the conventional example. (100) is a CCD photodiode, (101) is a monitor photodiode, (C1) is a capacitor, (A
G COS > is the brightness monitor output.

Claims (1)

[Claims] (1) A monitor that is equipped with a plurality of light receiving sections arranged in an array and a plurality of accumulation sections that accumulate charges according to the amount of light received at each light receiving section, and controls the time for which charges are accumulated in the accumulation sections. A monitor light receiving element is arranged between each light receiving part, and the photocurrent output from the monitor light receiving element is thinned out at approximately equal intervals, and a charge corresponding to the sum of the thinned out photocurrent outputs is accumulated. 1. A charge storage type photoelectric conversion element comprising a charge storage section, the storage time being controlled in accordance with a monitor output obtained from the monitoring charge storage section.