JPS6261374A - Manufacture of silicon diaphragm - Google Patents

Abstract

PURPOSE:To obtain a silicon diaphragm having a uniform thickness of a designed value by an electrochemical etching method by setting the impurity densities in each of the layers of P-N junction silicon substrate the same. CONSTITUTION:The boron density of a P-type silicon substrate 1 of a P-N junction wafer used for an integrated pressure sensor is set the same as phosphorus density of an N-type epitaxial layer 2. A piezo resistor 3 is formed by boron ion implanting or thermal diffusing, a P-type well 13 is formed on the thick periphery of the sensor, an N-channel MOS IC or bipolar IC is integrated to be used for processing a signal. When the substrate 1 is etched by an electrochemical etching method, a diaphragm is formed by automatically stopping when the etching arrives at the layer 2. Even if heating step is added, the movements of impurities in the respective layers cancel each other so that the thickness of the effective layer 2 does not alter.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method of forming a silicon diaphragm, and more particularly to a method of forming a silicon diaphragm using an electrochemical method.

[Conventional technology]

Conventionally, methods such as an etching time control method, an etching stop method using a high concentration boron layer, and an electrochemical etching method have been used to form a silicon diaphragm. For example, in the electrochemical etching method, a positive voltage is applied to the N-type layer of a PN junction substrate, and only the P-type layer is removed by etching.
TRANS-ACTIONS ON ELECTRON
DEVICES, VOL, ED-30, 7fL7.

JULY 1983)).

FIG. 2 shows a structural cross section of a PN junction wafer for a pressure sensor used in the electrochemical etching method.

In the figure, the P-type substrate 1 has a specific resistance of 3 in plane orientation (100).
The thickness is 175 μm. N-type layer 2 has a specific resistance of 23
Ω·α, thickness 28.3 μm. The piezoresistor 3 is of P type and is formed by ion implantation or diffusion techniques, and is etched by thinning the portion of the P type substrate 1 directly under the piezoresistor 3 by etching.

FIG. 3 shows a schematic diagram of the etching apparatus used in this method. In the figure, the quartz bead force is 4.

Fill with a quenching liquid 5 and heat the liquid 5 with a ζ heater 6.

Etching solution 5 is a mixture of ethylenediamine, pyrocatechol, and water. N-type layer 7 of silicon sea urchin...
A metal film 8 is deposited on the 0 surface, and a positive voltage of a power source 9 is connected using this metal film 8 as an electrode. In this state, the silicon wafer P-type substrate 10 is etched to form a diaphragm. The platinum electrode 11 used as the other electrode is grounded via an ammeter 12. The temperature of the etching solution was 115°C, the pressure was 0.6V. P
The mold substrate 10 is etched, and when the N-type layer 7 is reached, the etching is automatically stopped and a diaphragm having a uniform thickness is formed.

[Problem that the invention seeks to solve]

Incidentally, the sensitivity of a diaphragm type silicon pressure sensor is inversely proportional to the square of the film thickness of the diaphragm portion. Therefore, in order to manufacture a pressure sensor with small sensitivity variations, the film thickness must be accurately controlled. By electrochemical etching, the film thickness can be controlled within the variation of the epitaxial layer thickness.

However, there is a problem in that the thickness of the epitaxial layer changes due to movement of impurities due to heat treatment during the Zorocess process. For example, piezoresistors are made by implanting ions such as zolon,
It is formed by thermal diffusion, and impurities are redistributed during this heat treatment. The distribution of impurities is determined by the impurity concentration and temperature. For example, when the temperature is 1140°C, the diffusion coefficient of melon in silicon is 2X10'Cμ, and the diffusion coefficient of phosphorus is also 2X.
10' [Vn], impurities move from the high concentration region side to the low concentration region side. In the example shown in FIG. 2, since the concentration of P-type substrate 1 is higher than that of N-type layer 2, zolon moves toward N-type layer 2, and the actual epitaxial layer becomes thinner. Therefore, if the diaphragm is etched by an electrochemical method, the film thickness will be thinner than the designed value. Further, the thermal process may be continued even when piezoresistors are being formed. For example, in an integrated pressure sensor, the signal processing circuit is formed around the diaphragm, and when integrating an n-channel MO8 integrated circuit, it is necessary to form a deep P-type well in the N-type epitaxial layer. Since a high temperature of about °C is applied, the epitaxial layer becomes thinner due to the movement of impurities.

An object of the present invention is to provide a method for forming a silicon diaphragm using an epitaxial substrate that solves these problems.

[Means for solving problems]

The present invention is a method of forming a silicon diaphragm in which the impurity concentration of each layer of a PN junction silicon substrate is made the same in the step of forming the diaphragm by an electrochemical method.

[Effect]

By making the zolon concentration of the P-type silicon substrate and the phosphorus concentration of the N-type epitaxial layer the same, even when heat-treated at a temperature of about 1140°C, the impurity diffusion cancels each other out, and the actual thickness of the epitaxial layer changes. A silicon diaphragm with no cracks can be obtained.

〔Example〕

A method of forming a silicon diaphragm will be described below using an example shown in FIG. FIG. 1 is a cross-sectional view of the structure of an integrated pressure sensor. The P-type substrate 1 of the PNN junction sea urchin used in the present invention has a plane orientation (IOO) and an impurity concentration of, for example, IX
10'``cm-''.The N-type layer 2 is an epitaxial layer and has an impurity concentration of 1×10cWI, which is the same as that of the P-type substrate.
shall be. The piezoresistor 3 is formed by ion implantation or thermal diffusion of zolon. The peripheral thick wall part of the pressure sensor has P.
A type well 13 is formed, and an n-channel MO8IC or t
It integrates Ibora IC and is used for signal processing. When this PNN junction is etched by an electrochemical etching method in the same manner as in the prior art and the P type substrate 1 is etched, when the etching reaches the N type layer 2, the etching is automatically stopped and a diaphragm is formed.

In this way, in the present invention, when a diaphragm is formed by etching silicon using an electrochemical method, the impurity concentration in each layer is the same even if a thermal process is applied, so the movement of impurities cancels each other out, and the effective thickness of the epitaxial layer is increased. It doesn't change. The present invention is not limited to the impurity concentrations shown in the examples, but can also be obtained with other impurity concentrations.
゛Of course.

〔Effect of the invention〕

Therefore, according to the present invention, it is possible to obtain a silicon diaphragm having a uniform thickness in accordance with the design value using the electrochemical etching method.

[Brief explanation of the drawing]

FIG. 1 is a structural cross-sectional view of a silicon substrate showing an embodiment of the present invention, FIG. 2 is a structural cross-sectional view of a conventional diaphragm type pressure sensor, and FIG. 3 is an etching apparatus for forming a diaphragm. DESCRIPTION OF SYMBOLS 1... P type substrate, 2... N type layer, 3... Piezoresistance, 4... Quartz bead force, 5... Etching liquid, 6...
- Heater, 7 N-type layer, 8 Metal film, 9...
・Power supply, 10...P-type substrate, IJ...platinum electrode, 12
...Ammeter, J3...P-type well.

Claims (1)

[Claims] (1) A method for forming a silicon diaphragm, characterized in that the impurity concentration of each layer of a PN junction silicon substrate is made the same in the step of forming a silicon diaphragm using an electrochemical etching method.