JPS6258676A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide dielectric isolation films spaced from each other by a very small distance between first and second semiconductor film patterns for constituting base and emitter electrodes, by performing selective oxidation with the residual anti-oxidation film on the emitter region used as a mask. CONSTITUTION:A patterned thin SiO2 film 26 is formed on an Si substrate 20 having an anti-oxidation film 25. The anti-oxidation film 25 is etched with the patterned film 26 used as a mask. A semiconductor film 27 is then formed on the whole surface and is etched with a mask. A graft-base diffused layer is formed by the ion implantation. The patterned film 26 is etched away in the emitter and collector regions and is selectively oxidized to form an oxide film 29. After the anti-oxidation film 25 is removed, a second semiconductor film 31 is formed on the whole surface. Thereafter, ions are implanted to form an active base diffused layer 32. Ions are then implanted into the second semiconductor film 31 to form an emitter diffused layer 34.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a semiconductor film device having a structure with high speed and low power consumption.

In order to achieve high speed and low power consumption in conventional bipolar transistors, it is necessary to make the pattern finer and reduce the junction capacitance.

Therefore, in the past, polycrystalline silicon film (PolySi film) was used.
Consideration has been made to miniaturize the pattern and reduce junction capacitance by forming the base lead-out electrode. For example, [Journal Obso')tuto;1. Tate”j-kit JVOLySC-16,N.

5. Published by the Institute of Electrical and Electronics Engineers, October 1981 (I
EEEJOIIRNAL OF 5QLIO-3T
ATE C111CUTIS) VOl, 5C-16
, N05.0CTO8ER1981), Figure 3 (^
In the manufacturing steps shown in ) to (]1), a boron doped PolySi film 6a which becomes a base extraction electrode is formed. In FIG. 3, 1 is a P-type S1 substrate, 2, 1
3 is an N'' diffusion layer, 3 is an N epitaxial layer, 4 and 11 are P'' diffusion layers, 5.8.10 is a 5i02 film, 6 is a non-doped PolySi film, 6b and 12 are arsenic-doped PolyS
i film, 7 is Si3N4 film, 9 is Pl diffusion layer, 14
is metal.

Problems to be Solved by the Invention However, the conventional manufacturing method shown in FIG. 3 has the following problems.

(2) It is difficult to form the Po1ySi film 6b, which becomes the emitter electrode, with good viscosity and fineness. In other words, as shown in FIG. 3 ([]), the Pol VS i film 6 which becomes the emitter electrode is etched by the difference in etching rate between the boron-doped Pol ySi film 6a in which boron is ion-implanted using <5i02E8 as a mask and the non-doped Pol ySi film 6. Non-doped Po1ySillQ6 with high etching rate
Formed by etching. However, boron-doped Po
When the 1ySi film 6a is formed, the area under the 5i02 film 8 also becomes the boron-doped po+ys1 film 6a.

Therefore, it is necessary to side-etch the 5i3N41)07 so that the non-doped PolySi film 6 can be etched. Further, in order to completely separate the non-doped PolySi film 6 and the boron-doped PolySi film 6a, it is necessary to perform an error check by the thickness v of the non-doped PolySiG 6 a. Therefore, a side etch corresponding to at least the thickness of the non-doped Po1ySi film 6 occurs. Therefore, Poron dope Po
Intrusion of the lyS i film 6a under the region of the 5i02 film 8, side etching of the Si3N4 film 7, and variations in the film thickness of the non-doped Po1ySivA6.

Due to the influence of variations in etching time of the non-doped Po1ySi film 6, the non-doped Po+ySi film 6
The amount of side etch is different. As a result, the pattern dimensions of the non-doped Po1ySi film 6, which will become the emitter electrode, change, making it difficult to form it precisely and finely.

■ Boron-doped Po1yS that becomes the base extraction electrode
It is difficult to reduce the resistance of the i-film 6a. In other words, boron-doped Po1ySiWi6a has 5
102 By forming the film 10, 5i02'rIli10
(7) Approximately half of the Si film thickness is eaten away and becomes thinner, resulting in higher resistance. Therefore, boron doped Po1
In order to lower the resistance of the ySi film 6a, if the film thickness is increased, as described above, the amount of side etching of the non-doped Po1ySi film 6 under the region of the 5i02 film 8 becomes large, and the non-doped Po1ySi film that becomes the emitter electrode becomes large. The vJ degree of pattern size No. 6 decreases.

At the same time, the distance between the non-doped Po1ySi film 6 and the boron-doped Po1ySi film 6a becomes wider. There is a problem in that the resistance of the P+ diffusion decoy 11 increases, and the junction capacitance increases. In addition, boron-doped Po1ySillQ6 by oxidation
If the thickness of the 5102 film 10 is made thinner in order to reduce the erosion of the 5102 film 10, the insulation properties of the 5102 film 10 will become a problem.

■ When forming 5i02t1910, scratches are likely to occur. In other words, as shown in Figure 3(D), non-doped Po
After separating the 1ySilF 36 and the boron-doped Po1ySi film 6a by etching, the 5
When forming i0211910, non-doped Po1
Since the space between the yS1 film 6 and the poron-doped Po1ySi film 6a has a four-part shape, stress due to oxidation is applied to the recess. In this case, the narrower the interval, the greater the stress. Therefore, when molding with narrow intervals, defects due to threads are likely to occur, which causes a decrease in yield.

In view of these conventional problems, it is an object of the present invention to provide a method for manufacturing a semiconductor film device having characteristics of high speed, low temperature and $1 power, which solves these problems.

Means for Solving the Problems The method of manufacturing a semiconductor film device of the present invention includes a step of forming a thin film pattern on a semiconductor substrate on which an oxidation prevention film is formed, and etching the oxidation prevention film using the thin film pattern as a mask. a step of forming a first semiconductor film on the entire surface; a step of etching the first semiconductor film on the thin film pattern; a step of etching a desired region of the thin film pattern; and a step of etching the first semiconductor film on the thin film pattern. A step of forming an oxidation film, a step of etching the oxidation prevention film, a step of forming a second semiconductor film on the entire surface, a step of forming the second semiconductor film on the entire surface, and a step of etching the oxidation prevention film in a desired region. and forming a second semiconductor film pattern, the first semiconductor film serving as a base lead-out electrode and the second semiconductor film pattern serving as an emitter electrode are insulated and separated by the oxide film.

action With the above configuration, the present invention operates as follows.

■ The emitter region, graft base region, and base extraction electrode region are determined in a self-aligned manner by the thin film pattern.

■ By performing selective oxidation using the anti-oxidation film remaining on the emitter region as a mask, the area between the graft base diffusion layer and the emitter diffusion layer, the first semiconductor film serving as the base extraction electrode, and the second semiconductor film serving as the emitter electrode is removed. A 5102 film that insulates and isolates patterns at fine intervals can be formed.

■ By selectively etching the anti-oxidation layer over the emitter region. A fine emitter diffusion window can be formed in a self-aligned manner.

(2) The first semiconductor film and the second semiconductor film can be formed to have any thickness. Therefore, even if the oxide film that becomes the insulating valve M film is formed thick, the first semiconductor film that becomes the base extraction electrode with low resistance can be formed.

■ A thin film pattern can be used as a field insulating film and a flat surface can be obtained.

Example Hereinafter, the manufacturing method of the present invention will be explained based on specific examples.

FIGS. 1A to 1) show the manufacturing process of the first embodiment of the present invention. FIG. 1 shows the case of an NPN bipolar transistor. First, as in step A, an N1 diffusion layer 21, a P1 diffusion layer 22, an N epitaxial layer 23, and a 5i02 film 24 are formed.
After forming an Si3N4 film 25 as an oxidation prevention film on the P-type Si substrate 20, which is a semiconductor substrate, on which is formed a CVD-5i02 film pattern 26 as a thin film pattern. After that, this MWI! Using the pattern 26 as a mask, the Si3N4 layer 25 is etched.

Next, as in step B, a P layer as a first semiconductor film is applied to the entire surface.
An o1ySi film 27 is formed. After that, Kamamo pattern 2
A resist film 28 as an etching mask material is formed in the area other than on the etching mask 6, and using this resist film 28 as a mask,
Po1ySillA274 on 11Q pattern 26! :
Remove by etching. After that, Regis like Cheng C]
- removing membrane 28; Next, boron ions are implanted into the Po1ySi film 27 to form a graft base diffusion layer, and then the thin film pattern 26 in the emitter region and collector region is etched as in step 3. Thereafter, selective oxidation is performed using the Si3 N4 WA 25 as a mask to form a 5102 film 29. At this time, 51
The 02 film 29 is completely formed on the Po1ySi film 27 of the first semiconductor film, and the Si3N4 film 2 of the oxidation prevention film is completely formed.
It is also formed below 5. Also, due to this oxidation heat treatment, boron in the Po1ySi film 27 is diffused into the N epitaxial layer 23, and the graft base is expanded r'11. A P'' diffusion layer 30 is formed.

Next, after removing Si3N411925 as an oxidation prevention film as in step [, a second semiconductor film of Po1
A ySi film 31 is formed. After that, this Pa I vs.
Boron ions are implanted into the i-film 31 to form an active base diffusion layer, and a P4 diffusion layer 32 which becomes an active base diffusion layer is formed by heat treatment.

Next, as in step F, arsenic ions were implanted into the PolySi layer 31 of the second semiconductor film to form an emitter diffusion layer.
A N1 diffusion layer 34, which will become an emitter diffusion layer, is formed by heat treatment.

Next, as in step G, a second semiconductor film pattern 31' and a Si3N4 film 33' as an anti-oxidation film pattern are formed in the emitter region and collector region, and then the side surfaces of the second semiconductor film pattern 31' are formed by selective oxidation. ni5i0
Form 2v35.

Next, the Si3N4 film 33' of the oxidation prevention film pattern is removed as in step H to form a base contact window 36.

Next, if we perform AΩ wiring 37 as metal wiring,
An NPN type bipolar transistor is obtained as shown in FIG.

Although the first embodiment described above uses CVD-5i02 fJ as the thin film pattern 26, it is also possible to use an insulating thin film such as a photo-CVD-8i02 film or a plasma 5i02 film. Also, N epitaxial M2
Although the Si3N4 film 25 as an oxidation prevention film is directly formed on the Si3N4 film 25, a thin film 5102 may be formed in between.

In addition, in forming the graft base diffusion layer 30, the first
As shown in Figure (C), the Po1ySi film 27 as the first semiconductor film on the thin film pattern 26 was etched and then boron ions were implanted. or,
This may be done using a doped semiconductor film.

Figures 2A and 2B show a second embodiment. Figure 2 also shows the case of an NPN bipolar transistor, and in the first embodiment, S is coated as an anti-oxidation film over the entire surface as shown in Figure 1 (^).
Although the i3 N4 film 25 is formed, a Si3 N4 film 40 as an oxidation prevention film is formed and covered only in the active region, as shown in FIG. 2(A). For example, the oxidation prevention film used as a selective oxidation mask for the Si02 film 24 may be left intact. After that, a thin film pattern 26 is formed, and FIG.
) to FIG. 1 (If the same process as the old one is carried out and the Aρ wiring 37 is formed as a metal wiring, an NPN type bipolar transistor having a structure in which no antioxidation film remains as shown in FIG. 2(B) can be obtained.

Although the first and second embodiments have been described using NPN bipolar transistors, PNP bipolar transistors can also be obtained in a similar manner.

Effects of the Invention As described above, according to the method of manufacturing a semiconductor film device of the present invention, the following effects can be obtained.

(2) The first semiconductor film region, which will become a craft base diffusion layer region, an emitter region, and a base lead-out electrode, is determined in a self-aligned manner by the bookmark pattern.

■ By performing selective oxidation using the oxidation prevention film remaining on the emitter region as a mask, fine intervals are created between the first semiconductor film, which will become the base lead-out electrode, and the 20th semiconductor film, which will become the emitter electrode, in a self-aligned manner. An oxide film for insulation isolation can be formed.

■ The graft base diffusion layer and the emitter diffusion layer can be insulated and separated at minute intervals in a self-aligned manner without the need for mask alignment.

(2) The 5102 film formed on the side surface of the second semiconductor film serving as the emitter electrode can prevent metal wiring, for example, Aρ from entering the interface.

(2) By using the 'a film pattern as a field insulating film, a flat surface can be obtained.

As described above, the present invention reduces junction capacitance through isolation and miniaturization, and greatly contributes to high speed and low power consumption of bipolar transistors.

[Brief explanation of the drawing]

Figure 1 is a process diagram for explaining the manufacturing method of the first embodiment of this book, Figure 2 is a process diagram for explaining the manufacturing method of the second embodiment, and Figure 3 is a process diagram for explaining the manufacturing method of the second embodiment. The figure is a process diagram for explaining a conventional method of manufacturing an NPN type bipolar transistor. 25, 40...Si3 N4 film [antioxidation film], 2
6...CV[)-5i02 film 1g pattern, 27-P
o1ySi film (first semiconductor film), 29.3.5-・
・Si02 film, 31・Po1ySilEJ (second semiconductor film) Agent: Hiroshi Tsuru Morimoto Figure 3

Claims (1)

[Claims] 1. A step of forming an anti-oxidation film on one main surface of a semiconductor substrate, a step of forming a thin film pattern on the anti-oxidation film, and a step of forming the anti-oxidation film using the thin film pattern as a mask. a step of etching a first semiconductor film on the entire surface; a step of etching the first semiconductor film on the thin film pattern; a step of etching a desired region of the thin film pattern; A step of forming an oxide film by oxidation, a step of etching the antioxidant film, a step of forming a second semiconductor film on the entire surface, and a step of forming the second semiconductor film pattern in a desired region. A method of manufacturing a semiconductor device, comprising: insulating and separating the first semiconductor film and the second semiconductor film pattern using the oxide film. 2. The method of manufacturing a semiconductor device according to claim 1, wherein after forming the second semiconductor film pattern, an oxide film is formed on the side surface of the second semiconductor film pattern.