JPS6258621A - Fine pattern forming method - Google Patents
Fine pattern forming methodInfo
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- JPS6258621A JPS6258621A JP19893585A JP19893585A JPS6258621A JP S6258621 A JPS6258621 A JP S6258621A JP 19893585 A JP19893585 A JP 19893585A JP 19893585 A JP19893585 A JP 19893585A JP S6258621 A JPS6258621 A JP S6258621A
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Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、荷電ビーム描画装置と光縮小投影露光装置と
を併用して試料上に微細パターンを形成する方法に係わ
り、特に縮小投影露光による露光歪みを補正して荷電ビ
ーム描画を行う微細パターン形成方法に関する。[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a method of forming a fine pattern on a sample by using a charged beam drawing device and an optical reduction projection exposure device in combination, and particularly relates to an exposure method using reduction projection exposure. The present invention relates to a fine pattern forming method that performs charged beam drawing with distortion corrected.
近年、半導体ウェハ等の試料上に所望パターンを形成す
るものとして、光縮小投影露光装置や各種荷電ビーム描
画装置等が用いられているが、これらの装置にはそれぞ
れ次のような問題がある。In recent years, optical reduction projection exposure apparatuses, various charged beam lithography apparatuses, and the like have been used to form desired patterns on samples such as semiconductor wafers, but each of these apparatuses has the following problems.
即ち、光縮小投影露光装置は、スループッ１〜は高いが
、解像性が余り良くなくサブミクロンの微細加工には適
用できない。また、荷電ビーム描画装置は、解像性が極
めて高くサブミクロンの微細加工にも十分使用できるが
、スループットが低い。That is, although the optical reduction projection exposure apparatus has a high throughput of 1~, the resolution is not so good that it cannot be applied to submicron microfabrication. Furthermore, charged beam lithography apparatuses have extremely high resolution and can be used for submicron microfabrication, but their throughput is low.
そこで最近、光縮小投影露光装置と荷電ビーム描画装置
とを併用して用いる、所謂ハイブリッド露光が検討され
ている。この方法では、半導体記憶装置等の超微細化を
はかるために荷電ビーム描画の高解像性を利用してゲー
ト、コンタクトホール等の層を荷電ビームで描画し、他
の層を光縮小投影露光装置で露光することにより、微細
化及びスルーブツトの向上の双方を満足している。Therefore, recently, so-called hybrid exposure, in which an optical reduction projection exposure apparatus and a charged beam lithography apparatus are used in combination, has been studied. In this method, layers such as gates and contact holes are drawn using a charged beam, making use of the high resolution of charged beam drawing, in order to achieve ultra-fine miniaturization of semiconductor storage devices, etc., and other layers are drawn using optical reduction projection exposure. By exposing with a device, both miniaturization and throughput can be improved.
しかしながら、この種の方法では、光縮小投影露光装置
による転写パターンと荷電ビーム描画装置による描画パ
ターンとの重ね合わせ精度が低いと云う欠点がある。即
ち、光縮小投影露光装置による露光の際に装置固有の露
光歪みが生じ、この露光歪みの影響で露光パターンの層
と描画パターンの層との間の重ね合わせ精度が低下する
。そして、各層の重ね合わせ精度が低下すると、パター
ン加工精度が低下することになる。However, this type of method has a drawback in that the accuracy of overlapping the transferred pattern by the optical reduction projection exposure device and the drawn pattern by the charged beam lithography device is low. That is, during exposure using an optical reduction projection exposure device, exposure distortion inherent to the device occurs, and the overlay accuracy between the exposed pattern layer and the drawn pattern layer decreases due to the influence of this exposure distortion. If the overlay accuracy of each layer decreases, the pattern processing accuracy will decrease.
本発明は上記事情を考慮してなされたもので、その目的
とするところは、光縮小露光による転写パターンと荷電
ビーム描画による描画パターンとの各層の重ね合わせ精
度を向上させることができ、パターン加工精度の向上を
はかり得る微細パターン形成方法を提供することにある
。The present invention has been made in consideration of the above circumstances, and its purpose is to improve the overlay accuracy of each layer between a transfer pattern by optical reduction exposure and a drawing pattern by charged beam lithography, and to improve pattern processing. An object of the present invention is to provide a method for forming fine patterns that can improve accuracy.
（発明の概要〕
本発明の骨子は、光縮小投影露光と荷電ビーム描画とを
併用して微細パターンを形成する際に、光縮小投Ｖｅ露
光による露光歪みを補正して荷電ビーム描画を行うこと
にある。(Summary of the Invention) The gist of the present invention is to perform charged beam writing by correcting exposure distortion caused by optical reduction projection Ve exposure when forming a fine pattern using both optical reduction projection exposure and charged beam writing. It is in.
即ち本発明は、試料上で荷電ビームを走査し該試料上に
所望パターンを描画すると共に、試料表面す日らの荷電
ビームを検出して試料上に形成されたマークの位置を測
定する手段を備えた荷電ビーム描画装置と、マスク上に
光を照射し該マスクのパターンを試料上に縮小転写する
光縮小投影露光装置とを併用し、試料上に微細パターン
を形成する方法において、前記光縮小投影露光装置によ
り試料上に複数の露光歪み測定測定用マークを形成し、
前記荷電ビーム描画装置により上記露光歪み、Ｉ１１定
用マークの位置を測定して前記光縮小投影露光装置によ
る露光歪みの量を予め求めておき、前記荷電ビーム描画
装置により所望パターンを描画する際に、上記水められ
た露光歪みを補正するようにした方法である。That is, the present invention provides means for scanning a charged beam on a sample to draw a desired pattern on the sample, and for detecting the charged beam on the sample surface to measure the position of a mark formed on the sample. A method for forming a fine pattern on a sample by using a charged beam lithography device equipped with the same and an optical reduction projection exposure device that irradiates light onto a mask and reduces and transfers the pattern of the mask onto the sample. A projection exposure device forms multiple exposure distortion measurement marks on the sample,
The amount of exposure distortion caused by the optical reduction projection exposure device is determined in advance by measuring the exposure distortion and the position of the I11 regular mark by the charged beam drawing device, and when drawing a desired pattern by the charged beam drawing device. This is a method for correcting the above-mentioned reduced exposure distortion.
本発明によれば、光縮小投影露光による露光歪みを補正
して荷電ビーム描画を行っているので、上記２つの露光
を混用した場合において、各層のパターン重ね合わせ精
度の向上をはかり１ｑる。このため、パターン加工精度
を著しく向上させることができる。According to the present invention, since charged beam drawing is performed by correcting exposure distortion caused by optical reduction projection exposure, the pattern overlay accuracy of each layer is improved by 1q when the above two exposures are used together. Therefore, pattern processing accuracy can be significantly improved.
まず、実施例を説明する前に本発明の基本原理について
、第１図のフロチャートを参照して説明する。First, before explaining the embodiments, the basic principle of the present invention will be explained with reference to the flowchart of FIG.
■ 光縮小投影露光装置を用いて、試料上に複数の露光
歪み測定用マークを、例えばマトリックス状に形成する
。このとき、試料上に形成される露光歪み測定用マーク
は、その位置が光縮小投影露光装置による露光歪みによ
り設計位置からずれている。(2) A plurality of exposure distortion measurement marks are formed, for example, in a matrix shape, on a sample using an optical reduction projection exposure apparatus. At this time, the position of the exposure distortion measurement mark formed on the sample is shifted from the designed position due to exposure distortion caused by the optical reduction projection exposure apparatus.
■ 次いで、荷電ビーム描画装置を用い、露光歪み測定
用マークに荷電ビームを照射し、その反射ビーム等を該
装置に通常備わっている荷電ビーム検出器で検出する。(2) Next, a charged beam drawing device is used to irradiate the mark for measuring exposure distortion with a charged beam, and the reflected beam and the like are detected by a charged beam detector normally provided in the device.
そして、この検出信号と試料位置を測長するレーザ測長
計等の測長値とに基づいて上記露光歪み測定用マークの
実際の形成位置を測定する。Then, the actual formation position of the exposure distortion measurement mark is measured based on this detection signal and the length measurement value of a laser length meter or the like that measures the sample position.
■ 露光歪み測定用マークの測定位置と設計位置とのず
れ量を算出し、この算出結果から光縮小投影露光装置に
よる露光歪みの値を求める。(2) Calculate the amount of deviation between the measurement position and the design position of the exposure distortion measurement mark, and determine the value of exposure distortion caused by the optical reduction projection exposure device from this calculation result.
■ 上記の前処理を予め行っておき、荷電ビーム描画装
置で試料上に微細パターンを描画する際に、上記露光歪
みに基づき描画位置の補正を行い、所望パターンを描画
形成する。(2) The above pre-processing is performed in advance, and when a fine pattern is drawn on a sample with a charged beam drawing device, the drawing position is corrected based on the exposure distortion, and a desired pattern is drawn and formed.
本発明ではこのような補正によって、光縮小露光装置に
よる転写パターンと、荷電ビーム描画装置による描画パ
ターンとの重ね合わせ精度を十分高め、パターン加工精
度の向上をはかっている。In the present invention, by such correction, the accuracy of overlaying the pattern transferred by the optical reduction exposure device and the pattern drawn by the charged beam lithography device is sufficiently increased, and pattern processing accuracy is improved.
以下、本発明の詳細を図示の実施例によって説明する。Hereinafter, details of the present invention will be explained with reference to illustrated embodiments.
第２図は本発明の一実施例方法に使用した電子ビーム描
画装置を示す概略構成図である。図中１１は電子銃で、
この電子銃１１から放射された電子ビームは各種電磁レ
ンズ１２．ブランキング用偏向器１３及び走査用園内器
１４を介してウェハ（試料）１５上に照射される。ウェ
ハ１５は、テーブル（試料台）１７上に載置されている
。テーブル１７は、計算機２０からの指令を受けた駆動
回路１８によりＸ方向（紙面左右方向）及びＹ方向く紙
面表裏方向）に移動せられる。そして、このテーブル１
７の移動位置は、レーザ測長計１９により高精度に測定
されるものとなっている。FIG. 2 is a schematic configuration diagram showing an electron beam lithography apparatus used in an embodiment of the method of the present invention. 11 in the figure is an electron gun,
The electron beam emitted from this electron gun 11 is transmitted through various electromagnetic lenses 12. The light is irradiated onto a wafer (sample) 15 via a blanking deflector 13 and a scanning device 14. The wafer 15 is placed on a table (sample stage) 17. The table 17 is moved in the X direction (left/right direction on the page) and Y direction (front/back direction on the page) by a drive circuit 18 that receives a command from the computer 20. And this table 1
The movement position 7 is measured with high accuracy by a laser length measuring meter 19.
ブランキング用偏向器１３はビームを０Ｎ−ＯＦＦする
もので、この偏向器１３には描画制菌回路２１からブラ
ンキング信号が与えられる。走査用偏向器１４はビーム
をウェハ１５上で走査するもので、この偏向器１４には
偏向制御回路２２から走査信号が与えられる。そして、
これらの偏向器１３．１４により、ウェハ１５上に所望
のパターンが描画されるものとなっている。さらに、レ
ンズ１２には、レンズ電源２３から励磁電流が供給され
ている。The blanking deflector 13 turns the beam ON and OFF, and a blanking signal is given to this deflector 13 from the drawing sterilization circuit 21. The scanning deflector 14 scans the beam on the wafer 15, and a scanning signal is applied to this deflector 14 from the deflection control circuit 22. and,
A desired pattern is drawn on the wafer 15 by these deflectors 13 and 14. Furthermore, an excitation current is supplied to the lens 12 from a lens power supply 23.
また、走査用偏向器１４の下方には、反射電子検出器２
４が配置されている。反射電子検出器２４の検出信号は
反射電子信号処理回路２５に供給されている。そして、
上記検出器２４及び信号処理回路２５等により、ウェハ
１５上のマーク等を検出したときのレーザ測長計１９の
測長値から、マークの位置が測定されるものとなってい
る。なお、図中２６は、後ｉ１する露光歪みを格納する
メモリを示している。Further, a backscattered electron detector 2 is located below the scanning deflector 14.
4 is placed. A detection signal from the backscattered electron detector 24 is supplied to a backscattered electron signal processing circuit 25. and,
The position of the mark is measured from the length value of the laser length measuring meter 19 when the mark or the like on the wafer 15 is detected by the detector 24, the signal processing circuit 25, and the like. Note that 26 in the figure indicates a memory that stores the exposure distortion to be performed after i1.
第３図は上記実施例方法に使用した光縮小投影露光装置
を示す概略構成図である。図中３１は光源であり、この
光源３１からの光はレンズ３２を介してマスク３３上に
照射される。マスク３３には、ウェハ上に転写すべきマ
スクパターンが形成されており、マスク３３を通過した
光は縮小レンズ３４を介してウェハ１５上に縮小投影露
光される。FIG. 3 is a schematic configuration diagram showing an optical reduction projection exposure apparatus used in the above embodiment method. In the figure, 31 is a light source, and light from this light source 31 is irradiated onto a mask 33 via a lens 32. A mask pattern to be transferred onto the wafer is formed on the mask 33, and the light passing through the mask 33 is subjected to reduction projection exposure onto the wafer 15 via the reduction lens 34.
なお、図には示さないが、ウェハ１５はＸＹ方向に移動
可能なテーブル上に載置され、マスクパターンはステッ
プベリピート方式でウェハ１５上に転写されるものとな
っている。Although not shown in the figure, the wafer 15 is placed on a table movable in the X and Y directions, and the mask pattern is transferred onto the wafer 15 by a step repeat method.
次に、上記光縮小投影露光装置及び電子ビーム描画装置
を併用した微細パターン形成方法について説明する。Next, a method for forming a fine pattern using the optical reduction projection exposure apparatus and the electron beam lithography apparatus will be described.
まず、半縮小投影露光装置を用い、ウェハ１５上に第４
図に示す如く、十字型（或いはＬ字型）の露光歪み測定
用マーク４１をマトリックス状に形成する。なお、図中
４２は光縮小投影露光装置における最大露光領域を示す
。また、露光歪み測定用マーク４１の間隔はａ、Ｘ方向
腕の長さはＸ１Ｙ方向腕の長さはｙとする。歪み測定用
マークを実際に形成するには、次のようにする。即ち、
歪み測定用マーク形成のためのパターン５１が形成され
たマスク５２を前記第３図に示す光縮小投影露光装置の
所定位置に配置し、第５図（ａ）に示す如くウェハ１５
上に上記パターンを投影露光する。そして、ウェハ１５
上のレジストを現像した後、ウェハ１５を選択エツチン
グして、第５図（ｂ）に示す如くｖ溝マーク（露光歪み
測定用マーク）５５を形成する。ここで、５５は実際に
形成さ机たマーク、５６は設計マークの位置である。First, using a semi-reduction projection exposure apparatus, a fourth image is placed on the wafer 15.
As shown in the figure, cross-shaped (or L-shaped) marks 41 for measuring exposure distortion are formed in a matrix. Note that 42 in the figure indicates the maximum exposure area in the optical reduction projection exposure apparatus. Further, the interval between the exposure distortion measurement marks 41 is a, the length of the arm in the X direction is X1, and the length of the arm in the Y direction is y. To actually form the distortion measurement mark, proceed as follows. That is,
A mask 52 on which a pattern 51 for forming distortion measurement marks is formed is placed at a predetermined position of the optical reduction projection exposure apparatus shown in FIG.
The above pattern is projected and exposed on top. And wafer 15
After developing the upper resist, the wafer 15 is selectively etched to form a v-groove mark (mark for measuring exposure distortion) 55 as shown in FIG. 5(b). Here, 55 is the actually formed desk mark, and 56 is the position of the design mark.
次いで、電子ビーム描画ｖｉ装置を用い、露光歪み測定
用マーク５５に電子ビームを照射し、その反射電子を検
出して前記第４図の各マークＭ（ｍ、ｎ＞の位置を検出
する。この検出されたマーク位置と設計マーク位置との
位置ずれ量から、光縮小投影露光装置による露光歪みの
量を求める。即ち、光縮小投影露光装置の露光領域を第
５図（Ｃ）に示す如＜２５０［μｍ口］に分割して、そ
れぞれの２５０［μｍ口］の領域（以下補正フィールド
と称する）毎に、下記に示す４点福間式を使って、露光
歪み量を求める。Next, using an electron beam writing VI device, the exposure distortion measurement mark 55 is irradiated with an electron beam, and the reflected electrons are detected to detect the position of each mark M (m, n> in FIG. 4). The amount of exposure distortion caused by the optical reduction projection exposure apparatus is determined from the amount of positional deviation between the detected mark position and the designed mark position.In other words, the exposure area of the optical reduction projection exposure apparatus is determined as shown in FIG. 5(C). It is divided into 250 μm regions, and the amount of exposure distortion is determined for each 250 μm region (hereinafter referred to as a correction field) using the 4-point Fukuma equation shown below.
そして、上記求めた露光歪み量は、前記メモリ２６に格
納しておく。The exposure distortion amount determined above is stored in the memory 26.
次いで、第６図に示す如く位置合わせマーク６１を形成
したウェハ１５に、光縮小投影露光による露光歪みを補
正して電子ビーム描画を行う際の、ウェハの形状歪みの
測定方法について述べる。ウェハ１５の形状歪みの測定
は、各チップ６２に形成されている位置合わせマーク６
１を検出し、光縮小投影露光の露光歪みの求め方と同様
に４点補間により行う、即ち、ウェハ１５上の全語光領
域を補正フィールドに分割し、各補正フィールド毎に４
点補間によりウェハの形状歪みの量を求める。Next, a method for measuring shape distortion of a wafer when electron beam writing is performed on the wafer 15 on which alignment marks 61 are formed as shown in FIG. 6 by correcting exposure distortion due to optical reduction projection exposure will be described. The shape distortion of the wafer 15 is measured using the alignment marks 6 formed on each chip 62.
1, and performs four-point interpolation in the same way as the method of determining exposure distortion in optical reduction projection exposure. In other words, the entire word light area on the wafer 15 is divided into correction fields, and each correction field has four correction fields.
The amount of shape distortion of the wafer is determined by point interpolation.
次いで、上記２つの歪みデータを用いて電子ビーム描画
を行う場合について、第７図に示す偏向制御回路のブロ
ックダイアグラムを参照して述べる。なお、第７図中７
１はカウンタ、７２は歪み補正データメモリ、７３．７
４．７５はＡＤＤ、７６は縮小投影露光歪みデータ、７
７はウェハ形状歪みデータ、７８はパターン描画位置デ
ータ、７９はレーザ測長値データを示している。前記メ
モリ２６に格納されている露光歪みデータ７６は、描画
位置に対応する補正フィールド毎にウェハ歪みデータ７
７に加えられ、歪み補正データとして歪み補正データメ
モリ７２に格納される。この様子を第８図に示す。そし
て、パターン描画位置データ７８は前記レーザ測長計１
９の副長値データ７つと加減算され、歪みのない場合の
ビーム照射位置が決定される。さらに、描画制御回路２
１からビーム照射位置が変わる毎にカウンタ７１にパル
スが入り、ビーム照射位置が２５０［μｍ］移肋するま
でカウントアツプされる。そして、照射位置が２５０［
μｍ１移動した時にメモリ７２へのアドレスがカウント
アツプされ、補正フィールドに対応した歪み補正データ
がメモリ７２から取り出されて、上記歪み補正のない場
合のビーム照射位置データに加えられる。これにより、
歪み補正を行ったビーム照射位置データが決定される。Next, the case where electron beam lithography is performed using the above two distortion data will be described with reference to the block diagram of the deflection control circuit shown in FIG. In addition, 7 in Figure 7
1 is a counter, 72 is a distortion correction data memory, 73.7
4.75 is ADD, 76 is reduced projection exposure distortion data, 7
Reference numeral 7 indicates wafer shape distortion data, 78 indicates pattern drawing position data, and 79 indicates laser length measurement value data. The exposure distortion data 76 stored in the memory 26 includes wafer distortion data 7 for each correction field corresponding to the drawing position.
7 and stored in the distortion correction data memory 72 as distortion correction data. This situation is shown in FIG. The pattern drawing position data 78 is the laser length measuring meter 1.
This is added to and subtracted from the seven sub-length value data of 9, and the beam irradiation position in the case of no distortion is determined. Furthermore, the drawing control circuit 2
Every time the beam irradiation position changes from 1, a pulse is input to the counter 71, and the counter 71 is counted up until the beam irradiation position shifts by 250 [μm]. And the irradiation position is 250 [
When the beam has moved by μm, the address in the memory 72 is counted up, and the distortion correction data corresponding to the correction field is taken out from the memory 72 and added to the beam irradiation position data in the case without distortion correction. This results in
Beam irradiation position data subjected to distortion correction is determined.
上記ビーム照射位置データを用いて電子ビーム描画を行
うことにより、光縮小投影露光の露光歪み及びウェハの
形状歪みを補正した電子ビーム描画が可能となる。なお
、露光歪みの測定は個々のウェハ毎に行う必要はなく、
素子形成に供されるウェハとは別のウェハを用意し、電
子ビーム描画の前に予め行っておけばよい。By performing electron beam lithography using the beam irradiation position data, it becomes possible to perform electron beam lithography in which exposure distortion of optical reduction projection exposure and shape distortion of the wafer are corrected. Note that it is not necessary to measure exposure distortion for each individual wafer;
It is sufficient to prepare a wafer different from the wafer used for element formation, and perform this process in advance before electron beam lithography.
このように本実施例方法によれば、光縮小投影露光装置
による露光歪みの潰を予め求めておき、電子ビーム描画
を行う際に、この歪みを補正するようにしているので、
投影露光による転写パターンと電子ビーム描画による描
画パターンとの重ね合わせ精度の向上をはかり得る。こ
のため、パターン加工精度の大幅な向上をはかり得る。In this way, according to the method of this embodiment, the reduction of exposure distortion caused by the optical reduction projection exposure apparatus is determined in advance, and this distortion is corrected when performing electron beam writing.
It is possible to improve the overlay accuracy between a transfer pattern by projection exposure and a drawing pattern by electron beam lithography. Therefore, pattern processing accuracy can be significantly improved.
また、光縮小投影露光と電子ビーム描画とのハイブリッ
ド露光を行うことにより、サブミクロンの微細加工に十
分使用でき、さらにスルーブツトの向上をはかり得る等
の利点がある。Further, by performing hybrid exposure of optical reduction projection exposure and electron beam lithography, it can be used sufficiently for submicron microfabrication, and has the advantage of being able to improve throughput.
なお、本発明は上述した実施例方法に限定されるもので
はない。例えば、前記電子ビーム描画装置の代りには、
イオンビーム描画装置を用いることが可能である。さら
に、ビーム偏向領域が大きいステップ＆リピート方式の
荷電ご一ム描画装置に適用可能であるのも、勿論のこと
である。また、マーク検出手段としては、反射電子の代
りに２次電子、さらにはビーム照射により試料表面から
放出されるビームを利用することができる。また、荷電
ビーム描画装置及び光縮小投影露光装置の構造は実施例
に同等限定されるものではなく、仕様に応じて適宜変更
可能である。その他、本発明の要旨を逸脱しない範囲で
、種々変形して実施することができる。Note that the present invention is not limited to the method of the embodiment described above. For example, instead of the electron beam drawing device,
It is possible to use an ion beam writing device. Furthermore, it goes without saying that the present invention can be applied to a step-and-repeat type charged single lithography apparatus having a large beam deflection area. Further, as the mark detection means, it is possible to use secondary electrons instead of reflected electrons, or even a beam emitted from the sample surface by beam irradiation. Further, the structures of the charged beam lithography apparatus and the optical reduction projection exposure apparatus are not limited to the same as those in the embodiments, but can be changed as appropriate according to specifications. In addition, various modifications can be made without departing from the gist of the present invention.
【図面の簡単な説明】
第１図は本発明の基本原理を説明するためのフローチャ
ート、第２図は本発明の一実施例方法に使用した電子ビ
ーム描画装置を示す概略構成図、第３図は上記実施例方
法に使用した光縮小投影露光装置を示す概略構成図、第
４図は露光歪み測定用マークが形成されたつ１ハを示す
平面図、第５図は露光歪み測定の原理を説明するための
模式図、第６図はウェハ上のチップ及び位置合わせマー
クの配置状態を示す平面図、第７図は鍋内制御回路の具
体的構造を示すブロツク図、第８図は露光歪みデータと
形状歪み゛データとの合成過程を示す模式図である。
１１・・・電子銃、１２，３２．３４・・・レンズ、１
３・・・ブランキング用偏向器、１４・・・走査用猛向
器、１５・・・ウェハ（試料）、１７・・・試料台、１
８・・・駆動回路、１９・・・レーザ測長計、２０・・
・計算機、２１・・・描画制御回路、２２・・・偏向制
御回路、２４・・・反射電子検出器、３１・・・光源、
３３・・・マスク、４１．５５・・・露光歪み測定用マ
ーク、６１・・・位置合わせマーク。
出願人代理人 弁理士 鈴江武彦
第１図
第３図
−ａ−
第４図
（ａ）
ら１
（ｂ） （ｃ）第Ｓ図
ステｙハ０−＃万客
ウェーハ１
第８図[BRIEF DESCRIPTION OF THE DRAWINGS] Fig. 1 is a flowchart for explaining the basic principle of the present invention, Fig. 2 is a schematic configuration diagram showing an electron beam lithography apparatus used in an embodiment of the method of the present invention, and Fig. 3 4 is a schematic diagram illustrating the optical reduction projection exposure apparatus used in the above embodiment method, FIG. 4 is a plan view showing the first part in which exposure distortion measurement marks are formed, and FIG. 5 explains the principle of exposure distortion measurement. Figure 6 is a plan view showing the arrangement of chips and alignment marks on the wafer, Figure 7 is a block diagram showing the specific structure of the control circuit inside the pan, and Figure 8 is the exposure distortion data. FIG. 3 is a schematic diagram showing a synthesis process of the shape distortion data and the shape distortion data. 11...electron gun, 12,32.34...lens, 1
3... Blanking deflector, 14... Scanning deflector, 15... Wafer (sample), 17... Sample stage, 1
8... Drive circuit, 19... Laser length measuring meter, 20...
- Computer, 21... Drawing control circuit, 22... Deflection control circuit, 24... Backscattered electron detector, 31... Light source,
33... Mask, 41.55... Exposure distortion measurement mark, 61... Positioning mark. Applicant's representative Patent attorney Takehiko Suzue Figure 1 Figure 3-a- Figure 4 (a) et al. 1 (b) (c) Figure S Stayha 0-#Mankuwafer1 Figure 8
Claims (5)
ーンを描画すると共に、試料表面からの荷電ビームを検
出して試料上に形成されたマークの位置を測定する機能
を備えた荷電ビーム描画装置と、マスク上に光を照射し
該マスクのパターンを試料上に縮小転写する光縮小投影
露光装置とを併用し、試料上に微細パターンを形成する
方法において、前記光縮小投影露光装置により試料上に
複数の露光歪み測定用マークを形成し、前記荷電ビーム
描画装置により上記露光歪み測定用マークの位置を測定
して前記光縮小投影露光装置による露光歪みの量を予め
求めておき、前記荷電ビーム描画装置により所望パター
ンを描画する際に、上記求められた露光歪みを補正する
ことを特徴とする微細パターン形成方法。(1) A charged beam with the function of scanning a charged beam on a sample to draw a desired pattern on the sample, and detecting the charged beam from the sample surface to measure the position of a mark formed on the sample. In a method of forming a fine pattern on a sample by using a drawing device and an optical reduction projection exposure device that irradiates light onto a mask and reduces and transfers the pattern of the mask onto the sample, the method includes: A plurality of marks for measuring exposure distortion are formed on a sample, and the positions of the marks for measuring exposure distortion are measured by the charged beam lithography device to determine the amount of exposure distortion caused by the optical reduction projection exposure device in advance, A method for forming a fine pattern, comprising correcting the determined exposure distortion when drawing a desired pattern using a charged beam drawing device.
リックス状に形成されることを特徴とする特許請求の範
囲第１項記載の微細パターン形成方法。(2) The fine pattern forming method according to claim 1, wherein the exposure distortion measurement marks are formed in a matrix on the sample.
める手段として、前記露光歪み測定用マークの測定位置
と該マークの設計位置とのずれ量を求めることを特徴と
する特許請求の範囲第１項記載の微細パターン形成方法
。(3) The means for determining the amount of exposure distortion caused by the optical reduction projection exposure apparatus includes determining the amount of deviation between the measurement position of the exposure distortion measurement mark and the designed position of the mark. The method for forming a fine pattern according to item 1.
める手段として、露光領域を（５０μｍ〜１ｃｍ）×（
５０μｍ〜１ｃｍ）の小領域に分割して該小領域毎に前
記露光歪み測定用マークを形成しておき、上記小領域毎
に露光歪みの量を求めることを特徴とする特許請求の範
囲第１項記載の微細パターン形成方法。(4) As a means of determining the amount of exposure distortion caused by the optical reduction projection exposure apparatus, the exposure area is (50 μm to 1 cm)×(
50 μm to 1 cm), the exposure distortion measuring mark is formed in each of the small regions, and the amount of exposure distortion is determined for each of the small regions. The fine pattern forming method described in .
めると共に、前試料の形状歪みの量を求め、前記荷電ビ
ーム描画装置により試料上に所望パターンを描画する際
に、上記露光歪み及び形状歪みを補正することを特徴と
する特許請求の範囲第１項記載の微細パターン形成方法
。(5) Determine the amount of exposure distortion caused by the optical reduction projection exposure device, determine the amount of shape distortion of the previous sample, and use the exposure distortion and shape when drawing a desired pattern on the sample with the charged beam lithography device. 2. The fine pattern forming method according to claim 1, wherein distortion is corrected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19893585A JPS6258621A (en) | 1985-09-09 | 1985-09-09 | Fine pattern forming method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19893585A JPS6258621A (en) | 1985-09-09 | 1985-09-09 | Fine pattern forming method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6258621A true JPS6258621A (en) | 1987-03-14 |
Family
ID=16399414
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19893585A Pending JPS6258621A (en) | 1985-09-09 | 1985-09-09 | Fine pattern forming method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6258621A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62229830A (en) * | 1986-03-28 | 1987-10-08 | Jeol Ltd | Charged particle beam lithography equipment for hybrid |
| JPS6351635A (en) * | 1986-08-20 | 1988-03-04 | Yokogawa Hewlett Packard Ltd | Lithographic method |
| WO1997034319A1 (en) * | 1996-03-06 | 1997-09-18 | Hitachi, Ltd. | Manufacture of semiconductor device |
| JP2002110516A (en) * | 2000-09-28 | 2002-04-12 | Advantest Corp | Electron beam aligner, exposure method and semiconductor-manufacturing method |
| JP2002141279A (en) * | 2000-08-14 | 2002-05-17 | Leica Microsystems Lithography Gmbh | Irradiation method of layout on wafer consisting of plural planes |
| US6741732B2 (en) | 1997-10-09 | 2004-05-25 | Canon Kabushiki Kaisha | Exposure method and device manufacturing method using this exposure method |
| JP2009170743A (en) * | 2008-01-18 | 2009-07-30 | Fujitsu Microelectronics Ltd | Data generating method for semiconductor device, and electron-beam exposure system |
| JP2013069847A (en) * | 2011-09-22 | 2013-04-18 | Nuflare Technology Inc | Charged particle beam apparatus and charged particle beam lithography apparatus |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5367365A (en) * | 1976-11-29 | 1978-06-15 | Nippon Telegr & Teleph Corp <Ntt> | Correcting method for beam position |
| JPS5498577A (en) * | 1978-01-20 | 1979-08-03 | Nippon Telegr & Teleph Corp <Ntt> | Correction method for electron beam scanning position |
| JPS57186331A (en) * | 1981-05-12 | 1982-11-16 | Jeol Ltd | Manufacture of semiconductor device |
-
1985
- 1985-09-09 JP JP19893585A patent/JPS6258621A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5367365A (en) * | 1976-11-29 | 1978-06-15 | Nippon Telegr & Teleph Corp <Ntt> | Correcting method for beam position |
| JPS5498577A (en) * | 1978-01-20 | 1979-08-03 | Nippon Telegr & Teleph Corp <Ntt> | Correction method for electron beam scanning position |
| JPS57186331A (en) * | 1981-05-12 | 1982-11-16 | Jeol Ltd | Manufacture of semiconductor device |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62229830A (en) * | 1986-03-28 | 1987-10-08 | Jeol Ltd | Charged particle beam lithography equipment for hybrid |
| JPS6351635A (en) * | 1986-08-20 | 1988-03-04 | Yokogawa Hewlett Packard Ltd | Lithographic method |
| WO1997034319A1 (en) * | 1996-03-06 | 1997-09-18 | Hitachi, Ltd. | Manufacture of semiconductor device |
| US6159644A (en) * | 1996-03-06 | 2000-12-12 | Hitachi, Ltd. | Method of fabricating semiconductor circuit devices utilizing multiple exposures |
| US6741732B2 (en) | 1997-10-09 | 2004-05-25 | Canon Kabushiki Kaisha | Exposure method and device manufacturing method using this exposure method |
| JP2002141279A (en) * | 2000-08-14 | 2002-05-17 | Leica Microsystems Lithography Gmbh | Irradiation method of layout on wafer consisting of plural planes |
| JP2002110516A (en) * | 2000-09-28 | 2002-04-12 | Advantest Corp | Electron beam aligner, exposure method and semiconductor-manufacturing method |
| JP2009170743A (en) * | 2008-01-18 | 2009-07-30 | Fujitsu Microelectronics Ltd | Data generating method for semiconductor device, and electron-beam exposure system |
| JP2013069847A (en) * | 2011-09-22 | 2013-04-18 | Nuflare Technology Inc | Charged particle beam apparatus and charged particle beam lithography apparatus |
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