JP2003077798A - Proximity effect correcting method and device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a proximity effect correcting method or the like capable of excellently correcting a proximity effect by appropriately resizing a pattern dimension. SOLUTION: A pattern filling factor Rmax of an area where the pattern filling factor R is maximum is compared with preset values R1 and R2 . In the case of Rmax >=R1 , negative resizing is performed in the area where the pattern filling factor is high and resizing is not performed in the area where the pattern filling factor is minimum. In the case of R1 >Rmax >=R2 , resizing is not performed in the area where the pattern filling factor is intermediate, negative resizing is performed in the area where the pattern filling factor is high and positive resizing is performed in the area where the pattern filling factor is low. In the case of R2 >Rmax , resizing is not performed in the area where the pattern filling factor is maximum and positive resizing is performed in the area where the pattern filling factor is low.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention has a minimum line width of 0.1 μm.
The present invention relates to a proximity effect correction method in electron beam transfer exposure, which is intended to form a high-precision and high-density pattern of less than less than with high throughput. In particular, the present invention relates to a proximity effect correction method capable of satisfactorily correcting the proximity effect by more appropriately resizing the pattern dimension. The present invention also relates to a device manufacturing method for performing an electron beam exposure process using such a proximity effect correction method.

[0002]

2. Description of the Related Art At present, exposure of each wafer (sensitive substrate) in lithography of a semiconductor integrated circuit is mainly performed by a so-called stepper using ultraviolet rays. The electron beam exposure is used for drawing a mask mounted on a stepper as a pattern original plate, but has not been used yet for a mass production lithography process of wafers. However, recently, in order to form a highly integrated and ultrafine pattern, it has been proposed to use electron beam transfer exposure for the exposure of each wafer.

By the way, electron beam exposure is considered to have a drawback of low throughput, and various technical developments have been made to solve the drawback. At present, a pattern partial batch exposure method called cell projection, character projection or block exposure has been put into practical use. In the figure partial batch exposure method, a repeatable circuit small pattern (about 5 μm square on the wafer) is repeatedly transferred using one small pattern as a unit using a mask on which multiple similar small patterns are formed. Expose. However, even with this method, the variable shaping method is used to draw a pattern portion having no repeatability. Therefore, the desired throughput cannot be obtained in the mass production lithography process of wafers.

As an electron beam transfer exposure method aiming at a dramatically higher throughput than the figure partial batch exposure method, a mask having a circuit pattern of the entire semiconductor chip is prepared, and a certain range of the mask is irradiated with an electron beam. Then, an electron beam reduction transfer device has been proposed which reduces and transfers the image of the pattern in the irradiation range by a projection lens.

In this type of apparatus, if the entire area of the mask is collectively irradiated with an electron beam to transfer the pattern at one time, the pattern cannot be transferred accurately. Further, it is difficult to manufacture a mask as an original plate. Therefore, the method which has been studied vigorously recently has a large optical field as an optical system but does not expose one die (chip on a wafer) or a plurality of dies at one time, but a pattern has a small area (sub-region). This is a method in which transfer exposure is performed by dividing it into (fields) (hereinafter referred to as a division transfer method). At this time, exposure is performed for each small area while correcting aberrations such as the focus of the image of the small area formed on the surface to be exposed and field distortion. As a result, compared with batch transfer of the entire die, it is possible to perform exposure with high resolution and accuracy over an optically large area.

[0006]

By the way, when a sensitive substrate such as a wafer is irradiated with an electron beam for exposure, the backscattered electrons from the substrate cause the actual exposure amount of each portion to cause a pattern distribution in the vicinity thereof. Proximity effects that vary according to The proximity effect occurs when electrons that have entered the exposed portion of the sensitive substrate spread while scattering, and give energy to the surrounding unexposed portion.

As a method of correcting this proximity effect, there is a method of exposing using a mask whose pattern dimensions are changed in advance. It is said that the change of the pattern size is performed by changing (resizing) the pattern size of another part with reference to a certain pattern density part as follows. Make the pattern dimension of the low-density area unchanged (standard) and thin the pattern dimension of the high-density area (minus resizing) Make the pattern dimension of the high-density area unchanged (standard) and thicken the pattern dimension of the low-density area (plus) Resize) Make the middle density part unchanged (standard), thin the pattern size of the high density part, and thicken the pattern size of the low density part. However, the pattern size at which density part is the standard is the closest. There was a problem that it was unclear whether the effect could be corrected. The relationship between the dose amount and the pattern size can be manipulated in principle by adjusting the development level.

The present invention has been made in view of the above problems, and it is an object of the present invention to provide a proximity effect correction method and the like which can satisfactorily correct the proximity effect by more appropriately resizing the pattern dimension. To aim.

[0009]

In order to solve the above problems, therefore, the proximity effect correction method of the present invention forms a pattern to be transferred onto a sensitive substrate on a mask and irradiates the mask with an electron beam. When projecting an electron beam that has passed through the mask onto the sensitive substrate to transfer and expose the pattern onto the sensitive substrate, a dimensional change (resizing) is given to each element of the pattern on the mask in advance. A method for correcting the proximity effect by dividing the pattern area into areas having dimensions smaller than the spread radius of the backscattered electrons on the sensitive substrate, and calculating the pattern filling rate R in each area. , The pattern filling rate R _max of the area including the pattern of the minimum line width or the minimum line spacing and having the maximum pattern filling rate R, and preset values R ₁ and R ₂ (R ₁ > R ₂ ) is compared with the above R _max, and if R _max ≧ R ₁ , then resizing (minus resizing) is performed to reduce the pattern on the mask in an area where the pattern filling rate is high, and R ₁ > R _max ≧ R ₂ In the case of, in the area where the pattern filling rate is in the middle, resizing is not performed, in the area where the pattern filling rate is high, minus resizing is performed, and in the area where the pattern filling rate is low, the pattern on the mask is enlarged (plus resizing) , R ₂ > R _max , the resizing is not performed in the area where the pattern filling rate is maximum, and the plus resizing is performed in the area where the pattern filling rate is low.

In the proximity effect correction method, the amount of resizing R _S for each area is defined as (beam blur in the area) × (backscattered electron quantity in an area not to be resized and backscattered electron quantity in the area). It is preferable that the value is proportional to the difference).

In the proximity effect correction method, the backscattered electron amount can be calculated by assuming that each area has one figure having an area corresponding to the pattern filling rate of the area.

The device manufacturing method of the present invention is characterized by including a lithography process using the above-described proximity effect correction method or the like.

[0013]

DETAILED DESCRIPTION OF THE INVENTION A description will be given below with reference to the drawings. First, an outline of an image forming relationship and a control system in the entire optical system of a charged particle beam projection exposure apparatus of a division transfer system will be described with reference to the drawings. FIG. 3 is a diagram showing an outline of an image forming relationship and a control system in the entire optical system of the divided transfer type charged particle beam projection exposure apparatus. The electron gun 101 arranged in the uppermost stream of the optical system emits an electron beam downward. Below the electron gun 101 is a two-stage condenser lens 1
02 and 103 are provided, and the electron beam is converged by these condenser lenses 102 and 103 to image the crossover CO on the blanking aperture 107.

A rectangular aperture 104 is provided below the second-stage condenser lens 103. This rectangular aperture (illumination beam shaping aperture) 104 is a reticle (mask).
Only the illumination beam that illuminates one subfield 110 (a small pattern area that is one unit of exposure) is passed. The image of the opening 104 is formed on the reticle 110 by the lens 109.

A blanking deflector 105 is arranged below the beam shaping aperture 104. Same deflector 105
Deflects the illumination beam when necessary to strike the non-opening of blanking aperture 107 so that the beam does not strike reticle 110. An illumination beam deflector 108 is arranged below the blanking aperture 107. The deflector 108 mainly sequentially scans the illumination beam in the lateral direction (X direction) of FIG. 3 to illuminate each subfield of the reticle 110 within the field of view of the illumination optical system. Deflector 10
An illumination lens 109 is arranged below the lens 8. The illumination lens 109 images the beam shaping aperture 104 on the reticle 110.

The reticle 110 actually spreads in a plane perpendicular to the optical axis (XY plane) and has a large number of subfields. On the reticle 110, a pattern (chip pattern) forming one semiconductor device chip as a whole is formed. Of course, a pattern forming one semiconductor device chip may be divided and arranged on a plurality of reticles.

The reticle 110 is mounted on a movable reticle stage 111, and by moving the reticle 110 in the directions perpendicular to the optical axis (XY directions), the reticle on the reticle spread over a wider range than the field of view of the illumination optical system. Each subfield can be illuminated. Reticle stage 11
1, a position detector 112 using a laser interferometer is attached, and the position of the reticle stage 111 can be accurately grasped in real time.

Below the reticle 110 is a projection lens 11.
5 and 119 and a deflector 116 are provided. The electron beam that has passed through one subfield of the reticle 110 is imaged at a predetermined position on the wafer 123 by the projection lenses 115 and 119 and the deflector 116. Wafer 12
An appropriate resist is applied to the surface of the reticle 3, an electron beam dose is applied to the resist, and the pattern on the reticle is reduced and transferred onto the wafer 123.

A crossover CO is formed at a point that internally divides between the reticle 110 and the wafer 123 at a reduction ratio, and a contrast opening 118 is provided at the crossover position. The opening 118 blocks the electron beam scattered by the non-patterned portion of the reticle 110 from reaching the wafer 123.

The backscattered electron detector 1 is located directly above the wafer 123.
22 are arranged. This backscattered electron detector 122 is
The amount of electrons reflected by the exposed surface of the wafer 123 or the mark on the stage is detected. For example, by scanning a mark on the wafer 123 with a beam that has passed through the mark pattern on the reticle 110 and detecting reflected electrons from the mark at that time, the relative positional relationship between the reticle 110 and 123 can be known.

The wafer 123 is a wafer stage 1 which is movable in XY directions via an electrostatic chuck (not shown).
24 is mounted. The reticle stage 111
By synchronously scanning the wafer stage 124 and the wafer stage 124 in opposite directions, it is possible to sequentially expose each part in the chip pattern that extends beyond the field of view of the projection optical system. The wafer stage 124 is also equipped with the same position detector 125 as the reticle stage 111 described above.

The above lenses 102, 103, 109, 1
15, 119 and each deflector 105, 108, 116,
Each coil power supply control unit 102a, 103a, 109
a, 115a, 119a and 105a, 108a, 11
It is controlled by the controller 131 via 6a. The reticle stage 111 and the wafer stage 124 are also controlled by the controller 131 via the stage control units 111a and 124a. The stage position detectors 112 and 125 send signals to the controller 131 via interfaces 112a and 125a including amplifiers and A / D converters. The backscattered electron detector 1
22 also sends a signal to the controller 131 via a similar interface 122a.

The controller 131 grasps the control error of the stage position and corrects the error by the image position adjusting deflector 116. As a result, the reduced image of the subfield on the reticle 110 is accurately transferred to the target position on the wafer 123. Then, the subfield images are joined on the wafer 123, and the entire chip pattern on the reticle is transferred onto the wafer.

Next, a proximity effect correction method according to the first embodiment of the present invention will be described. The present invention proposes a method of determining the standard of increase or decrease of the pattern size to be subjected to the resizing correction and minimizing the variation of the line width accuracy. In order to minimize the line width variation when there is a change in the exposure conditions, usually the dose contrast must be increased when the beam blur is constant. Here, the dose contrast, the maximum value of the dose distribution I _max, the minimum value upon the I _min, expressed in _{(I max -I min) / (} I max + I min). For example, in the case of a line-and-space pattern arranged at a fixed pitch, the contrast is highest when the line-space ratio is 1: 1, and the ratio is 1: 1.
The dose contrast decreases with increasing distance from. In addition, in the entire chip pattern, a pattern region including the minimum line width or the minimum line spacing and having the maximum density is most prone to pattern deterioration due to the proximity effect.

However, in the case of an actually designed two-dimensional pattern, it is difficult to define the line-space ratio. Therefore, in the proximity effect correction method of the present invention, the filling factor (Filling Factor) of the pattern is used instead of the line / space ratio.

FIG. 1 is a diagram for explaining a proximity effect correction method according to an embodiment of the present invention. FIG. 1 shows a pattern 1 of a microcomputer or the like. In pattern 1,
Memory unit 2 having a relatively high density pattern, and memory unit 3 having a lower density pattern than the memory unit 2.
Then, the logic portions 4 and 5 in which a pattern is formed at a density lower than that of the memory portion 3 are formed. This pattern 1
The entire chip formed with was divided into 6 μm square areas (subfields) each having a size of 1/10 with a spread radius of backscattered electrons of 60 μm, and the filling factor of the pattern in each area was calculated.

Therefore, two pattern filling rates R are set in advance.
₁ (50%) and R ₂ (25%) are set, and the filling rate R of the pattern in the maximum density portion 2a of the memory portion 2 having the maximum density is set.
Calculate _max and classify the value into the following three. R _max ≧ R ₁ R ₁ > R _max ≧ R ₂ R ₂ > R _max

In this example, the pattern filling rate R _max (2a) of the maximum density portion 2a of the memory portion 2 was 52%. This value is the preset pattern filling rate R ₁ (5
Since it is larger than 0%), minus resizing is performed in the direction in which the line width becomes smaller in the central portion of the memory unit 2. The resizing is not performed in the peripheral portion of the memory portion 2 or in the central portion of the memory portion 3 in which a pattern is formed at a density lower than that of the memory portion 2. The plus resizing is performed in the peripheral portion of the memory 3 or in the logic portions 4 and 5 in which the pattern is formed at a density lower than that of the memory portion 3, in the direction of increasing the line width.

In another layer of this chip, the pattern filling rate R of the maximum density portion 2a of the memory portion 2 is R.
_{The max} (2a ') was 22%. Since this value is smaller than the preset pattern filling rate R ₂ (25%),
The resizing is not performed in the area 2a having the maximum pattern filling rate of the memory unit 2. In other areas where the pattern filling rate is low, plus resizing is performed by a value proportional to (beam blur in the area) × (difference between the backscattered electron quantity in the area not to be resized and the backscattered electron quantity in the area) .

Further, in another layer of this chip, the pattern filling rate R of the maximum density portion 2a of the memory portion 2 is
_{The max} (2a ″) was 30%. Since this value is smaller than the preset pattern filling rate R ₁ (50%) and larger than the pattern filling rate R ₂ (25%), in a region where the pattern filling rate such as the maximum density portion 2a of the memory section 2 is high. Negative resizing is performed, and resizing is not performed in an area having a pattern filling rate such as the peripheral area 3a of the memory unit 3 in the middle,
In areas where the pattern filling rate is low, such as the logic units 4 and 5, resizing (plus resizing) for enlarging the pattern on the mask is performed.

Next, referring to FIG. 2, a method of calculating the above-mentioned resizing amount will be described. The amount of backscattered electrons in each area was assumed to be a double Gaussian distribution, and the amount of resizing was calculated in each area and its periphery. The beam blur amount in each area was calculated from the distance from the optical axis of the subfield and the beam current value. The pattern size correction amount is calculated from these values and the dose distribution in the area.

FIG. 2 is a diagram showing the dose distribution in a certain area on the wafer surface. FIG. 2 shows the X-direction position in a certain area on the wafer surface and the dose distribution at that time. The dose amount is 100% in the central portion, but becomes lower as the distance from the central portion increases. In FIG.
Beam bokeh is where the dose rises from 12% to 88%. A horizontal line 21 in the figure shows the amount of backscattered electrons in the area where the pattern dimension is not corrected, and a horizontal line 22 shows the amount of backscattered electron in the area where the pattern dimension is corrected. Here, the difference in the amount of backscattered electrons between the horizontal lines 21 and 22 (the difference between the amount of backscattered electrons in the region where resizing is not performed and the amount of backscattered electrons in the region) is denoted by reference numeral 2.
3, and the correction amount at that time is denoted by reference numeral 24.

Here, from the similarity in the figure, the electron amount difference 23: correction amount 24 = (88% -12%) :( beam blur). Therefore, the size correction (resizing) amount 24 = (beam blur) × (electron amount difference 23) / 76%.

As described above, the amount of backscattered electrons in each area is assumed to be a double Gaussian distribution, the amount of backscattered electrons in each area and its periphery is calculated, and the amount of beam blur in each area is It is calculated from the distance from the optical axis of the field and the beam current value. Further, the pattern dimension correction amount can be calculated from these values and the dose distribution in the area.

In calculating the backscattered electron amount,
For each area, one representative figure having an area corresponding to the pattern filling rate in the area is placed, and calculation is performed assuming a double Gaussian distribution.

Next, an embodiment of a device manufacturing method using the electron beam exposure apparatus described above will be described. Figure 4
A flow of manufacturing a microdevice (semiconductor chip such as IC or LSI, liquid crystal panel, CCD, thin film magnetic head, micromachine, etc.) is shown.

In step 1 (circuit design), a semiconductor device circuit is designed. In step 2 (mask manufacturing), a mask having the designed circuit pattern is manufactured. At this time, the beam blur due to the proximity effect and the space charge effect is corrected by performing the resizing as described above.
On the other hand, in step 3 (wafer manufacturing), a wafer is manufactured using a material such as silicon.

In step 4 (oxidation), the surface of the wafer is oxidized. In step 5 (CVD), an insulating film is formed on the wafer surface. In step 6 (electrode formation), electrodes are formed on the wafer by vapor deposition. In step 7 (ion implantation), ions are implanted in the wafer. In step 8 (resist processing), a photosensitive agent is applied to the wafer. In step 9 (electron beam exposure), the circuit pattern of the mask is printed and exposed on the wafer by the electron beam transfer device using the mask formed in step 2. In step 10 (light exposure), the circuit pattern of the mask is printed and exposed on the wafer by an optical stepper using the light exposure mask similarly prepared in step 2. In step 9, the proximity effect correction method described above is utilized.

In step 11 (development), the exposed wafer is developed. In step 12 (etching), parts other than the resist image are selectively shaved off. Step 13
In (resist stripping), the resist that has become unnecessary due to etching is removed. By repeating Step 4 to Step 13, multiple circuit patterns are formed on the wafer.

Step 14 (assembly) is called a post-process, and is a process for forming a semiconductor chip using the wafer manufactured by the above process, including an assembly process (dicing, bonding), a packaging process (chip encapsulation). Etc. are included. In step 15 (inspection), the semiconductor device manufactured in step 14 undergoes inspections such as an operation confirmation test and a durability test. Through these steps, the semiconductor device is completed and shipped (step 16).

Although the proximity effect correction method and the like according to the embodiment of the present invention have been described with reference to FIGS. 1 to 4 above, the present invention is not limited to this and various modifications can be made. You can

[0042]

As is apparent from the above description, according to the present invention, the proximity effect can be favorably corrected by more appropriately resizing the pattern dimension.

[Brief description of drawings]

FIG. 1 is a diagram for explaining a proximity effect correction method according to an embodiment of the present invention.

FIG. 2 is a diagram showing a dose distribution in a certain area on the wafer surface.

FIG. 3 is a diagram showing an outline of an image forming relationship and a control system in an entire optical system of a charged particle beam projection exposure apparatus of a division transfer system.

FIG. 4 shows a flow of manufacturing microdevices (semiconductor chips such as IC and LSI, liquid crystal panels, CCDs, thin film magnetic heads, micromachines, etc.).

[Explanation of symbols]

1 pattern A few memory sections 2a maximum density part Area around 3a 4, 5 Logic part

Claims (4)

[Claims] 1. A pattern to be transferred onto a sensitive substrate is formed on a mask, the mask is illuminated with an electron beam, and an electron beam passing through the mask is projected onto the sensitive substrate to form the pattern on the sensitive substrate. A method of correcting the proximity effect by previously giving a dimensional change (resizing) to each element of the pattern on the mask at the time of transfer exposure onto the pattern; The pattern filling rate R in each area is calculated by dividing the area into a region having a size smaller than the spread radius, and among the areas, the pattern filling rate R is the maximum including the pattern of the minimum line width or the minimum line spacing. The pattern filling rate R _max of a different area is selected, and the preset values R ₁ and R ₂ (R ₁ > R ₂ ) and R
It compares the _max, in the case of R _max ≧ R _1, performs a resize (minus resizing) to reduce the pattern on the mask at a high zone pattern filling factor in the case of _{R 1> R max ≧ R 2} , pattern without resizing filling rate in the middle of the section, subjected to negative resizing the high zone pattern filling rate, the lower zone pattern filling rate performs resizing (plus resizing) to increase the pattern on the mask, R _2> R _In the case of _max , the proximity effect correction method is characterized in that resizing is not performed in an area having a maximum pattern filling rate and plus resizing is performed in an area having a low pattern filling rate. 2. The amount R _S of resizing for each area is proportional to (beam blur in the area) × (difference between the backscattered electron quantity in the area not subjected to resizing and the backscattered electron quantity in the area) 2. The proximity effect correction method according to claim 1, wherein 3. The proximity effect correction according to claim 2, wherein the backscattered electron amount is calculated assuming that each area has one figure having an area corresponding to a pattern filling rate of the area. Method. 4. A device manufacturing method, wherein proximity effect correction is performed by the method according to claim 1 in a lithography process using an electron beam.