JPS6258066B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a disc reproducing apparatus that controls the linear velocity of the disc to a predetermined value when reproducing a disc on which digital signals are recorded.

Optical and capacitive signal detection systems are known as digital audio disks, but when recording audio PCM signals on a disk, the angular velocity is not constant in order to increase the recording density. Recording at a constant linear velocity is preferred.

Discs that have been recorded at a constant linear velocity still need to be played back at a constant linear velocity.
One of the rotation control methods for this purpose is to detect the position of the pick-up with a potentiometer, and since the required number of rotations is the reciprocal of that position, the detection output is supplied to a divider to obtain control information. It is being However, in this method, the configuration consisting of a position detector and a divider for control is expensive;
It becomes complicated.

One object of the present invention is to realize an apparatus that can control rotation at a constant linear velocity using a reproduction signal from a disk without using a detector for detecting the position of a pickup.

In addition, as a method for obtaining control information from the playback signal from the disk, we focused on the fact that the playback system of an optical disk has frequency characteristics similar to a low-pass filter, and the rise or fall time of the playback signal is inversely proportional to the linear velocity. It has been proposed to differentiate the reproduced signal and obtain control information from the peak value of the differential output.

However, the cutoff spatial frequency of the optical disc playback system is determined by the aperture ratio of the objective lens used for readout and the wavelength of the laser beam, so it must be adjusted for each player or each pick-up. I felt a sense of annoyance. Furthermore, it was necessary to make adjustments even when reproducing a disc having a different linear velocity during recording.

The present invention makes it possible to perform rotation control that does not require adjustment each time the player or pickup is changed or when a disc with a different recording linear velocity is reproduced.
In the present invention, when recording in a baseband that does not rely on a carrier modulation method such as AM modulation, a run length limited code (run length limited code) is used.
code) modulation method is used. This modulation method is
Minimum inversion interval between two data transitions for “0” or “1” data
The purpose is to increase recording efficiency by increasing Tmin and to shorten the maximum inversion interval Tmax to facilitate self-clocking on the playback side. For example, (Tmin = 1.5T) (Tmax = 6T). The 3PM method is known.

In this way, by utilizing the fact that the reversal interval is limited, the present invention detects that the maximum or minimum reversal interval deviates from the reference value, and uses this as information to perform rotation control at a constant linear velocity. The rotation of the disk is phase-locked by outputting a phase comparison between the reproduced clock and the reference clock.

An embodiment of the present invention will be described below. In this embodiment, as a modulation method for a run-length limited code (Tmin=1.5T)
(Tmax=4.5T) where the minimum reversal interval and maximum reversal interval are specified. To give an overview of this modulation method, the input data is “0”
When changing from 1 to 1, the input data is inverted at the center of the bit cell, and in the case of a pattern of consecutive 1's, the continuous 1's are inverted every 2 or 3 bits at the boundary of the bit cell. In the case of a pattern with consecutive “0”s, the data is separated by 3.5T (however, T is the period of bit cells of the input data) or more from the previous inversion. Inversion occurs at a boundary that satisfies the distance of 1.5T or more from the center of the first "1" bit cell that appears later.

Such a modulation method has a lower Tmax than other run-length limited code methods, such as the 3PM method.
can be made smaller. Also, Tmax(=
Taking advantage of the fact that a continuous modulation output of 4.5T (4.5T) never appears in normal modulation, we created a bit pattern with two consecutive 4.5T inversion intervals and a 1.5T inversion interval before. It is used as a frame synchronization signal.

In the present invention, the maximum or minimum reversal interval included in the recording signal is detected and held, and in this embodiment, the maximum reversal interval (4.5T) is detected and held in an analog manner.

In this embodiment, the maximum reversal interval is detected, not only to control the motor that rotates the disk, but also to correctly convert the playback signal into a pulse signal.
I try to keep it. In other words, in most cases, a digital signal modulated with a run-length limited code has a DC component that fluctuates depending on the data content, and either a fixed level or a level that changes so that the DC component becomes 0. Even if the playback signal is supplied to a limiter that is added as a reference level,
The resulting pulse signal has a pulse width different from that of the recording signal. The DC component is 0, and
Run-length limited codes with large Tmin are hardly known.

In addition, in optical discs, bits (indentations) that correspond to "1" or "0" of the recording signal, depending on the mastering conditions for creating the master disc, etc.
As a result, the problem of asymmetry occurs in which the on-off ratio of the reproduced signal is not the same as that of the recorded signal.

In one embodiment of the present invention, a waveform conversion circuit is configured to solve these problems and faithfully reproduce recorded signals.

Further, an embodiment of the present invention will be described with reference to the drawings. A reproduced signal (roughly sinusoidal waveform) Sp is input from the input terminal indicated by 1 in FIG. 1 to one input terminal of the limiter 2. Supplied.
A reference voltage (limit level) Vr is supplied to the other input terminal of the limiter 2, and the limiter 2 is configured to generate pulse output signals So ₁ and So ₂ having phases opposite to each other. One output signal So ₁ is in phase with the reproduced signal Sp from the input terminal 1 and is taken out to the output terminal 3. The signals So ₁ and So ₂ are respectively supplied to sawtooth wave generation circuits 4a and 4b having the same time constant. Sawtooth waves ST ₁ and ST ₂ obtained from these sawtooth wave generation circuits 4a and 4b are supplied to peak hold circuits 5a and 5b, respectively. Each output voltage Vd ₁ of this peak hold circuit 5a, 5b,
Vd ₂ is supplied to the subtraction circuit 6, the subtraction output (error signal) is supplied to the voltage generation circuit 7, and the output of the voltage generation circuit 7 is fed back to the limiter 2 as the reference voltage Vr. The voltage generating circuit 7 may simply be configured as an amplifier.

The sawtooth wave generating circuits 4a and 4b are connected to the limiter 2.
Sawtooth waves ST ₁ and ST _{2 are generated in which the output signals So 1 and So 2 are 0} , and whose levels gradually increase with the same slope. As an example, playback signal Sp
When the frame synchronization signal as described above is supplied to the input terminal 1, the limiter 2 outputs the output signal So ₁ shown in FIG. 2A and the output signal So ₂ (second Figure B) is obtained. “0” of these output signals So ₁ and So ₂
Sawtooth wave _ST1 (Fig. 2C) whose level gradually increases with a predetermined slope in the section of
ST ₂ (Fig. 2D) is the sawtooth wave generation circuit 4a, 4
Appears from b. When there is no asymmetry,
If the reference level Vr is a predetermined level, Fig. 2A
As shown by the solid line in FIG. 2B, the 4.5T "0" section and the 4.5T "1" section of the output signal So ₁ of the limiter 2 have the same length. Output signal So ₁
Even in the output signal So ₂ having the opposite polarity, the 4.5T "1" section and the 4.5T "0" section have the same length. Therefore, the peak value Vd ₁ of the sawtooth wave ST ₁ and the peak value Vd ₂ of the sawtooth wave ST ₂ are equal to each other, and the error signal appearing at the output of the subtraction circuit 6 becomes zero. At this time, the reference voltage Vr generated by the voltage generation circuit 7 is at a predetermined level.

Also, due to the presence of asymmetry, the second
As shown by the broken line in Figures A and B, the pulse width of the "1" section of the output signal So ₁ becomes wider,
When the pulse width in the "0" section becomes narrower and the output signal So ₂ exhibits an opposite change in pulse width, the peak value of the sawtooth wave ST ₁ increases as shown by the broken line in Figures 2C and 2D. decreases as Vd ₁ ′, the peak value of sawtooth wave ST ₂ rises as Vd ₂ ′,
An error signal (Vd ₁ '-Vd ₂ '=-ΔV) is generated from the subtraction circuit 6. The level of the reference voltage Vr generated from the voltage generating circuit 7 is raised by this error signal and controlled so that (ΔV=0), and fluctuations in pulse width due to asymmetry can be eliminated. Furthermore, if the direction of the pulse width shift due to asymmetry is opposite to that shown in FIG. 2, the polarity of the error signal becomes positive, and the level of the reference voltage Vr is controlled to decrease.

In addition, if the frame synchronization signal is distinguished from data by using a pattern with an inversion interval that exceeds the maximum inversion interval Tmax (4.5T in the above example) of the modulation method, the inversion interval of this synchronization signal All you have to do is detect and hold it. In short, the maximum or minimum inversion interval included in the reproduced signal is detected and held.

Output of the above peak hold circuit 5a or 5b
Vd ₁ or Vd ₂ is a level corresponding to the length of the maximum inversion interval (4.5T) in the reproduced signal. Therefore, let T be the predetermined length of the bit cell of the audio PCM signal, and let the level of the output Vd ₁ or Vd ₂ when an inversion interval of 4.5T is supplied to the peak hold circuit 5a or 5b be the speed reference voltage Vs. By detecting the level difference between this speed reference voltage Vs and Vd ₁ or Vd ₂ , it is possible to detect the amount of deviation with respect to the linear velocity during recording. In this example,
The output Vd ₂ of the peak hold circuit 5b and the speed reference voltage Vs are supplied to a level comparison circuit 8, and a speed control signal is obtained at its output terminal 9. This speed control signal is supplied to a drive circuit for a motor that rotates the disk.

Further, in order to perform highly accurate rotation control with extremely little wow and flutter, the output signal So ₁ of the limiter 2 is supplied to a PLL circuit 11 via a differentiating circuit 10. The differentiating circuit 10 has a digital configuration using, for example, an exclusive OR gate. At the output of the PLL circuit 11, a reproduced clock having a bit frequency having the same time axis fluctuation as the reproduced signal is obtained. This regenerated clock and crystal oscillator 12
The output obtained by dividing the frequency by the frequency divider 13 is supplied to the phase comparator circuit 14. This comparison output is taken out to the output terminal 15. This comparison output is also supplied to the motor drive circuit as a speed control signal.

The speed control signal obtained at the aforementioned output terminal 9 is
A PLL circuit 11 is used to provide regular phase clocking. Since the PLL circuit 11 has a limited clock range, if the speed control signal generated at the output terminal 9 is not used, the output of the crystal oscillator 12 will follow the large change in linear velocity due to the pickup scanning position. The rotation of the disk cannot be phase-locked.

FIG. 3 shows another embodiment of the present invention, which differs from the previous embodiment in that the maximum reversal interval is digitally detected and held. As in the previous embodiment, the reference voltage Vr from the voltage generating circuit 7 is applied, and the input terminal 1
A limiter 2 is provided to which a reproduced signal Sp is supplied from. Reverse polarity output signal of limiter 2
So ₁ and So ₂ are respectively supplied to the enable terminals of counters 16a and 16b, and in the "0" period of each signal So ₁ and So ₂ , a clock pulse (of a sufficiently high frequency compared to the data) from the clock oscillator 20 is supplied. ) are counted by the counters 16a and 16b.

When each signal So ₁ and So ₂ changes from “0” to “1”,
The output of counters 16a and 16b is the register 17
At the same time, the counters 16a and 16b are cleared in this "1" period. Registers 18a and 18b are connected to registers 17a and 17b, and register 17
The register 17 is determined by the magnitude relationship between the values A+ and A- held in registers a and 17b, respectively, and the values B+ and B- held in registers 18a and 18b, respectively.
The contents of a and 17b are transferred to registers 18a and 18b. In other words, (A+>
B+), (A->B-), A+ and A- are taken into registers 18a and 18b, respectively, and (A
+≦B+), (A-≦B-), register 1
The contents of 8a and 18b are kept unchanged.

In this way, data corresponding to the maximum value of the inversion interval for positive polarity and negative polarity are stored in each of the registers 18a and 18b, and the contents of both registers 18a and 18b are supplied to the subtraction circuit 6. It turns out. Therefore, as in the previous embodiment, an error signal appears from the subtraction circuit 6, and the voltage generation circuit 7 generates a reference voltage Vr that sets this error signal to zero.

Note that the contents of registers 18a and 18b are B+, B
- is configured to gradually decrease in a certain time unit corresponding to a peak hold discharge time constant. Specifically, the registers 18a and 18b may be configured as counters, and a subtraction input may be added to these, and the time unit for supplying the subtraction input is the interval at which the maximum inversion interval appears (in the above example, the frame period). Determined with consideration.

Then, the content B- of the register 18b is supplied to a digital level comparison circuit 8 (which may be composed of a subtracter), where it is compared with the reference data (corresponding to the reference voltage Vs) from the reference data generator 19, and is output. A motor control signal is taken out to terminal 9.

Further, a servo circuit including a PLL circuit 11 and a crystal oscillator 12 is provided, as in the previous embodiment.

As can be understood from the above description of one embodiment and other embodiments, according to the present invention, it is possible to read a disk without using a detector for detecting the position of a pickup and a divider to which a detection signal is supplied. Reproduction can be performed even at a constant linear velocity, and the configuration for rotation control can be made inexpensive and simple.
Further, unlike the case where control information is obtained from the rise or fall times of reproduction signals, there is an advantage that adjustment is not required every time the player or pickup is changed.

Further, the maximum value of the inversion interval in the reproduced signal is determined by the modulation method of the run-length limited code used, the synchronization pattern, and the bit rate. Therefore, once the modulation method, synchronization pattern, bit rate, and other formats of the recording signal of the rotating disk are determined, the level of the speed reference voltage Vs corresponding to the maximum value of the inversion interval becomes a specified value. In the present invention, rotation control is performed so that the detection output and this speed reference voltage Vs match, so if the formats are the same, even when playing back discs with different recording linear velocities, the respective speeds are automatically adjusted. It can be rotated at the same linear velocity as that during recording. Further, since a servo circuit including a PLL circuit 11 and a crystal oscillator 12 is used, highly accurate rotation control can be performed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention, and FIG.
The figure is a waveform diagram of each part used to explain the operation, and FIG. 3 is a block diagram of another embodiment of the present invention. 1 is an input terminal, 2 is a limiter, and 8 is a level comparison circuit.

Claims (1)

[Claims] 1 In a device that plays back a disk on which a PCM signal modulated by a run-length limited code is recorded at a constant linear velocity, the maximum or minimum inversion interval included in the signal recorded on the disk. is detected, and the detection output is compared with a reference signal corresponding to the maximum or minimum reversal interval obtained when the linear velocity is the reference, and the reproduction clock obtained from this comparison output and the reproduction signal from the disk is detected. and a comparison output obtained by comparing the phases of a reference clock obtained from a crystal oscillator to control the rotational speed of the disk.