JPS6255694A - Display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a display device, particularly a matrix type display device.

BACKGROUND OF THE INVENTION Active matrix display devices, in which display units are provided at the intersections of column electrode bus lines and row electrode bus lines, have been actively researched because they can be made flat. FIG. 4 is a diagram showing the principle of an active matrix.

As shown in Figure 4, the electrode bus line (hereinafter referred to as "
(referred to as "X selection line") 1 and an electrode bus line (referred to as
Display unit 3 is formed at the intersection with Y selection line (hereinafter referred to as "Y selection line") 2. Using the horizontal driver circuit 4 and the vertical driver circuit 5, the m-th Y selection line 2 and the n-th
Selection line 1 selects address m ” n (m
The address of a specific display unit 3a (indicating row n column) is specified.

FIG. 5 is a circuit diagram of the display unit 3, in which 6 is a switching element made of, for example, an insulated gate field effect transistor (hereinafter referred to as rMO3.FETJ), 7 is a liquid crystal, and 8 is an auxiliary capacitor. When a scanning signal that turns on the switching element 6 is input from the Y selection line 2, the display signal transmitted to the X selection line 1 is supplied to the liquid crystal 7. When the switching element 6 is formed of a slow-response thin film transistor, the display signal for one row is temporarily stored in the memory at the timing shown in FIG. 6, and the display signal for one row is simultaneously stored in the scanning signal for one row. A method of communicating this is used. This is called the line sequential method.

Problem to be Solved by the Invention Even in the case of the method of transmitting the display signal to the display unit 3 using the dotted line sequential method, when displaying a television signal, the time IH for one line is 60 μsec, and the display signal must be transmitted within this time. must be given to LCD 7.

FIG. 7 shows the rise and fall of the liquid crystal voltage. first L
H (60μ5ec), display signal 12V, next IH
(60μ5ec), the display signal OV is applied, and during this 2H, the scanning signal 18V is applied. Correspondingly, the voltage response of the liquid crystal 7 is as shown in FIG. 7(c). The parameter in this figure is the ratio W/L of the channel width W to the channel length, and it can be seen that as W/L increases, the rise and fall times become shorter. Therefore, thin film transistors (rT
FTJ), it can be seen that a structure with a large W/L is sufficient. However, since L is determined by the minimum line width for pattern accuracy, W must be increased.

However, as W increases, the area of the TPT increases, and the proportion of the display unit area occupied by the TPT increases, resulting in a decrease in the light transmittance of the receiver of the transmissive liquid crystal television. Furthermore, as W increases, the parasitic capacitance 9 due to gate-drain overlap increases.

When this parasitic capacitance 9 increases, the change in gate voltage Δ
Changes the liquid crystal voltage in proportion to VG. The so-called penetration effect becomes larger. This breakthrough voltage is expressed by . Here, ΔVG is the change in gate voltage, COO
is the gate-drain parasitic capacitance, Cadd is the auxiliary capacitance, C
Lc is the liquid crystal capacitance. From the above two points, there is a limit to increasing W, and in the case of TPT with low mobility, there is a problem that the range in which it can be used is limited.

This will be explained more specifically. With the overall configuration as shown in Figure 4,
A liquid crystal display panel having display units 3 shown in FIG. 5 was formed on a Corning 7059 glass substrate.

The switching element 6 is a semiconductor made of 1000 A-3I (amorphous silicon) and 4000 SiN.
This is a TPT formed continuously with an insulator consisting of. The capacity of the liquid crystal 7 is 0.23P F, and the auxiliary capacitance 8 is 1.47F. TP constituting the switching element 6
T has an electron mobility of 0.5 ad/V-see, a channel width W of 80 μm, and a channel length of 8 μm.

In order to transmit a display signal voltage of 12 V or Ov to this liquid crystal display panel, conventionally, gate voltages and signal voltages as shown in FIGS. 8(A) and 8(B) are applied every 60 μsec. In this case, the liquid crystal voltage immediately before the see-through effect due to the gate voltage being turned off is 11.76V, as shown in FIG. 8(c), and has not yet reached the desired signal voltage of 12V. In the case of the signal voltage Ov, the liquid crystal voltage Ov has been reached.

Means for Solving the Problems In order to solve the above problems, the display device of the present invention includes a first electrode bus group for transmitting display signals, a second electrode bus group for transmitting scanning signals, and a first electrode bus group for transmitting display signals. a display unit arranged corresponding to each intersection of the first electrode bus line and the second electrode bus line;
A switch arranged in each of these display units and driven by the scanning signal to take in the display signal, and a switch that first applies a constant preliminary signal to the first electrode bus bar during the conduction period of these switches, and then applies the display signal. The configuration includes a signal supply means.

When the action switch is configured with a MOS-FET, the falling edge exhibits a faster response than the rising edge. The initial value at which the rising and falling times are the same is higher than the average value of the display signal voltage. In this way, the rising characteristics and the falling characteristics of the switching element do not match. Therefore, by giving a preliminary signal to a value whose rise and fall times coincide in advance, and making it quickly reach a predetermined display signal value in the remaining period, a display signal can be given over a certain period of time. The predetermined display signal value is reached faster than otherwise.

EXAMPLE Hereinafter, an example of the present invention will be described based on FIGS. 1 to 4.

First, the principle of the present invention will be explained using FIG. As shown in Figure 1 (B), within 60 μsec, a constant preliminary signal (a) is applied in advance regardless of the signal voltage for a certain time (14 V, 30 μ5 ec here), and then for the remaining time (30 μ5 ec in this case). ) to give the desired display signal voltage (b) or (C) (here 12V or OV). Thereby, as shown in FIG. 1(c), a desired signal voltage can be applied as the liquid crystal voltage without changing the size of the TPT. Also, as shown in Figure 1(c), if a preliminary signal of 14V and 30μsec is applied,
22 μsec is sufficient for the display signal, and the total time is 52 μsec.
At c, the liquid crystal voltage has reached the correct display signal voltage. However, even for TPTs with the same characteristics, preliminary signals (
By providing a), the desired display signal can be transmitted more quickly. Also, from the above, in order to make it possible to transmit display signals in the same time, it is possible to make W of TPT a little smaller, and the penetration effect can be reduced. In the circuit diagram of the display device in the example, the TPT drive liquid crystal display panel 11 is a conventional plasma CVD
It was made of TPT whose main materials are amorphous silicon and silicon nitride using a method. However, this display board 11 includes in addition to the TFT 12 as a display element.

An open/close switch TFT 14 is also built into the end of the signal side bus 13.

The video input to the signal sampling circuit 15 constituting the horizontal driver is sampled and entered into n memories 16 corresponding to IH picture elements. Sending timing pulse P obtained by dividing IH by N (=3).

Q, R and the transmission control gate lines Ta, Tb, Tc can be arbitrarily combined by a transmission timing switch 17. Each of the image signals grouped by the degree of overlap N (=3) is sent out from the output amplifier 18 in a time-serial manner every time that LH is divided by N (=3).

On the other hand, on the array side of the TFT 12, an open/close switch TFT 14 is connected to one end of each of the signal side bus bars 13. These are the input signal P to the reception timing switch 19,
Opening/closing is controlled by control lines Ga, Gb, and Gc connected to Q and S signals that are always at level 1. Please note that sending
In switching the reception timing, Ta-Ga, Tb-
Gb, Tc-GC are synchronously connected to P, Q, R, and S. 20 is a liquid crystal, 21 is a vertical driver circuit, 22 is a scanning bus, and 23 is an auxiliary capacitor.

Specific display signal VS IG, gate signal VGHI applied to TFT14, VGH2, VG3, and TFT1
The voltage is applied to the gate signal VGL applied to the gate signal VGL according to the timing chart shown in FIG. Also, the capacitance of the liquid crystal 20 is 0.04 pF, and the auxiliary capacitance 23 is 0.31 pF.
The table below shows the voltage of the liquid crystal 20 after 60 μsec when the channel width of the TFT 14 is fixed at 8 μm and the channel width is changed when the W/L of the TFT 14 is 24 μm/8 μm in PF. After 60 μsee, the value includes the voltage drop due to the dandruff effect. According to this, there is an optimal channel width in the conventional method. It can be seen that in this case, W = around 800 μm. Conventionally, voltage was applied at the timing shown in Fig. 9, whereas as shown in the timing chart shown in Fig. 3, the voltage was applied at the timing shown in Fig. 3.
All TFTs for one row in the first 12 μsec of μsec
If a preliminary signal is given to 14 and a display signal is given to the remaining 15μSeC, the liquid crystal voltage after 60μsee is as shown in the table below.If 12V or more is applied to the 6 preliminary signals, which changes depending on the voltage of the preliminary signal, the following is shown below. It can be seen that the liquid crystal voltage reached across all channel lengths in the table increases. Note that the preliminary signal (a) is generated by the signal sampling circuit 15.
At this time, all open/close switches TFTs 14 are turned on by the reception timing switch 19.

In the above embodiment, the liquid crystal display board 11 is made of a-8i TFT.
Although an example of driving is shown, it goes without saying that the present invention is generally applicable to display panels driven by EL or other matrix types. In addition, the applied voltage and time of the preliminary signal of the present invention should be determined so that the display signal can arrive quickly.

Effects of the Invention As described above, according to the present invention, since a preliminary signal is provided, a display signal can be transmitted more quickly even if switching elements of the same material and configuration are used as switches. In particular, when an insulated gate field effect transistor is used as a switch, it is possible to apply a display signal to each display unit during the same time even if the size of the transistor is small, and the influence of the see-through effect due to parasitic capacitance is also reduced. Furthermore, in a transmissive display device such as a liquid crystal display device, the area of a switching element constituting a switch can be reduced, so that light transmittance can be improved.

[Brief explanation of drawings]

FIG. 1 is a diagram explaining the principle of a display device of the present invention, FIG. 2 is a circuit diagram of a display device according to an embodiment of the present invention, and FIG.
Figure 4 is a configuration diagram of a general matrix type display device, Figure 5 is a circuit diagram of the display unit of the same matrix type display device, and Figure 6 is a conventional line sequential display. Timing chart of device signals, No. 7
The figure is a signal waveform diagram of each part of the display device, FIG. 8 is a diagram explaining the principle of the display device, and FIG. 9 is a timing chart of the display device. 11... TPT drive liquid crystal display board, 12... TFT,
13...Signal side bus bar, 14...Opening/closing switch TPT
, 15... signal sampling circuit, 20... liquid crystal,
22... Scanning side bus line, 23... Auxiliary capacity agent Yoshihiro Morimoto Figure 1 Pino (V) CC-)P Figure 3 Time opening Figure 4 Figure S Figure 7 tA) (Cn14 Illustration 1 (B) (V) Time opening Illustrated 7th chair

Claims (1)

[Claims] 1. A first electrode bus group for transmitting display signals, a second electrode bus group for transmitting scanning signals, and a combination of the first electrode bus group and the second electrode bus group. a display unit disposed corresponding to each intersection; a switch disposed in each of these display units and driven by the scanning signal to capture the display signal; A display device comprising signal supply means for first supplying a predetermined preliminary signal to the group and then supplying a display signal. 2. The display device according to claim 1, wherein the preliminary signal is larger than the average value of the display signal. 3. Each of the first electrode busbar groups is connected to an on-off switch at one end, and a plurality of electrode busbars are connected to one signal supply line for each set via the on-off switch, supplying the preliminary signal to all first electrode busbars of each set simultaneously;
3. The display device according to claim 1, wherein the display signal is sequentially supplied to each first electrode bus line for each group. 4. The display device according to claim 1, wherein the switch is an insulated gate field effect transistor. 5. The display device according to claim 3, wherein the opening/closing switch is an insulated gate field effect transistor.