JPS625452A - Memory area control system - Google Patents

Abstract

PURPOSE:To expand a memory using area without being limited by arraying memory areas in parallel and permitting a memory write control means and a memory read control means to write and read data in the memory areas arrayed in parallel. CONSTITUTION:A memory write control part 1 selects simultaneously one or plural areas in a specific memory area M0 and memory areas M1-Mn and writes data in them. When the position concerned in the memory area is addressed, an arithmetic processing part 5 specifies the area within the range of the area specifying capability of the specific memory area M0. A memory write control part 1 inhibits data from being written in the memory area M0, and a control is made so that data is written in the memory areas M1-Mn. Then the arithmetic processing part 5 has n-fold area control capability. At the time of reading memory, a read control is made by a selecting part 3 through a memory read control part 2, and therefore the arithmetic processing part 5 has the n-fold area control capability.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a system for controlling a memory usage area in a system such as a microcomputer where the memory control area is small.

[Conventional technology]

In conventional miniaturized microcomputer systems, a mechanism is built to run from a specific address when the power is turned on or reset, and a memory area is created to store programs for the initial settings necessary for the system, as well as operations for operation management. In order to solve the problem that the memory area used by the user is under pressure in the memory area for storing programs, the following method is adopted.

The first method is a memory bank switching method, in which a specific memory area MO having an initial setting program area IP and a user program area UP is selected as shown in FIG.
and n memory areas Ml-Mn arranged in parallel, each having an operational program area OP and a user program area UP, are switched by a memory bank switching device to expand the apparent memory usage area.

The second method is an over-one-noy method, in which the user is divided into an overlay area OA of a memory area Mx having an initial setting program area IP, a user program area UP, and an overlay area OA, as shown in FIG. By pulling out the program from the auxiliary memory area My where it is stored and executing a long user program,
The apparent memory usage area is expanded.

Furthermore, in a microcomputer system, when a user program is executed, a certain type of data is generated, but there is a problem in that the memory area that can store this data is limited. The solution to this problem is to expand the memory designation area, but this designation is naturally determined by the number of address designation bits. In general, the addressing ability of an arithmetic processing unit is almost always determined by two factors, hardware factors and software factors, which are determined from the initial setting. Therefore, in order to control a large memory space, it is necessary to adopt the f, Kt-valley method or the memory bank switching method as described above, or to provide a base register dedicated to addressing in the arithmetic processing section and use the pace register as described above. We have adopted a method of expanding the memory specification space by calculating the address information handled in the program.

[Problem that the invention seeks to solve]

The above method of expanding the memory area was conceived as a method to solve the problem that the memory usable area for the user is under pressure in the program area for initial settings, the operational program area for operation management, and the like.

However, all of these methods require transfer from memory to memory via a data bus in order to run the user's program, resulting in overhead for the time required for transfer and an increase in dynamic steps, i.e. Although it has the advantage of expanding the memory area, it has disadvantages such as a decrease in processing performance.

In addition, since the program area for initial settings is placed in an important position that is fixed in the system, the user must be aware of this area.Furthermore, if you want to use it as a simulation device, you can use the memory bank switching and overlay described above. Although this method makes it appear to the user that the area is being used, it has the drawback that it is not possible to run programs in the same area.

Furthermore, the above-mentioned methods are always defined by the addressing method of the arithmetic processing section, and therefore, the addressing method and the number of bits of the arithmetic processing section are factors that determine the system capacity.

[Means for solving problems]

SUMMARY OF THE INVENTION An object of the present invention is to provide a memory area control method that can improve the above-mentioned drawbacks and expand the program area while maintaining the addressing of the arithmetic processing unit.

The present invention provides a memory area control method for a computer system in which an initial setting program is stored in a specific memory area and allows running of user-level programs, etc. a plurality of memory areas arranged in the memory area; write control means for controlling simultaneous writing to the specific memory area and one or more of the plurality of memory areas; The present invention is characterized in that the memory area used is the entire area as viewed from the user level program.

〔Example〕

Next, one embodiment of the present invention will be described below using FIG.

In this embodiment, there is one specific memory area MO having an initial setting program area IP and a user program area UP in which programs for controlling the system such as initial settings are stored, and n specific memory areas MO having user programs. Memory areas M1 to Mn are arranged in parallel. Each of the memory areas Ml to Mn is specified using the same specification method as the specific memory area MO. These memory areas MO, Ml
. . . Write control to Mn is performed by a memory write control unit 1 that can write to one or more of these memory areas simultaneously.
This is done by On the other hand, memory area MO1M1...M
Reading from n is performed by a memory read control section 2 and a memory read area selection section 3 controlled by this memory read control section.

Each output terminal of the memory write control section 1 is connected to an AND gate 1-
GO, Gl...Gn are each connected to one input terminal, and the other input terminal of these AND gates is connected to the data bus 4. AND game) Go, C1...
Each output terminal of Gn is connected to a write terminal W of memory areas MO, Ml...Mn, respectively. The read terminals R of these memory areas are each connected to the input terminal of the selection section 30, and the output terminal of this selection section is connected to the data bus 4. The selection unit 30 control terminal is connected to the memory read control unit 2. Note that 1.5 in the figure is an arithmetic processing section.

Memory write control unit 1. The memory read control unit 2 and the selection unit 3 are configured to connect only the memory area MO to the data bus 4 at power-on or initial reset. In other words, the memory write control unit 1 is
Turning on the D gate GO, the memory read control unit 2 controls the selection unit 3 to select the memory area MO. On the other hand, the arithmetic processing unit 5 connects the memory area MO via the data bus 4.
By specifying the initial setting program area IP, the initial setting block 1'' runs.

1 As mentioned above, in the conventional system, the at1/sourcing method and the number of bits of the 7 arithmetic processing units lowered the system performance, but according to this embodiment, the addressing of the arithmetic processing unit 5 remains the same. , the program area can be expanded. For example, it is assumed that the memory area @MO stores only the program portion and does not have a data area. Therefore, 4
When setting any of the memory areas Ml to Mn as the 1-day area, the 1 dosing in the arithmetic processing unit 5 directly specifies the specific memory area MO or the entire area of one memory area Ml to Mn. If there is only the ability, originally it is not possible to directly specify from memory area MO to memory area Mn. However, according to this embodiment, the memory write control unit 1 writes the specific memory area MO and the memory area M1.
It is possible to write data by selecting one or more of Mn at the same time. When the corresponding position in the memory areas M1-Mn is to be retrieved, the arithmetic processing unit 5
For example, the specification is made within the range of the area specification capability of the specific memory area MO, but 2. When the memory write control unit 1 prohibits writing to the memory area MO and performs control to write to the memory area MO-"Mn, the arithmetic processing unit 5 only has the ability to control the memory area MO. First, it has n times the area control ability.

On the other hand, even at the time of memory reading, the selection section 3 performs readout control via the memory readout control section 2, so that the arithmetic processing section 5 has an n-fold area despite the area specification capability of the memory area MO. It will have control ability.

In fact, in the present invention, the following method of use can be found to be more advantageous than the above method.

That is, the memory write control unit 1 controls the specific memory '
Since it is possible to simultaneously write to multiple memories in the fr1 area MO and memory areas M1 to Mn, it is possible to easily save data necessary for program construction, and also to save time by writing simultaneously. Can be done. In addition, if the specific memory area MO and each memory area MO arranged in parallel have the same content as -Mn, the arithmetic processing unit 5 can re-run the specific memory area MO in the memory areas MO to Mn. There are many.

〔Effect of the invention〕

As described above, according to the present invention, memory areas are arranged in parallel, and the memory areas arranged in parallel can be freely written and read 7 by the memory write control means and the memory read control means. Therefore, there is an effect that the memory usage area can be expanded without being subject to memory area constraints.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the method according to the present invention, FIG. 2 is a block diagram showing a conventional memory bank switching method, and FIG. 3 is a block diagram showing a conventional overlay method. 1...Memory write control unit 2...Memory read control unit 3...Memory read area selection unit 4...Data bus 5...Arithmetic processing unit

Claims (1)

[Claims] (1) In a memory area control method for a computer system in which an initial setting program is stored in a specific memory area and allows user-level programs to run, each program is stored in a parallel memory area using the same designation method as the specific memory area. a plurality of arranged memory areas; write control means for controlling simultaneous writing to the specific memory area and one or more of the plurality of memory areas; 1. A memory area control method, comprising read control means for controlling reading from only one of the memory areas, and the memory area used is the entire area as viewed from a user level program.