JPS6252924B2 - - Google Patents
Info
- Publication number
- JPS6252924B2 JPS6252924B2 JP17038381A JP17038381A JPS6252924B2 JP S6252924 B2 JPS6252924 B2 JP S6252924B2 JP 17038381 A JP17038381 A JP 17038381A JP 17038381 A JP17038381 A JP 17038381A JP S6252924 B2 JPS6252924 B2 JP S6252924B2
- Authority
- JP
- Japan
- Prior art keywords
- thermistor
- temperature
- chip
- heat
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000010408 film Substances 0.000 claims description 17
- 238000004519 manufacturing process Methods 0.000 claims description 10
- 238000010438 heat treatment Methods 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 8
- 239000010409 thin film Substances 0.000 claims description 6
- 230000000694 effects Effects 0.000 description 10
- 238000011282 treatment Methods 0.000 description 5
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Substances [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- 238000000137 annealing Methods 0.000 description 3
- 238000002474 experimental method Methods 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- LTPBRCUWZOMYOC-UHFFFAOYSA-N Beryllium oxide Chemical compound O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 239000007772 electrode material Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 230000000087 stabilizing effect Effects 0.000 description 2
- 229910018487 Ni—Cr Inorganic materials 0.000 description 1
- 230000032683 aging Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- KZHJGOXRZJKJNY-UHFFFAOYSA-N dioxosilane;oxo(oxoalumanyloxy)alumane Chemical compound O=[Si]=O.O=[Si]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O KZHJGOXRZJKJNY-UHFFFAOYSA-N 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052863 mullite Inorganic materials 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
Landscapes
- Thermistors And Varistors (AREA)
Description
本発明は絶縁性基板の一方の表面に感温抵抗体
膜と電極を形成してなる薄膜サーミスタの製造方
法に関し、サーミスタ素子(以下チツプと称す)
を高真空中で加熱処理することにより、特性の熱
的安定化を図ることを目的とする。
チツプは、第1図に示すように絶縁性基板1の
一方の表面に感温抵抗体膜2と電極膜3とを形成
して構成される。絶縁性基板1には、アルミナ、
ムライト、ベリリア、石英、硼珪酸ガラスなどが
用いられる。感温抵抗体膜2は、SiCの薄膜が用
いられる。電極膜3には、Cr、Ni、Ni―Crなど
をアンダーコートしたAu、Cu、Agなどの蒸着電
極膜、あるいはAg、Au、Ag―Pd、Pt、Au―Pt
などの厚膜電極膜が用いられる。
この種チツプは、熱的影響を受けた場合、サー
ミスタ特性(抵抗値ならびにサーミスタ定数)が
大幅に変化する。サーミスタ特性に及ぼす実際の
熱的影響は、次の2点が考えられる。第1にはサ
ーミスタ製造過程におけるチツプ形成後のリード
付け工程である。この工程はチツプの電極部に低
融点ガラス粉末の焼付をし、これを介してリード
線の接続がされる。この低融点ガラス粉末の焼付
けには700℃×5分の作業条件を要し、そのため
サーミスタ特性は著しい熱的影響を受ける。
第2にはサーミスタ実用過程における使用温度
である。この種サーミスタは調理器の庫内温度の
検出などに利用されるため、最高使用温度では
350℃を断続的に受けることになる。
これらの熱的影響は、前者がサーミスタ製造面
の歩留など生産性に、後者はサーミスタの寿命や
信頼性に反映してくる。
従来この種チツプを熱的に安定化するために、
チツプを予めアニーリング処理する方法が用いら
れていた。このアニーリング処理は、チツプの形
成がおこなわれた後に、電気炉などにより加熱処
理(大気中でエージング)する方法で、通常700
℃×20分〜3時間程度(大気中)の条件が用いら
れる。なかでも、700℃×1時間以上の条件にお
いては、安定化に対する効果には大差がなく、作
業時間短縮にも適することから実際の製造には
700℃×1時間の条件が用いられていた。しか
し、従来のアニーリング処理によると、サーミス
タ特性に及ぼす熱的影響をかなり抑制することは
できるが、その変動幅を小さくすることは困難で
あつた。従つてサーミスタ製造面での歩留の低下
や、信頼性面でのバラツキが大きいなどの欠点を
有していた。
本発明は絶縁性基板の一方の表面に感温抵抗体
膜と電極膜とを形成したチツプにおいて、少なく
ともチツプを高真空中で加熱処理することにより
上記従来の欠点を解消するものである。以下、本
発明の一実施例について詳細に説明をする。
実施例
実験用試料には、前述したチツプ構成より絶縁
性基板に純度96%のアルミナ基板( L6.5× W1.8
× t0.5m/m)、電極膜には金・白金ペーストの
厚膜焼結体、感温抵抗体膜にはSiCのスパツタ蒸
着膜(2.5μm厚さ)を選んだ。この様にして作
成されたチツプのサーミスタ初期特性は、抵抗値
(50℃で測定)が約180KΩ、サーミスタ定数(50
℃及び140℃間の値)が約2375〓であつた。
次に高真空中の加熱処理には、汎用型の真空炉
(〜×10-6Torr)を用いた。加熱温度の設定は
400、500、700、900℃を選び、各温度における保
持時間を10、20、30、40、50、60分とした。真空
圧力は真空到達圧力を3×10-6Torrに設定し、
加熱による真空度の低下を含め圧力が5×
10-3Torr以下になる様にコントロールをした。
この様にして高真空中で加熱処理した、チツプの
抵抗値変化(於50℃測定)の関係を第2図に示し
た。第2図においてイは400℃処理、ロは500℃処
理、ハは700℃処理、ニは900℃処理の経時に対す
る抵抗値特性を示すもので、各々には特徴のある
特性曲線を示すことが明らかになつた。実験では
イ,ロ,ハ,ニの各温度を選んだが、その間にお
ける各温度に付いては、第2図に示した温度依存
性を有した特性曲線に類似したそれぞれの特性曲
線が得られることは容易に類推することができ
る。
上述の様に作成された各試料について、熱的影
響の試験をした。熱的影響の試験条件には、前述
のサーミスタ製造上の温度を考慮した700℃×10
分(大気中)放置ならびに実用上の使用温度を考
慮した400℃×1000時間(大気中)放置を選び実
施をした。この試験の前後における50℃抵抗値お
よび50℃−140℃間におけるサーミスタ定数の変
化率を調べ、サーミスタ特性の安定化効果に対す
る評価とした。
また、本発明の効果を比較するため、従来の加
熱処理の代表である700℃×60分(大気中)のア
ニーリング処理したチツプと、さらに真空条件の
比較を含めた1〜10×10-2Torr範囲のの低真空
域にコントロールされたなかで700℃×10分加熱
処理をしたチツプを用い同じ熱的影響の試験をし
た。
その結果、本発明による高真空中で加熱処理さ
れたチツプのサーミスタ特性は、熱的に非常に安
定化することが判つた。なかでも加熱処理の温度
保持時間をパラメータに見た場合、その安定化の
効果では大きな差異は見られなかつた。
これらの中より第2図に示すイ〜ニの内で10分
間加熱保持をした系のものを代表に、従来例、な
らびに低真空域処理のものとの比較を表に示し
た。表−には700℃×10分(大気中)放置、表
―には400℃×1000時間(大気中)放置による
熱的影響の試験結果を示している。
表―、からも明らかな様に、本発明の高真
空中で加熱処理されたチツプのサーミスタ特性
〔抵抗値(於50℃)変化率をΔR′で、サーミスタ
定数(於50→←140℃間)の変化率をΔBで示し
た〕は、熱的影響に対し非常に安定した効果を示
すことが判る。また、実用上のサーミスタ特性の
変化は、抵抗値が±6%、サーミスタ定数が±2
%程度以内を必要とするが、少なくとも500℃以
上の高真空で加熱処理されたチツプのサーミスタ
特性の変化率は、これを充分に満したものである
ことが判る。また、高真空中で400℃の加熱処理
をしたチツプならびに低真空域で加熱処理をした
チツプにおいては、サーミスタ特性の著しい熱的
安定性の結果が得られなかつた。しかし、上記の
サーミスタ特性の変化の許容範囲が広い使い方を
しようとする場合では、それらの熱処理でも充分
にその効果を果すことは明らかである。従つて互
換性に優れた薄膜サーミスタの製造が可能となつ
た結果、歩留の向上の実現。さらには熱的安定性
が向上した結果、安定した信頼性が得られる。
また、今回の実験では、加熱処理温度を
MAX900℃にしているが、これはチツプの電極材
料の耐熱性の点からこの温度設定がなされたため
で当然その電極材料の構成で温度範囲が変ること
は容易に類推できることである。
The present invention relates to a method for manufacturing a thin film thermistor in which a temperature sensitive resistor film and an electrode are formed on one surface of an insulating substrate.
The purpose is to thermally stabilize the properties by heat-treating the material in a high vacuum. The chip is constructed by forming a temperature-sensitive resistor film 2 and an electrode film 3 on one surface of an insulating substrate 1, as shown in FIG. The insulating substrate 1 includes alumina,
Mullite, beryllia, quartz, borosilicate glass, etc. are used. As the temperature sensitive resistor film 2, a thin film of SiC is used. The electrode film 3 is a vapor-deposited electrode film of Au, Cu, Ag, etc. undercoated with Cr, Ni, Ni-Cr, etc., or Ag, Au, Ag-Pd, Pt, Au-Pt.
A thick film electrode film such as the following is used. When this type of chip is subjected to thermal influences, the thermistor characteristics (resistance value and thermistor constant) change significantly. The following two points can be considered as the actual thermal influence on the thermistor characteristics. The first is the lead attachment process after chip formation in the thermistor manufacturing process. In this process, low-melting glass powder is baked onto the electrodes of the chip, and lead wires are connected through this. Baking of this low melting point glass powder requires working conditions of 700°C for 5 minutes, so the thermistor characteristics are significantly affected by heat. The second factor is the temperature at which the thermistor is used in practical use. This type of thermistor is used to detect the internal temperature of a cooker, so at the maximum operating temperature,
It will be exposed to 350℃ intermittently. The former is reflected in productivity such as the yield of thermistor manufacturing, and the latter is reflected in the life and reliability of the thermistor. Conventionally, in order to thermally stabilize this type of chip,
A method of pre-annealing the chip was used. This annealing process is a method of heating (aging in the atmosphere) in an electric furnace or the like after the chip has been formed.
The conditions of approximately 20 minutes to 3 hours (in the atmosphere) are used. In particular, under conditions of 700℃ x 1 hour or more, there is no significant difference in stabilization effect and it is suitable for shortening working time, so it is not recommended for actual manufacturing.
Conditions of 700°C x 1 hour were used. However, although the conventional annealing treatment can considerably suppress the thermal influence on the thermistor characteristics, it has been difficult to reduce the range of fluctuation thereof. Therefore, there have been disadvantages such as a decrease in the yield in manufacturing thermistors and large variations in reliability. The present invention solves the above-mentioned conventional drawbacks in a chip having a temperature-sensitive resistor film and an electrode film formed on one surface of an insulating substrate by heat-treating at least the chip in a high vacuum. Hereinafter, one embodiment of the present invention will be described in detail. Example For the experimental sample, an insulating substrate and an alumina substrate ( L 6.5 × W 1.8
× t 0.5m/m), a thick film sintered body of gold/platinum paste was selected for the electrode film, and a sputter-deposited SiC film (2.5 μm thick) was selected for the temperature-sensitive resistor film. The initial characteristics of the thermistor of the chip created in this way are a resistance value (measured at 50℃) of approximately 180KΩ, and a thermistor constant (50KΩ).
℃ and 140℃) was approximately 2375〓. Next, a general-purpose vacuum furnace (~×10 -6 Torr) was used for heat treatment in high vacuum. Setting the heating temperature
400, 500, 700, and 900°C were selected, and the holding time at each temperature was 10, 20, 30, 40, 50, and 60 minutes. The vacuum pressure was set to 3×10 -6 Torr.
The pressure is 5x including the decrease in the degree of vacuum due to heating.
Control was performed to keep it below 10 -3 Torr.
Figure 2 shows the relationship between the resistance value change (measured at 50°C) of the chip heat-treated in a high vacuum in this manner. In Figure 2, A shows the resistance value characteristics over time for 400°C treatment, B for 500°C treatment, C for 700°C treatment, and D for 900°C treatment, each of which shows a characteristic curve. It became clear. In the experiment, temperatures A, B, C, and D were selected, but for each temperature in between, characteristic curves similar to the temperature-dependent characteristic curves shown in Figure 2 can be obtained. can be easily inferred. Each sample prepared as described above was tested for thermal effects. The test conditions for thermal effects include 700℃ x 10
We chose to leave the sample at 400°C for 1000 hours (in the atmosphere) considering the practical use temperature. The 50°C resistance value before and after this test and the rate of change in the thermistor constant between 50°C and 140°C were examined to evaluate the effect of stabilizing the thermistor characteristics. In addition, in order to compare the effects of the present invention, we also compared chips annealed at 700°C for 60 minutes (in air), which is typical of conventional heat treatment, and vacuum conditions of 1 to 10 x 10 -2. The same thermal effect tests were conducted using chips heated at 700°C for 10 minutes in a controlled low vacuum region of the Torr range. As a result, it was found that the thermistor characteristics of the chip heat-treated in a high vacuum according to the present invention were extremely stabilized thermally. In particular, when looking at the temperature holding time of heat treatment as a parameter, there was no significant difference in the stabilizing effect. Among these, the system which was heated and held for 10 minutes under conditions A to D shown in Fig. 2 is representative, and the table shows a comparison with conventional examples and those processed in a low vacuum region. The table shows the thermal effect test results after being left at 700℃ for 10 minutes (in the atmosphere), and the table below shows the results of thermal effects when left at 400℃ for 1000 hours (in the atmosphere). As is clear from the table, the thermistor characteristics of the chip heat-treated in a high vacuum according to the present invention [resistance value (at 50℃) change rate is ΔR', thermistor constant (between 50→←140℃ It can be seen that the rate of change of ) is shown as ΔB] exhibits a very stable effect against thermal influences. In addition, changes in thermistor characteristics in practical use include resistance values of ±6% and thermistor constants of ±2%.
% or less, but it can be seen that the rate of change in the thermistor characteristics of chips heat-treated in a high vacuum of at least 500° C. satisfies this requirement. Furthermore, no remarkable thermal stability of the thermistor characteristics could be obtained for chips heat-treated at 400°C in a high vacuum and chips heat-treated in a low vacuum region. However, if the above-mentioned use is intended to have a wide permissible range of change in the thermistor characteristics, it is clear that these heat treatments can be sufficiently effective. Therefore, it has become possible to manufacture thin film thermistors with excellent compatibility, resulting in improved yields. Furthermore, as a result of improved thermal stability, stable reliability can be obtained. In addition, in this experiment, the heat treatment temperature was
The maximum temperature is set at 900℃, because this temperature setting was made from the viewpoint of the heat resistance of the chip's electrode material, and it can be easily inferred that the temperature range changes depending on the composition of the electrode material.
【表】【table】
【表】【table】
【表】
以上の説明から明らかなように、本発明のチツ
プを高真空中で加熱処理することにより、サーミ
スタ特性の優れた熱的安定性が図れ、サーミスタ
製造上の歩留の向上、信頼性の向上等の効果が得
られるものである。[Table] As is clear from the above explanation, by heat-treating the chip of the present invention in a high vacuum, excellent thermal stability of thermistor characteristics can be achieved, and the yield and reliability of thermistor manufacturing can be improved. It is possible to obtain effects such as improvement of
第1図は本発明のなかの実験に使用したサーミ
スタ素子(チツプ)を模式的に示す断面図、第2
図はチツプを高真空中で加熱処理したときの抵抗
値(於50℃)と時間の関係を示す図である。
1……絶縁性基板、2……感温抵抗体膜、3…
…電極膜。
Figure 1 is a cross-sectional view schematically showing the thermistor element (chip) used in the experiment of the present invention, Figure 2
The figure shows the relationship between resistance value (at 50°C) and time when a chip is heat-treated in a high vacuum. 1... Insulating substrate, 2... Temperature sensitive resistor film, 3...
...electrode membrane.
Claims (1)
極膜とを形成してサーミスタ素子を作り、その
後、このサーミスタ素子を高真空中で加熱処理す
る薄膜サーミスタの製造方法。 2 真空圧力は少なくとも5×10-3Torr以下で
ある特許請求の範囲第1項記載の薄膜サーミスタ
の製造方法。 3 加熱処理温度は少なくとも500℃〜900℃の範
囲である特許請求の範囲第1項記載の薄膜サーミ
スタの製造方法。[Claims] 1. Manufacturing of a thin film thermistor by forming a temperature-sensitive resistor film and an electrode film on one surface of an insulating substrate to produce a thermistor element, and then heat-treating the thermistor element in a high vacuum. Method. 2. The method for manufacturing a thin film thermistor according to claim 1, wherein the vacuum pressure is at least 5×10 -3 Torr or less. 3. The method for manufacturing a thin film thermistor according to claim 1, wherein the heat treatment temperature is at least in the range of 500°C to 900°C.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17038381A JPS5871603A (en) | 1981-10-23 | 1981-10-23 | Method of producing thin film thermistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17038381A JPS5871603A (en) | 1981-10-23 | 1981-10-23 | Method of producing thin film thermistor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5871603A JPS5871603A (en) | 1983-04-28 |
JPS6252924B2 true JPS6252924B2 (en) | 1987-11-07 |
Family
ID=15903911
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17038381A Granted JPS5871603A (en) | 1981-10-23 | 1981-10-23 | Method of producing thin film thermistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5871603A (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2727541B2 (en) * | 1987-06-12 | 1998-03-11 | エヌオーケー株式会社 | Manufacturing method of thin film thermistor |
JP2504309B2 (en) * | 1990-08-23 | 1996-06-05 | 株式会社村田製作所 | Method for forming electrode of porcelain semiconductor element |
JPH07123082B2 (en) * | 1990-08-23 | 1995-12-25 | 株式会社村田製作所 | Method for forming electrode of porcelain semiconductor element |
-
1981
- 1981-10-23 JP JP17038381A patent/JPS5871603A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5871603A (en) | 1983-04-28 |
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