JPS6250973B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and when selectively implanting ions, a film is provided as a reference for positioning, especially in a mask alignment process, and the ion-implanted part and other parts are separated from each other. To improve mask alignment accuracy and uniformity of ion implantation by clarifying the boundary between the parts of The purpose is to measure.

When implanting ions into a semiconductor substrate (hereinafter referred to as a wafer), an oxide film of approximately 1000 Å or thinner is usually provided on the main surface of the wafer as a protective film to reduce the effects of contamination on the main surface of the wafer and channeling of the ion beam. A common method is to implant ions through this oxide film. Furthermore, Al, photosensitive resin (hereinafter referred to as photoresist), or the like is used as a mask for selectively performing ion implantation. As described above, in order to selectively implant ions, it is necessary to form at least a two-layer structure on the main surface of the wafer, consisting of a thin oxide film and a material that serves as a mask for ion implantation. This simplest method is the first
This will be explained using figures. In Fig. 1, 11 is a Si semiconductor wafer, 12 is an oxide film thinner than about 1000 Å,
A material 13 serves as a mask for ion implantation, and here it is a photoresist. A pattern is formed on the photoresist 13 by photoetching. When ion implantation is performed using this structure, the first step after ion implantation is to apply photoresist 1.
Once 3 is removed, no pattern of the photoresist 13 remains in the oxide film 12, so it becomes impossible to distinguish between the ion-implanted region and other regions. Therefore, as the first step after ion implantation, the oxide film 12 is etched using the photoresist 13 as a mask, and then the photoresist 13 is etched.
If the oxide film 12 is removed, the photoresist 13 is removed.
The same pattern that was formed can be left behind. The pattern left on the oxide film 12 by this method is a step difference at the boundary between the ion-implanted region and other regions, that is, the thickness of the oxide film 12 is 1000 mm.
It can be distinguished only by the degree of Å. However, in the later photo-etching process, when mask alignment is performed using the pattern formed by this step of about 1000 Å as a reference, it is difficult to clearly identify the reference pattern because the step is small. The accuracy of alignment decreases. This reduces the yield as the density and miniaturization of semiconductor devices such as semiconductor integrated circuits progress.

Conventionally, therefore, a method has been used in which a thick oxide film is previously formed on the main surface of the wafer, a photoresist pattern is provided thereon, and the photoresist is used as a mask for etching, leaving a portion of the thick oxide film. To explain with reference to FIG. 2, for example, an oxide film 22 thicker than about 2000 Å is provided on the main surface of a silicon wafer 21, and a photoresist 23 is further formed on the oxide film 22.
The openings 23a are formed by coating and photoetching (FIG. 2A). Next, using the photoresist 23 as a mask, remove the oxide film 22 at the opening 23a.
etching. At this time, if etching is stopped with the necessary amount of oxide film 22 remaining in the opening 23a, it is possible to form a large step in the oxide film 22 (FIG. 2B). However, according to this method, in the etching process of the oxide film 22, it is difficult to make the etching amount of the oxide film 22 uniform over the entire wafer and to precisely control the thickness of the oxide film left in the opening portion 23a. is difficult. For example, when a thick oxide film 22 is etched using a sputter etching device, the nonuniformity of the etching amount within the wafer is greater than about 200 Å, so the thickness of the oxide film left in the opening 23a is nonuniform. also becomes larger than about 200 Å. Therefore, the non-uniformity of ion implantation within the wafer which is performed from above increases, and the yield in the manufacturing process of semiconductor devices decreases.

Furthermore, when forming holes in both the thick and thin parts of the oxide film 22 in the subsequent process, if both are etched simultaneously using a mixed solution of hydrofluoric acid and ammonium fluoride, the thin oxide film and the thick oxide film 22 can be etched simultaneously. There is a large difference in film etching time. Therefore, if holes are simultaneously formed in one photoetching process, the thin oxide film will be etched laterally after the thin oxide film is first etched until the thick oxide film is etched. Therefore, it is difficult to accurately form holes in a thin oxide film. moreover,
As mentioned above, if the thickness of the thin oxide film is highly non-uniform, the amount of etching in the lateral direction will also be non-uniform, resulting in large non-uniformities in the opening dimensions within the wafer and a decrease in dimensional accuracy. .

In order to eliminate such drawbacks, the present invention provides a surface protective film for the ion-implanted region of the wafer, which can be selectively etched on the main surface of the wafer, a silicon film that serves as a reference for alignment, and a silicon film that serves as a reference for alignment. A photosensitive resin film serving as a mask for injection is laminated, and holes are formed in the photosensitive resin film by a photoetching process. Next, use the photosensitive resin film as a mask,
An opening is formed in the silicon film using the protective film as an etching stopper, and ions are implanted through the protective film in the opening. Next, the photosensitive resin is removed, the silicon film is completely oxidized, and mask alignment is performed using the oxidized and thickened silicon film as a reference.

As an embodiment of the present invention, a method for manufacturing a bipolar transistor by using silicon dioxide as the protective film and implanting boron ions into a silicon wafer will be described with reference to FIG.

In FIG. 3, an n-type silicon wafer 31 that will serve as a collector is thermally oxidized so that approximately
An oxide film 32 of 400 Å is provided. and wafer 31
Polycrystalline or amorphous silicon 33 is formed to a thickness of about 700 Å on the surface of the oxide film 32 on the main surface by vapor phase growth, vapor deposition, or the like. Here, 33 is polycrystalline silicon. Furthermore, a photoresist 34 is applied to this surface, and an opening 34 corresponding to the base region of a transistor is formed by photoetching.
A is provided, and a photoresist pattern is formed (FIG. 3A). Using this photoresist 34 as a mask, the polycrystalline silicon 33 is etched by, for example, plasma etching using CF ₄ gas. In this case, the film thickness of polycrystalline silicon 33 is
Since it is thin, about 700 Å, the lateral spread due to etching is small, and the conformity with the resist pattern 34 is good. In addition, in plasma etching using CF ₄ gas, the etching rate ratio of polycrystalline silicon 33 and thermal oxide film 32 is more than 10 times, so polycrystalline silicon 33 can be easily etched leaving only the underlying oxide film. (Figure 3B).

If boron ions are then implanted as an impurity to form a base, the photoresist 34 becomes a mask for the ion implantation, and the region that will become the base is
Ions will be implanted through an oxide film of about 400 Å. After the ion implantation, the photoresist 34 is removed, heat treatment is performed at 1000°C for about 20 minutes in a nitrogen atmosphere, and then heat treatment is performed at 1000°C in a steam atmosphere to completely form the polycrystalline silicon 33 in about 15 minutes. The volume expands to form an oxide film 3 with a thickness of approximately 1300 Å.
3', and a step is created at the boundary of the base area. At this time, oxidation also progresses on the surface of the p-type region 35, which becomes the ion-implanted base region, and the thickness of the oxide film 32 reaches approximately 1000 Å, becoming an oxide film 32' (third
Figure C). In this step, polycrystalline silicon 33
If an appropriate amount of impurity such as phosphorus is doped in advance to increase the oxidation rate of polycrystalline silicon, the growth of the oxide film 32' on the base region can be made smaller. Alternatively, if a low-temperature oxidation method such as plasma oxidation is used as the oxidation method, the diffusion of boron implanted into the base region can be further reduced.

Next, a photoresist 36 is further applied to this surface, and apertures 36a and 36b are formed by photoetching to form a high impurity concentration region for taking out an emitter region and a collector electrode (FIG. 3D). When performing mask alignment in this step, the outline of the base region 35 is clear due to the step of the oxide film at the boundary of the base region 35 formed in the previous step.
The aperture for the emitter region can be formed accurately at a predetermined position within the opening. And this photoresist 36
The oxide films 33' and 32 are etched using the mask as a mask (FIG. 3D). At this time, since the polycrystalline silicon has already been oxidized to form an oxide film 33' inside the opening 36b for forming a high impurity concentration region for taking out the collector electrode, hydrofluoric acid and Apertures can be formed using only a mixed solution of ammonium chloride. Next, photoresist 36
and depositing phosphorus silicate glass 37;
If the emitter region 38a and the collector high impurity concentration region 38b for taking out the collector electrode are formed by heat treatment, n-p-n
A bipolar transistor with the structure is obtained (third
Figure E).

As described above, according to the present invention, since the oxide film 32 exists under the polycrystalline silicon 33 in the etching process of the polycrystalline silicon 33 in FIG. It is easy to etch it leaving behind. As a result, an oxide film 32 having a uniform thickness can be left over the entire surface of the wafer in the region to be ion-implanted, so that ion implantation can be performed with good uniformity over the entire surface of the wafer. Furthermore, since the polycrystalline silicon 33 film is thin, the etching process causes little lateral etching, and the pattern formed in the polycrystalline silicon matches well with the ion-implanted region. Furthermore, if this polycrystalline silicon film is oxidized, it will become approximately 1300Å.
silicon dioxide with a thickness of 100 mL and creates a step at the boundary of the ion-implanted region, so the boundary of the ion-implanted region can be clearly recognized when aligning the mask in the subsequent photoetching process. The alignment accuracy is improved. Furthermore, since a film is provided that serves as a reference for positioning in a heat treatment process such as oxidation after ion implantation, the protective film can be left in place. That is, the above-mentioned protective film can also be used as a surface protective film for the ion-implanted region in the heat treatment process, and protects the wafer surface from contamination and the like. As a result, the yield in the semiconductor device manufacturing process is improved.

In addition, since the mask alignment accuracy improves, the margin for mask alignment can be reduced.
Higher density semiconductor devices can be realized. moreover,
By selecting the thickness and impurity concentration of the polycrystalline silicon 33, it is possible to increase the thickness of the oxide film in the field region, thereby reducing the parasitic MOS effect and stray capacitance. The case of a bipolar integrated circuit will be explained using FIG. 4.

In FIG. 4, 41 is a p-type silicon wafer;
42 is an n-type epitaxial layer, which in this case becomes a collector region of an npn-type transistor. 41' is p
43 is an n ⁺ buried layer, 44 is a p-type base region, 45 is an n-type emitter region, 46 is an oxide film, and 47 is a metal film used for wiring. For example, when this transistor is operated with its emitters grounded, the potential is positive with respect to the collector potential and the emitter potential. At this time, a strong electric field is generated in the oxide film 46 in the portion a where the metal connected to the emitter electrode exists above the collector region. This electric field is applied to the metal film 47 with respect to the collector.
becomes negative, so the surface 42a of the collector region is
The potential decreases with respect to other collector regions. When the electric field strength in the oxide film increases, the surface 42a of the collector region is inverted to p-type. Then, a p-type channel is formed between the base region 44 and the isolation region 41', and current flows from the base to the wafer. This phenomenon is called the parasitic MOS effect. According to the present invention, since the oxide film on the collector can be thickened, the electric field intensity generated between the metal film and the collector region is reduced, and parasitic MOS effects can be prevented.

Further, in FIG. 4, the metal film 47 forms unnecessary capacitance on the wafer surface, for example, between the collector region and the isolation region, which becomes an obstacle during high-speed, high-frequency operation. According to the present invention, since the oxide film can be made thicker in the so-called field region, the formation of such unnecessary capacitance can be reduced, which is also useful for improving the high-speed and high-frequency characteristics of semiconductor devices. . Moreover, if the present invention is applied after the epitaxial growth step, the epitaxial growth layer will not be reduced by oxidation.
A thick oxide film can be formed in the field portion.

Furthermore, if a low-temperature oxidation method such as a plasma oxidation method or an anodic oxidation method is used to oxidize the polycrystalline silicon 33, the diffusion of impurities ion-implanted into the base region will be reduced, so that the profile of the impurity concentration can be controlled. becomes easier.

Further, in the present invention, if silicon nitride is used as the protective film and silicon is used as the semiconductor film, and the thickness of the silicon film is set to about 1500 Å, the photoetching process for forming the emitter and collector contact diffusion windows can be performed. During exposure, the distance between the photoresist surface where the emitter diffusion window is formed and the photomask is about 1500 Å or smaller, so there is less light deflection from the pattern edge of the photomask, which improves the dimensional accuracy of the emitter diffusion window. can be made higher. If this silicon is further oxidized later, the film thickness will approximately double.
It becomes 3000 Å silicon dioxide and can prevent parasitic MOS effects. In this oxidation step, since the silicon nitride film exists on the base region, the base region is not oxidized. Therefore, it is possible to prevent boron in the base region from being absorbed into the oxide film, reducing the surface impurity concentration of the base region, and preventing a large change in the impurity concentration profile and an increase in base contact resistance.

As described above, according to the present invention, by performing ion implantation through a thin protective film, it is possible to prevent the surface of the region to be ion implanted from being contaminated.
Furthermore, by providing a film that serves as a reference for alignment, the ion-implanted region can be accurately recognized, which improves mask alignment accuracy. In addition, by providing a membrane that serves as a reference for alignment,
The protective film can be left on the surface of the ion-implanted region. Therefore, when performing heat treatment after ion implantation, the heat treatment can be performed without directly exposing the surface of the ion-implanted region to a heat treatment atmosphere. As described above, the present invention improves the yield in the manufacturing process of semiconductor devices.

On the other hand, improving the mask alignment accuracy means that the mask alignment margin can be reduced, which makes it possible to reduce element dimensions and increase density in semiconductor integrated circuits.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a semiconductor substrate in a conventional ion implantation method, FIGS. 2A and B are process sectional views showing another method of the conventional ion implantation method, and FIGS. FIG. 4 is a cross-sectional view of the bipolar transistor according to the embodiment. 31... Semiconductor substrate, 32, 32', 33'... Oxide film, 33... Polycrystalline silicon, 34... Photoresist serving as a mask for ion implantation, 35... Base region,
36... Photoresist, 38a, 38b... Emitter, collector contact region.

Claims (1)

[Scope of Claims] 1. On the main surface of a semiconductor substrate, a protective film on the surface of the ion-implanted region of the substrate, each of which can be selectively etched, and polycrystalline or amorphous silicon serving as a reference for alignment. a step of laminating a film and a photosensitive resin film that serves as a mask for ion implantation; a step of forming an opening in the photosensitive resin film and the silicon film using the protective film as an etching stopper; The method includes the steps of implanting ions into the semiconductor substrate through a protective film, removing the photosensitive resin, oxidizing the silicon film, and aligning a mask using the oxidized silicon film as a reference. A method for manufacturing a semiconductor device. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the protective film is made of silicon dioxide. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the protective film is made of silicon nitride.