JPS6249654A - Manufacture of solid-state image pickup device - Google Patents

Abstract

PURPOSE:To simplify the manufacturing process of the titled device and to constitute the optimum electrode structural material by a method wherein a flat-surfaced polycrystalline Si film is formed in vertical position on the surface of the diode region on a substrate. CONSTITUTION:A field oxide film 2 is selectively formed on an Si substrate 1, phosphorus is ion-implanted, and a source region 3 and a drain region 4 are formed. Then, after a gate oxide film 5 is formed, a polycrystalline Si film 6 to be used for a gate electrode, with which the region where the signal charge of the region 3 is transferred together with the region 4 and the film 5, is formed. Subsequently, an Si oxide film 7 and a PSG film 9 are formed on the whole surface of the substrate, and the surface is made smooth. Then, an aperture where the region 3 is exposed is formed by performing an etching on the films 7 and 9, and a polycrystalline Si film 8 is formed. Subsequently, a photoconductive film 11, the protective layer 12 of the film 11, a light- transmitting electrode 13 and the metal film 14 to be used for light shielding are formed.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to solid-state imaging devices, particularly those with charge storage and transfer functions. The present invention relates to a method of manufacturing a stacked solid-state imaging device.

Conventional technology Solid-state imaging devices using semiconductors are becoming increasingly dense, high-performance, and multi-functional, and integrate pixel groups with photoelectric conversion and signal storage functions, switching circuits with scanning functions, color filters, etc. There is an increasing demand for the development of stacked solid-state imaging devices. However, when increasing the density of an element, the vertical dimension of the element, in other words, the dimension in the film thickness direction, cannot be made extremely thin due to the breakdown voltage of the insulating film and the specific resistance of the conductor film, etc. (1) Due to advancements in IJ nography technology and processing technology, miniaturization has progressed, and the unevenness on the surface of elements has tended to become steeper. FIG. 4 is a cross-sectional view of an example of a conventional solid-state imaging device with a structure that reduces steep steps. 1 is a p-type silicon circuit board, 2 is a field oxide film, and 3 is an n-type silicon circuit board provided on the circuit board 1. 4 is an n-type drain region, 6 is a gate oxide film,
6 is a polycrystalline silicon film for gate electrode, 7 is a silicon oxide film, 8 is polycrystalline silicon, 9 is a siligate insulating film, 10
1 is a metal electrode, 11 is a photoconductive film, 12 is a photoconductive film protective layer,
13 is a transparent electrode film. With the above structure, the photoconductive film 11
When light is incident on the pixel and electron-hole pairs are generated, the electrons are absorbed by a metal electrode (for example, a molybdenum metal film) 1o separated for each picture element. In order to send this optical information to the n-type source region 3 which serves as a charge storage portion of the silicon substrate 1, a contact hole is provided in the insulating film 7 directly above the source region 3, and the electrode 1o is brought into contact with the source region 3. As a result, the step of the contact hole becomes steep, so polycrystalline silicon 8 is buried above the source region 3 to reduce the step. Next, a molybdenum electrode 1o is brought into contact with the polycrystalline silicon 8,
It serves as one electrode of the photoconductive film.

Problems to be Solved by the Invention However, molybdenum is not optimal as an electrode for absorbing electrons generated in a photoconductive film, and other materials have been found that are superior to molybdenum. In addition, in the conventional structure, after the polycrystalline silicon 8 is embedded, cleaning and etching is performed to clean the surface of the polycrystalline silicon 8 and the portion in contact with the molybdenum electrode. It is necessary to form electrodes. Therefore, there was no time to spare, and it was necessary to complete the process within a certain amount of time. However, if the molybdenum electrode could not be formed within a certain period of time, it was necessary to perform cleaning again. As described above, forming the metal electrode 1o on the polycrystalline silicon 8 required controllability and the process was complicated.

In view of the problems of conventional solid-state imaging devices as described above, the present invention provides a stacked solid-state imaging device in which photoconductive films are stacked.
The purpose of the present invention is to improve the structure of the lower electrode of the photoconductive film and the embedded polycrystalline silicon for electrode connection, thereby improving the photoelectric conversion characteristics, and to provide a method for manufacturing a solid-state imaging device that simplifies the process. It is something.

Means for Solving the Problems The present invention forms a polycrystalline silicon film, which is a conductive film, perpendicularly to a partial surface of a diode region provided on a semiconductor circuit board, and flattens the surface of this polycrystalline silicon film. The polycrystalline silicon film is separated into unit picture elements and used as electrodes, and the buried polycrystalline silicon and the electrodes are integrated to improve photoelectric conversion characteristics.

Effects According to the present invention, the manufacturing process of a solid-state imaging device can be simplified, and an optimal electrode structure material can be constructed.

Embodiment FIG. 1 shows a cross-sectional structure of an embodiment of a solid-state imaging device manufactured by the manufacturing method of the present invention. In the figure, 1 is a semiconductor circuit board made of p-type silicon, 2 is a field oxide film, 3 is a diode region constituting an n-type source region, and 4 is a semiconductor circuit board made of p-type silicon.
is an n-type drain region, 6 is a gate oxide film, 6 is a polycrystalline silicon film for gate electrode, and transfers the signal charge accumulated in the source region 3 between the drain region 4, gate oxide film 6, and gate electrode 6. A signal is transferred from the drain region 4 in a direction perpendicular to the drawing. 7 is a silicon oxide film, 8 is a polycrystalline silicon film for electrode extraction, 9 is a silicate glass (PS(,)) film containing phosphorus, and 10 is a polycrystalline film separated for each pixel and integrated with the 8 polycrystalline silicon film. A silicon electrode, 11 a photoconductive film, 12 a photoconductive film protective layer, 13 a transparent electrode, and 14 a metal film such as molybdenum for light shielding.

In the above configuration, light passing through the transparent electrode 13 is absorbed by the photoconductive film 12 and generates electrons and holes. Holes flow into the transparent electrode and are absorbed, and electrons are accumulated in the source region from the integrated polycrystalline silicon film 1o through the buried polycrystalline silicon film 8, and transferred to the drain region by a clock pulse applied to the gate electrode. What will be done is
This is the same as the conventional example. In the present invention, the polycrystalline silicon film 8 for taking out the electrode and the lower electrode 1o of the photoconductive film are integrated, and psG is formed on the surface of the n-type source region 3, which is a diode region.
It is buried in the opening of the film and flattened, and at the same time, an electrode is also formed. By integrating the electrode 1o and the polycrystalline silicon film for forming the electrodes in this manner, there is no need to consider bonding resistance and barriers, which are disadvantageous when bonding different materials. In addition, dark current characteristics, photoresponse breakdown voltage, etc., which are effects of using a polycrystalline silicon film as the lower electrode of the photoconductive film (Special JIS 9-192865), can be exhibited. Furthermore, the manufacturing process involves forming a polycrystalline silicon film, planarizing it, and etching the crystalline silicon film through a photo process.
It is easier than traditional methods.

FIG. 2 is a diagram showing an embodiment of the manufacturing process of the solid-state imaging device of the present invention. For example, 1 of K and p type as shown in Figure B.
A field oxide film 2 is formed on a silicon substrate 1 of oΩcm using, for example, LOG OS (Local Oxid2Ltio
selectively about 0.
Formed to a thickness of 6 microns. Next, a protective oxide film 2' for ion implantation is formed with an o, ots micron thickness, and phosphorus is ion-implanted into desired positions using a resist mask (not shown), with a high dose in the source region 3 and a low dose in the drain region 4. N and n-type impurity regions are formed using one or more resist mask patterns. Here, the n-type source region 3 becomes a charge storage region, and the n-type drain region 4 transfers charges in the direction perpendicular to the drawing, so that the gate electrode serves as a source or drain, as shown in the figure. The protective oxide film 2' is removed and a gate oxide film 5 is formed with a thickness of about 0.1 ha. As this gate oxide film 6, a plurality of insulating films such as a silicon oxide film and a silicon nitride film may be used. Next, a polycrystalline silicon film 6 is formed as a gate electrode to a thickness of about 0.5 microns, and made into an n-type film by ion implantation or thermal diffusion. selectively by dry etching using a busy resist mask (not shown).
The type polycrystalline film 6 is etched, and then the silicate oxide film 6 is etched by wet etching to expose the source region 3. In this step, a new n-type impurity may be introduced into the exposed source region.Next, as shown in FIG.
is formed to a thickness of about 0.3 microns by vapor phase growth or high temperature oxidation. Subsequently, a psc (silicate glass containing phosphorus) film 9 of 0.8 microns is formed, and psG is flowed in a high temperature atmosphere to smooth out the steep steps on the substrate surface as much as possible. In this case, smoothing can be easily achieved by performing the process in wet oxygen or high pressure oxygen. Next, as shown in Figure d, the PSG film 9 and silicon oxide film 7 are selectively etched using a resist mask (not shown) until the surface of the source region 3 is exposed, forming an opening 15. do. The openings are formed by parallel plate reactive ion etching (RIE). By using such a method, it is possible to make the etched cross section steep as shown in d of the same figure.

This step and the previous step of flowing the PSG film facilitate the filling of the polycrystalline silicon film into the recess, which is the next step. After forming the steep opening in this way, the polycrystalline silicon film 8 is deposited on the source region 3.
Approximately 1 inch thicker or equal to or slightly thicker than the step of the upper opening.
．． Forms 2 microns. This formation is performed using a vapor phase growth method under reduced pressure and normal pressure, or a plasma vapor phase growth method. Next, a resin-based organic material, such as a resist 8', is formed on the substrate surface by spin coating to smooth the surface. Next, when the resist 8' is etched from the surface with oxygen gas using a dry etching method, for example using a parallel plate dry etching device, the resist on the convex parts is thinner and the resist on the concave parts is thinner due to the difference in the shape of the base substrate directly under the resist. The resist becomes thicker, and the resist 8' can be left in a self-aligned manner in the recess above the source region 3, which is the deepest recess on the substrate surface, as shown in the figure. In this case, as shown in the figure, resist 8'
It is desirable that the surface of the polycrystalline silicon film 8 coincides with the surface of the exposed flat region of the polycrystalline silicon film 8. At this time, under conditions such that the etching rate of the resist 8' and the exposed polycrystalline silicon film 8 are the same, for example, a parallel plate reactive ion etching method is used at 200 W and ay2c62 gas at about 20%
If etching is performed under the conditions of jC7M and 60 mTorr, the etching rates will be approximately the same. Under these conditions, the resist 8' and polycrystalline silicon film 8 are etched, and the PSG
θ in the figure shows the etching stopped with about 0.1 micron of polycrystalline silicon film 8 remaining on film 9. The etching of the remaining polycrystalline silicon film 8 of about 0.1 micron on the PSG film 9 is controlled by time, but the etching rate during reactive ion etching is approximately constant if the temperature is controlled.

In the process shown in Figure 2(d), the resist 8' was left only in the recesses of the substrate surface in a self-aligned manner, but this resist 8' was left coated on the entire surface of the substrate without being etched, as shown in Figure 2(e). As explained, the resist 8' and the polycrystalline silicon film 8
If etching is performed from the substrate surface under etching conditions with the same etching rate, the structure shown in the figure e will be obtained.

Next, as shown in FIG. This is the electrode 1o.

The polycrystalline silicon electrode 1° is etched in a mosaic pattern corresponding to each unit picture element.

After etching, the resist 16 is removed, a photoconductive film is formed on the entire surface, a photoconductive film protective layer is formed, and a transparent electrode such as In2O3 or 5n02 is coated with a thickness of 0.1-0. 5 microns is formed, and then a shielding film is placed in a pattern opposite to that of the polycrystalline silicon electrode. The material of the shielding film is preferably a metal film such as Or, Ti, Mo, W or the like. The metal shielding film is used to improve resolution by preventing light leaking through the gaps between the electrodes separated for each unit pixel from being projected onto the silicon substrate and generating electron-hole pairs. Yes, but it doesn't necessarily have to be,
Also, to prevent light from diagonally entering from the side of the shielding film,
As shown in Figure 3, PSGSeO2 or PSGSe
It may also be provided between the O2 silicon oxide films 7.

Incidentally, in the above-mentioned embodiments, the electrode wiring for driving the device is not explained, but the electrode wiring is made of, for example, aluminum before forming the photoconductive film by a well-known method.

Effects of the Invention As described above, according to the present invention, a polycrystalline silicon film containing impurities is formed in a diode region provided on a silicon substrate and in an opening provided in an insulating film substantially perpendicular to the substrate. In addition, by forming a polycrystalline silicon electrode integrated with the polycrystalline silicon film, the manufacturing process can be simplified and an optimal electrode structure material can be constructed.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of an embodiment of a solid-state imaging device manufactured by the manufacturing method of the present invention, and FIG. ,
FIG. 3 is a sectional view of another embodiment of a solid-state imaging device manufactured by the manufacturing method of the present invention, and FIG. 4 is a sectional view of a conventional solid-state imaging device. 1...Silicon substrate, 2...Field oxide film, 3...Source region, 4...
Drain region, 6... Gate oxide film, 6...
...Gate electrode, 7...Silicon oxide film, 8
...Polycrystalline silicon film, 8'...Resist, 9...PSG film, 10...Polycrystalline silicon electrode, 11... Photoconductive film, 12...
... Photoconductive film protective layer, 13 ... Transparent electrode, 14 ... Metal film for light shielding, 16 ...
Opening portion, 16...Resist for polycrystalline silicon film etching pattern. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] A step of selectively forming a diode region by introducing impurities into the surface of a semiconductor circuit board having one conductivity type through an insulating film, and removing the insulating film and forming a gate insulating film and a gate on the semiconductor circuit board. a step of selectively forming an electrode; a step of forming an insulating film to cover the semiconductor circuit board and the gate electrode and smoothing the surface; and a step of forming the diode region from the surface of the smoothed insulating film. A process of forming vertical openings reaching the surface, a process of forming a conductive film in the openings in a self-aligned manner to smooth the surface, and a process of separating the conductive film into unit pixels and forming electrodes. and forming a photoconductive film and a light-transmitting electrode over the conductive film electrode.