JPS6246098B2 - - Google Patents

Info

Publication number
JPS6246098B2
JPS6246098B2 JP7206680A JP7206680A JPS6246098B2 JP S6246098 B2 JPS6246098 B2 JP S6246098B2 JP 7206680 A JP7206680 A JP 7206680A JP 7206680 A JP7206680 A JP 7206680A JP S6246098 B2 JPS6246098 B2 JP S6246098B2
Authority
JP
Japan
Prior art keywords
stereo
signal
circuit
detection
detection circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP7206680A
Other languages
Japanese (ja)
Other versions
JPS56168454A (en
Inventor
Yasuaki Inoe
Kanji Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Denki Co Ltd
Original Assignee
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Denki Co Ltd filed Critical Sanyo Denki Co Ltd
Priority to JP7206680A priority Critical patent/JPS56168454A/en
Publication of JPS56168454A publication Critical patent/JPS56168454A/en
Publication of JPS6246098B2 publication Critical patent/JPS6246098B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H20/00Arrangements for broadcast or for distribution combined with broadcast
    • H04H20/86Arrangements characterised by the broadcast information itself
    • H04H20/88Stereophonic broadcast systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H40/00Arrangements specially adapted for receiving broadcast information
    • H04H40/18Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Stereo-Broadcasting Methods (AREA)

Description

【発明の詳細な説明】 本発明は、AMステレオ受信機の改良に係り、
特にモノラル−ステレオ自動切換時の切換時間の
短縮を計ることを目的とする。
[Detailed Description of the Invention] The present invention relates to an improvement of an AM stereo receiver,
In particular, the purpose is to shorten the switching time when automatically switching from monaural to stereo.

AMステレオ放送においては、帯域が狭い為
に、ID信号(AMステレオ表示信号)を音声帯域
以下の周波数に設定している。前記ID信号は、
ステレオ受信状態を表示するステレオ表示素子を
点燈させる為や、ステレオ差信号(L−R)回路
に挿入されるミユーテイング手段を制御してモノ
ラル−ステレオ自動切換を行う為等に利用される
が、その周波数が非常に低い(例えば米国マグナ
ボツクス社が提案しているAMステレオ放送方式
においては、ID信号は5Hzの周波数である)為
に、前記ID信号を検出する為には、長い時間
(例えば0.5〜1秒)がかかるという欠点を有して
いた。特に、AMステレオ受信を行う迄に長い時
間がかかると、車載用の受信機においては、同調
操作に気をとられて運転が危険となるという欠点
を有し、又オートサーチ選局に際しては、一局当
りの選局時間が長くなり、希望局を選局する迄の
時間が長くなるという欠点を有していた。
In AM stereo broadcasting, the band is narrow, so the ID signal (AM stereo display signal) is set to a frequency below the audio band. The ID signal is
It is used to turn on the stereo display element that displays the stereo reception status, and to control the muting means inserted in the stereo difference signal (LR) circuit to perform automatic monaural-stereo switching. Because the frequency is very low (for example, in the AM stereo broadcasting system proposed by Magnabox, USA, the ID signal has a frequency of 5 Hz), it takes a long time (for example, to detect the ID signal). It had the disadvantage that it took 0.5 to 1 second). In particular, if it takes a long time to receive AM stereo reception, car-mounted receivers have the disadvantage of being distracted by tuning operations, making driving dangerous. This method has the disadvantage that it takes a long time to select a station, and it takes a long time to select a desired station.

本発明は、上述の点に鑑み成されたもので、以
下実施例に基き図面を参照しながら説明する。図
は、前記マグナボツクス社により提案されたAM
ステレオ方式を用いたAMステレオ放送を受信す
るに適したAMステレオ受信機を示すもので、図
において、1はAM受信用のアンテナ、2はラジ
オ周波増幅段、3は局部発振器4を有する周波数
変換段、5は455kHZのAM中間周波信号を増幅
する中間周波増幅段、6はステレオ和信号(L+
R)を復調する為のAM検波回路、7はステレオ
差信号(L−R)及びID信号を復調する為の位
相検波回路、8は前記AM検波回路6の出力信号
を遅延させる遅延回路、9は該遅延回路8からの
ステレオ和信号(L+R)と、前記位相検波回路
7からのステレオ差信号(L−R)とをマトリク
スして左右ステレオ信号L及びRを発生させる為
のマトリクス回路で、アンテナ1に受信された
AMステレオ信号は、ラジオ周波増幅段2で増幅
され、周波数変換段3で局部発振器4からの信号
と混合されて455kHZの中間周波信号に変換さ
れ、中間周波増幅段5で増幅されて、点Aに導出
される。しかして点Aに得られる中間周波信号
は、AM検波回路6でAM検波され、遅延回路8
で遅延されてマトリクス回路9に印加されるとと
もに、位相検波回路7で位相検波され、切換スイ
ツチ10を介してマトリクス回路9に印加され
る。前記遅延回路8からマトリクス回路9に印加
される信号は、ステレオ和信号(L+R)であ
り、前記位相検波回路7からマトリクス回路9に
印加される信号はステレオ差信号(L−R)であ
るから、両信号がマトリクス回路9でマトリクス
されることにより、左信号出力端子11に左ステ
レオ信号Lが、右信号出力端子12に右ステレオ
信号Rがそれぞれ発生する。
The present invention has been made in view of the above points, and will be described below based on embodiments with reference to the drawings. The figure shows the AM proposed by Magnabox Co., Ltd.
This shows an AM stereo receiver suitable for receiving AM stereo broadcasts using a stereo system. In the figure, 1 is an antenna for AM reception, 2 is a radio frequency amplification stage, and 3 is a frequency converter having a local oscillator 4. stage, 5 is an intermediate frequency amplification stage that amplifies the 455kHz AM intermediate frequency signal, and 6 is a stereo sum signal (L+
7 is a phase detection circuit for demodulating the stereo difference signal (L-R) and the ID signal; 8 is a delay circuit for delaying the output signal of the AM detection circuit 6; 9 is a matrix circuit for generating left and right stereo signals L and R by matrixing the stereo sum signal (L+R) from the delay circuit 8 and the stereo difference signal (L-R) from the phase detection circuit 7, received by antenna 1
The AM stereo signal is amplified by the radio frequency amplification stage 2, mixed with the signal from the local oscillator 4 by the frequency conversion stage 3, converted to an intermediate frequency signal of 455kHz, and amplified by the intermediate frequency amplification stage 5, and then amplified at the point A. is derived. The intermediate frequency signal obtained at point A is then subjected to AM detection by the AM detection circuit 6 and delayed by the delay circuit 8.
The signal is delayed and applied to the matrix circuit 9, is phase-detected by the phase detection circuit 7, and is applied to the matrix circuit 9 via the changeover switch 10. The signal applied from the delay circuit 8 to the matrix circuit 9 is a stereo sum signal (L+R), and the signal applied from the phase detection circuit 7 to the matrix circuit 9 is a stereo difference signal (L-R). , both signals are matrixed by the matrix circuit 9, so that a left stereo signal L is generated at the left signal output terminal 11, and a right stereo signal R is generated at the right signal output terminal 12.

本発明は、上述の如きAMステレオ受信機に、
ステレオ差信号検出回路13、ID信号検出回路
14、前記ステレオ差信号検出回路13の出力信
号と前記ID信号検出回路14の論理和をとるオ
ア回路15、及び該オア回路15の出力信号に応
じて前記切換スイツチ10を制御する制御信号を
発生する制御信号発生回路16を設けたことを特
徴とする。
The present invention provides an AM stereo receiver as described above,
a stereo difference signal detection circuit 13 , an ID signal detection circuit 14 , an OR circuit 15 that takes the logical sum of the output signal of the stereo difference signal detection circuit 13 and the ID signal detection circuit 14 , and according to the output signal of the OR circuit 15 The present invention is characterized in that a control signal generation circuit 16 for generating a control signal for controlling the changeover switch 10 is provided.

ID信号は5Hzという低周波である為に、ID信
号検出回路14としてバンドパスフイルタやPLL
(フエーズロツクドループ)等の検出回路を用い
ると長い時間がかかる。それに対し、ステレオ差
信号(L−R)の帯域は、9kHZ迄伸びているの
で、この帯域内の信号検出時間は、ID信号検出
時間に比べてはるかに早い。従つて、ある時刻に
位相検波回路7の出力端にステレオ差信号(L−
R)とID信号とが導出されると、ステレオ差信
号検出回路13から先に出力信号を発生し、オア
回路15を介して制御信号発生回路16に印加さ
れ、該制御信号発生回路16から制御信号が発生
して切換スイツチ10を閉成し、位相検波回路7
の出力信号がマトリクス回路9に印加される。そ
の為、前記切換スイツチ10をID信号検出回路
14の出力信号で閉成する場合に比べ、非常に早
く左右信号出力端子11及び12に左右ステレオ
信号L及びRを得ることが出来る。
Since the ID signal has a low frequency of 5Hz, a bandpass filter or PLL is used as the ID signal detection circuit 14.
Using a detection circuit such as a phase-locked loop (phase-locked loop) takes a long time. On the other hand, since the band of the stereo difference signal (LR) extends to 9kHz, the signal detection time within this band is much faster than the ID signal detection time. Therefore, at a certain time, a stereo difference signal (L-
R) and the ID signal are derived, the stereo difference signal detection circuit 13 first generates an output signal, which is applied to the control signal generation circuit 16 via the OR circuit 15, and the control signal generation circuit 16 generates an output signal. A signal is generated and the changeover switch 10 is closed, and the phase detection circuit 7 is closed.
The output signal of is applied to the matrix circuit 9. Therefore, the left and right stereo signals L and R can be obtained at the left and right signal output terminals 11 and 12 much earlier than when the changeover switch 10 is closed by the output signal of the ID signal detection circuit 14.

ステレオ差信号(L−R)は、ステレオ放送受
信時であつても、L=R時及び無信号時には零と
なる。切換スイツチ10をステレオ差信号(L−
R)の存在の有無のみによつて切換えると、前述
の如くステレオ放送受信時にもかかわらず零とな
るときに、前記切換スイツチ10が開放され、か
つ次のステレオ差信号(L−R)の存在時に再び
前記切換スイツチ10が閉成されるという如く、
前記切換スイツチ10の断続を招き好ましくな
い。その為、本発明においては、ステレオ差信号
(L−R)の検出とともに、ステレオ放送受信時
には常に存在するID信号をも検出し、前記切換
スイツチ10の断続を防止している。すなわち、
受信状態にある放送局が、モノラル放送からステ
レオ放送に切り換わつたり、同調操作によりステ
レオ放送送信局が受信されたりしてステレオ差信
号(L−R)とID信号とが同時に位相検波回路
7の出力端に発生した場合には、ステレオ差信号
検出回路13が直ちに動作してステレオ差信号
(L−R)が検出され、それがオア回路15を介
して制御信号発生回路16に印加されて制御信号
が発生し、該制御信号により切換スイツチ10が
閉成されるので、受信機は直ちにステレオ動作状
態に入る。そして、ステレオ差信号(L−R)が
零となつても、ID信号検出回路14によりID信
号が検出され、オア回路15を介して制御信号発
生回路16に印加されている限り、切換スイツチ
10の閉成状態は維持され、ステレオ差信号(L
−R)の状態により断続を繰り返すということは
ない。
Even when receiving a stereo broadcast, the stereo difference signal (LR) becomes zero when L=R or when there is no signal. The changeover switch 10 is set to the stereo difference signal (L-
If the switch is switched only depending on the presence or absence of the stereo difference signal (R), the changeover switch 10 will be opened when the signal becomes zero even when receiving a stereo broadcast as described above, and the next stereo difference signal (L-R) will be present. At the same time, the changeover switch 10 is closed again.
This is undesirable because it causes the switching of the changeover switch 10 to be interrupted. Therefore, in the present invention, in addition to detecting the stereo difference signal (LR), the ID signal that is always present when receiving stereo broadcasting is also detected to prevent the switching of the changeover switch 10. That is,
When a broadcasting station in the receiving state switches from monaural broadcasting to stereo broadcasting, or when a stereo broadcasting transmitting station is received by a tuning operation, the stereo difference signal (L-R) and ID signal are simultaneously detected by the phase detection circuit. 7, the stereo difference signal detection circuit 13 immediately operates to detect the stereo difference signal (LR), which is applied to the control signal generation circuit 16 via the OR circuit 15. A control signal is generated which closes the selector switch 10, so that the receiver immediately enters the stereo operating state. Even if the stereo difference signal (L-R) becomes zero, as long as the ID signal is detected by the ID signal detection circuit 14 and applied to the control signal generation circuit 16 via the OR circuit 15, the changeover switch 10 The closed state of the stereo difference signal (L
-R) will not cause repeated interruptions.

制御信号発生回路16の出力信号は、AMステ
レオ放送受信を表示するインジケータを駆動する
為にも用いることが出来る。すなわち、図示の如
く、制御信号発生回路16の出力端に、駆動回路
17と表示素子18とから成るインジケータを接
続するだけで、ステレオ放送を受信した時直ちに
点燈し、ステレオ放送を受信し続ける限り点燈状
態を維持するステレオ放送受信を表示するインジ
ケータを簡単に構成出来る。
The output signal of the control signal generation circuit 16 can also be used to drive an indicator that displays AM stereo broadcast reception. That is, as shown in the figure, by simply connecting an indicator consisting of a drive circuit 17 and a display element 18 to the output terminal of the control signal generation circuit 16, the indicator turns on immediately when a stereo broadcast is received, and the indicator continues to receive the stereo broadcast. It is possible to easily configure an indicator that displays stereo broadcast reception that remains lit for as long as possible.

以上述べた如く、本発明に係るAMステレオ受
信機は、ステレオ放送を受信すると直ちにステレ
オ受信状態となる応答特性の良い受信機を提供出
来る優れたものである。
As described above, the AM stereo receiver according to the present invention is excellent in that it can provide a receiver with good response characteristics that immediately enters a stereo reception state upon receiving a stereo broadcast.

【図面の簡単な説明】[Brief explanation of the drawing]

図は本発明に係るAMステレオ受信機の一実施
例を示す回路ブロツク図である。 6……AM検波回路、7……位相検波回路、9
……マトリクス回路、10……切換スイツチ、1
3……差信号検出回路、14……ID信号検出回
路、15……オア回路、16……制御信号発生回
路。
The figure is a circuit block diagram showing an embodiment of an AM stereo receiver according to the present invention. 6...AM detection circuit, 7...Phase detection circuit, 9
... Matrix circuit, 10 ... Selector switch, 1
3...Difference signal detection circuit, 14...ID signal detection circuit, 15...OR circuit, 16...Control signal generation circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 音声帯域以下のAMステレオ表示信号を含む
AMステレオ放送電波を受信するに適したAMス
テレオ受信機において、ステレオ和信号を復調す
る第1復調回路と、ステレオ差信号を復調する第
2復調回路と、前記第1及び第2復調回路の出力
信号をマトリクスして左右ステレオ信号を発生さ
せるマトリクス回路と、前記第2復調回路の出力
信号中に前記ステレオ差信号が存在することを検
出する第1検出回路と、前記AMステレオ表示信
号が存在することを検出する第2検出回路と、前
記第1及び第2検出回路の少くとも一方に検出信
号が存在するとき制御信号を発生する制御信号発
生回路と、該制御信号発生回路からの制御信号に
よつて駆動される前記第2復調回路と前記マトリ
クス回路との間に挿入された切換手段とから成る
ことを特徴とするAMステレオ受信機。
1 Contains AM stereo display signals below the audio band
In an AM stereo receiver suitable for receiving AM stereo broadcast radio waves, a first demodulation circuit demodulates a stereo sum signal, a second demodulation circuit demodulates a stereo difference signal, and outputs of the first and second demodulation circuits. A matrix circuit that matrixes signals to generate left and right stereo signals, a first detection circuit that detects the presence of the stereo difference signal in the output signal of the second demodulation circuit, and the AM stereo display signal. a second detection circuit that detects that a detection signal exists in at least one of the first and second detection circuits; a control signal generation circuit that generates a control signal when a detection signal is present in at least one of the first and second detection circuits; 1. An AM stereo receiver comprising switching means inserted between the second demodulation circuit and the matrix circuit, which are driven by the second demodulation circuit.
JP7206680A 1980-05-28 1980-05-28 Am stereophonic receiver Granted JPS56168454A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7206680A JPS56168454A (en) 1980-05-28 1980-05-28 Am stereophonic receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7206680A JPS56168454A (en) 1980-05-28 1980-05-28 Am stereophonic receiver

Publications (2)

Publication Number Publication Date
JPS56168454A JPS56168454A (en) 1981-12-24
JPS6246098B2 true JPS6246098B2 (en) 1987-09-30

Family

ID=13478645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7206680A Granted JPS56168454A (en) 1980-05-28 1980-05-28 Am stereophonic receiver

Country Status (1)

Country Link
JP (1) JPS56168454A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0271398U (en) * 1988-11-18 1990-05-30
JPH0271397U (en) * 1988-11-17 1990-05-30

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0271397U (en) * 1988-11-17 1990-05-30
JPH0271398U (en) * 1988-11-18 1990-05-30

Also Published As

Publication number Publication date
JPS56168454A (en) 1981-12-24

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