JPS6236371Y2

JPS6236371Y2 -

Info

Publication number: JPS6236371Y2
Application number: JP1980089598U
Authority: JP
Priority date: 1980-06-25
Filing date: 1980-06-25
Publication date: 1987-09-16
Also published as: JPS5711854U

Description

【考案の詳細な説明】本考案は真に同調されたときにのみステレオ受
信とされるようにしたAMステレオ受信機に関す
る。[Detailed Description of the Invention] The present invention relates to an AM stereo receiver that allows stereo reception only when truly tuned.

搬送波をステレオ和信号によつて振幅変調し、
ステレオ差信号とステレオ表示信号とによつて位
相変調して放送するAMステレオ放送がある。斯
るAMステレオ放送の場合、FMステレオ放送と
異なつて帯域が非常に狭く、又マトリツクス方式
のため同調点のずれが分離度を悪くし、又隣接ビ
ートの影響を受け易くなる。 The carrier wave is amplitude modulated by a stereo sum signal,
There is AM stereo broadcasting in which phase modulation is performed using a stereo difference signal and a stereo display signal. In the case of such AM stereo broadcasting, unlike FM stereo broadcasting, the band is very narrow, and since it is a matrix system, shifts in tuning points impair separation, and it is also susceptible to the influence of adjacent beats.

本考案はそこでチユーニング操作を行なつてい
るとき、離調状態ではモノラル受信され、完全に
同調されるとステレオ受信できるようにして上記
欠点を除去したAMステレオ受信機を提供するも
のである。 The present invention provides an AM stereo receiver which eliminates the above-mentioned drawbacks by allowing monaural reception when the receiver is out of tune and stereo reception when the receiver is completely tuned during the tuning operation.

以下本考案を図面に従つて説明する。１はアン
テナ、２はアンテナ１に接続されたチユーナー回
路で、RF回路、混合回路、局部発振回路、IF回
路及び検波回路等を含み、振幅検波されたステレ
オ和信号（Ｌ＋Ｒ）とIF信号の一部とを出力す
る。３は前記出力されたステレオ和信号を遅延さ
せる遅延回路、４は前記IF信号の振幅を制限さ
せるリミツター回路、５は該リミツター回路４に
接続された位相検出回路で、ステレオ差信号（Ｌ
−Ｒ）を生じる。６は前記ステレオ和信号（Ｌ＋
Ｒ）とステレオ差信号（Ｌ−Ｒ）とをマトリツク
スし、左信号Ｌ及び右信号Ｒを形成するマトリツ
クス回路、７，８は本考案の要旨とするところの
一対の差動増幅回路で、極性が逆にされた入力端
子は前記位相検出回路５に接続されている。９，
１０はマトリツクス回路６の制御ラインに夫々並
列接続されたスイツチングトランジスタで、前記
差動増幅回路７，８の出力にて制御される。 The present invention will be explained below with reference to the drawings. 1 is an antenna, and 2 is a tuner circuit connected to the antenna 1, which includes an RF circuit, a mixing circuit, a local oscillation circuit, an IF circuit, a detection circuit, etc., and combines the amplitude-detected stereo sum signal (L+R) and the IF signal. Output the part. 3 is a delay circuit that delays the outputted stereo sum signal; 4 is a limiter circuit that limits the amplitude of the IF signal; 5 is a phase detection circuit connected to the limiter circuit 4;
-R). 6 is the stereo sum signal (L+
R) and the stereo difference signal (L-R) to form a left signal L and a right signal R, 7 and 8 are a pair of differential amplifier circuits, which is the gist of the present invention. The input terminal in which the signals are reversed is connected to the phase detection circuit 5. 9,
Reference numeral 10 denotes switching transistors connected in parallel to the control lines of the matrix circuit 6, respectively, and controlled by the outputs of the differential amplifier circuits 7 and 8.

次に本考案のAMステレオ受信機の動作につい
て説明をする。アンテナ１に受信されたAMステ
レオ信号はチユーナー回路２で増幅、周波数変換
される等した後、一部は振幅検波されステレオ和
信号（Ｌ＋Ｒ）となつて出力され、遅延回路３を
介してマトリツクス回路に加えられる。一方チユ
ーナー回路２よりIF信号の一部が取出され、リ
ミツター回路４で振幅制限された後位相検出回路
５で位相検出され、ステレオ差信号を生じる。こ
のステレオ差信号はマトリツクス回路６に加えら
れ、前記ステレオ和信号（Ｌ−Ｒ）とマトリツク
スされる。ところで位相検出回路５よりはチユー
ニングの進行に応じてＳカーブ信号が発生され
る。即ち同調が完全になされていないときは、正
又は負の信号を生じ、チユーニングが進み同調点
に近づく程この信号は小さくなり、完全に同調さ
れたときは零となる。差動増幅回路７，８の入力
端子には離調時に正又は負のＳカーブ信号が加え
られるので、いずれかの差動増幅回路より出力を
生じ、スイツチングトランジスタ９又はスイツチ
ングトランジスタ１０がオンされる。それによつ
てマトリツクス回路６は動作されず、前記チユー
ナー回路２より検出されたステレオ和信号（Ｌ＋
Ｒ）のみがAF増幅回路１１，１２に加えられ、
スピーカー１３，１４が駆動されモノラル演奏さ
れる。完全に同調されると、位相検出回路５から
差動増幅回路７，８に供給されるＳカーブ信号は
零近くとなるので、差動増幅回路７，８より出力
を生せずスイツチングトランジスタ９，１０はい
ずれもオフされる。従つて今まで不動作させてい
た制御ラインが解除され、マトリツクス回路６は
動作状態にされる。それ故に遅延回路３を介して
加えられたステレオ和信号（Ｌ＋Ｒ）と位相検出
回路５よりのステレオ差信号（Ｌ−Ｒ）とがマト
リツクスされて、左信号Ｌ及び右信号Ｒを生じ
る。前記左信号Ｌ及び右信号Ｒは夫々AF増幅回
路１１，１２で増幅され、左右のスピーカー１
３，１４を駆動しステレオ演奏を行う。尚このと
きステレオ表示信号検出回路１５でステレオ表示
信号が検出され、該ステレオ表示信号にてランプ
回路１６が動作され、ステレオ放送信号を受信中
であることを表示する。 Next, the operation of the AM stereo receiver of the present invention will be explained. After the AM stereo signal received by the antenna 1 is amplified and frequency-converted by the tuner circuit 2, a portion is amplitude-detected and output as a stereo sum signal (L+R), which is sent to the matrix circuit via the delay circuit 3. added to. On the other hand, a part of the IF signal is taken out from the tuner circuit 2, the amplitude is limited by the limiter circuit 4, and the phase is detected by the phase detection circuit 5 to generate a stereo difference signal. This stereo difference signal is applied to a matrix circuit 6 and matrixed with the stereo sum signal (LR). Incidentally, the phase detection circuit 5 generates an S curve signal in accordance with the progress of tuning. That is, when the tuning is not complete, a positive or negative signal is generated, and as the tuning progresses and the tuning point is approached, this signal becomes smaller, and becomes zero when the tuning is completed. Since a positive or negative S curve signal is applied to the input terminals of the differential amplifier circuits 7 and 8 during detuning, an output is generated from either differential amplifier circuit and the switching transistor 9 or the switching transistor 10 is turned on. be done. As a result, the matrix circuit 6 is not operated, and the stereo sum signal (L+
R) is added to the AF amplifier circuits 11 and 12,
The speakers 13 and 14 are driven to produce a monaural performance. When the phase detection circuit 5 is completely tuned, the S curve signal supplied from the phase detection circuit 5 to the differential amplifier circuits 7 and 8 becomes close to zero, so the differential amplifier circuits 7 and 8 do not produce any output and the switching transistor 9 , 10 are all turned off. Therefore, the control line which has been inactive until now is released, and the matrix circuit 6 is brought into operation. Therefore, the stereo sum signal (L+R) applied via the delay circuit 3 and the stereo difference signal (L-R) from the phase detection circuit 5 are matrixed to produce a left signal L and a right signal R. The left signal L and right signal R are amplified by AF amplification circuits 11 and 12, respectively, and then sent to the left and right speakers 1.
3 and 14 to perform stereo performance. At this time, a stereo display signal is detected by the stereo display signal detection circuit 15, and the lamp circuit 16 is operated by the stereo display signal to indicate that a stereo broadcast signal is being received.

本考案のAMステレオ受信機は上述した如く、
位相検出回路より検出されるＳカーブ信号を入力
端子の極性を逆にした一対の差動増幅回路に加
え、その出力で夫々並列接続されたスイツチ素子
をオンさせ、同調がされるまでの間マトリツクス
回路を不動作させるようにしたので、同調される
までの間に隣接チヤンネルのビートに影響されて
雑音を発生させる等の欠点があつたのが除去され
る。 As mentioned above, the AM stereo receiver of the present invention has the following features:
The S-curve signal detected by the phase detection circuit is applied to a pair of differential amplifier circuits whose input terminals have opposite polarities, and their outputs turn on switch elements connected in parallel, and the matrix is used until tuning is achieved. Since the circuit is made inoperative, the drawbacks such as generation of noise due to the influence of beats of adjacent channels before tuning is eliminated.

[Brief explanation of the drawing]

図は本考案のAMステレオ受信機のブロツク図
である。２……チユーナー回路、５……位相検出回路、
６……マトリツクス回路、７，８……差動増幅回
路、９，１０……スイツチングトランジスタ。 The figure is a block diagram of the AM stereo receiver of the present invention. 2... tuner circuit, 5... phase detection circuit,
6... Matrix circuit, 7, 8... Differential amplifier circuit, 9, 10... Switching transistor.

Claims

[Scope of utility model registration request]

In an AM stereo receiver that receives an AM stereo signal that is amplitude modulated by a stereo sum signal and phase modulated by a stereo difference signal and a stereo display signal, the received AM stereo signal is amplified, frequency converted, and amplitude detected. A tuner circuit that outputs a stereo sum signal, a phase detection circuit that detects the phase of an IF signal extracted from the tuner circuit and a phase detection of a stereo difference signal, and a stereo sum signal of the tuner circuit and a stereo difference signal of the phase detection circuit. a matrix circuit that forms a left signal L and a right signal R by matrixing the signals, a pair of differential amplifier circuits to which the S-curve signals detected by the phase detection circuit are applied to input terminals of opposite polarity, and a collector-emitter. A switching transistor is provided which is connected in parallel between the matrix circuit and the ground, and whose bases are respectively connected to the output side of the differential amplifier circuit. An output is generated from one of the dynamic amplification circuits, one of the switching transistors connected in parallel is controlled by the output, the matrix circuit is made inactive, and only the stereo sum signal is output from the matrix circuit. An AM stereo receiver characterized in that the switching transistor of the receiver is not controlled, a matrix circuit is operated, and a left signal L and a right signal R are outputted from the matrix circuit.