JPS6244432B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to elements such as diodes used in reverse bias operation, and is suitable for use as a semiconductor device consisting of a pn junction having a so-called guard ring effect, particularly as a photodetector for optical communication. It is used as a low-noise and highly reliable photodiode (hereinafter referred to as PD) or avalanche photodiode (hereinafter referred to as APD).

As a photodetector with high speed and high sensitivity characteristics
It is well known that PDs or APDs are extremely important, and their development is actively progressing as photo receivers for optical communications, along with semiconductor lasers as light sources. It is well known that the practical application of semiconductor lasers is currently progressing rapidly, and that semiconductor lasers with an oscillation wavelength of 0.8 μm to 1.5 μm, such as GaAs-AlGaAs or InGaAsP-InP semiconductor lasers, are the mainstream. ing. the current
Main wavelength range of GaAs-AlGaAs laser oscillation from 0.8 to
PDs or APDs using Si crystals are the most widely used photodetectors for 0.87 μm and exhibit excellent characteristics, but in order to effectively absorb light, a depletion layer of several tens of μm is required and the carrier It is difficult to obtain a high-speed response of 1 GHz or higher due to the long running time. In addition, optical fiber, which is a transmission system for optical communication, has a low transmission loss of 1.1 μm to 1.5 μm.
In this wavelength range, the sensitivity of photodetectors using Si crystals decreases, making them unusable. Also 1.1μm
Although Ge-APDs are available for use with the above wavelengths, they are not optimal detectors for optical communications due to their large dark current and excessive noise, and APDs made of compound semiconductor materials are required. However, the development of surface stabilization technology for compound semiconductor materials is extremely underdeveloped, and the current situation is that they cannot withstand the high reverse bias voltage required to perform avalanche operation. It is the key to success or failure. When a reverse bias voltage is applied near the breakdown of a pn junction without surface stabilization in order to obtain avalanche multiplication, a so-called soft breakdown occurs and dark current increases. Further, due to changes in the surface condition over time, reliability is poor, making it extremely unsatisfactory as a photodetector for systems such as optical communications that require high reliability.

The purpose of the present invention is to improve the structure of APDs, etc. that are required to operate under high reverse bias voltage, to improve reverse characteristics, especially breakdown characteristics, and to create semiconductors with excellent reliability under operating conditions. equipment. That is, the semiconductor device of the present invention has a first
on the first semiconductor layer having a convex region, the impurity concentration is lower than that of the first semiconductor layer, the forbidden band width is larger, and the conductivity type is the same as that of the first semiconductor layer. The second semiconductor layer is provided such that the convex region of the first semiconductor layer is buried in the second semiconductor layer, and further has a second conductivity type from the surface of the second semiconductor layer to the inside of the convex region. It has a structure with an area indicating the area.

The present invention will be explained below based on one embodiment.

The figure is a cross-sectional view of an APD employing the structure of the present invention. In this example, a GaAs-AlGaAs-based material is used, and first, an n ⁺
An n ⁺ type Al _0.2 Ga _0.8 As layer ₁₂ having a thickness of several μm to several tens of μm is formed on the GaAs _substrate 11 by an epitaxial growth method (for example, liquid phase epitaxial method). Next, the film thickness is 5 μm, and the impurity concentration is 5×10 ¹⁵ cm ^-3
After epitaxially growing the n-type GaAs layer 13, the n-type GaAs layer 1 is grown using photoresist technology.
A circular pattern is formed on the surface of 3, and the periphery of the circular pattern is, for example, H ₃ PO ₄ :H ₂ O ₂ :CH ₃ OH=10:
Etching is performed for about 3.5 minutes using a mixed solution with a composition ratio of 10:50, and about 4 μm of the GaAs layer 13 is removed to form a plateau-like GaAs epitaxial layer 13'. Next, epitaxial growth technology is used again to form an n-type
An Al _0.2 Ga _0.8 As layer ₁₄ is formed _. in this case
It is a well-known fact that the surface of the Al _{0.2 Ga 0.8} As layer ₁₄ easily becomes substantially flat as shown in the figure. In the embodiment, the n-type layer on the plateau-like GaAs layer 13'
The thickness of the Al _{0.2 Ga 0.8} As layer 14a was set to 1 μm _, and the impurity concentration was set to 5×10 ¹⁴ cm ⁻³ .

Next, a Si ₃ N ₄ film or SiO ₂ film is deposited on the surface of the wafer prepared as described above using a vapor phase growth method or a sputtering method.
After forming the film, the thin film 15 of Si ₃ N ₄ or SiO ₂ is selectively formed so as to be wider than the surface area of the plateau-like GaAs layer 13' and centered on the surface area using photoresist, alignment technology, etc. Remove in a circle. next
GaAs with 5 μg or more of Zn thin film placed on the GaAs surface:
A Zn pseudo-binary diffusion source is placed together with the wafer in an evacuated closed tube, heat treatment is applied at 566° C., and Zn is selectively diffused to obtain a Zn diffusion region 16. If the heat treatment is carried out for 2 hours, the Zn diffusion front will be 0.2 μm deep in the plateau-like GaAs epitaxial layer 13'.
Here, a pn junction 17a is obtained. on the other hand
In the Al ₀ . ₂ Ga ₀ . ₈ As layer 14, the speed of Zn diffusion is faster than that in GaAs, so a pn junction 17b is formed at a depth of 1.8 μm from the surface, so the Zn diffusion front forms a plateau-like GaAs epitaxial layer as shown in the figure. It becomes shallower in the layers. Also, at this time, Zn at the Zn diffusion front
In AlGaAs, the solubility of Zn decreases as the Al composition increases, so the concentration is approximately 2×10 ¹⁸ cm ^-3 near the pn junction 17a in the _plateau -like GaAs epitaxial layer 13', whereas it is Al _0.2 Ga _{0.8 As} . Approximately 7×10 ¹⁷ in layer 14b
cm ^-3 . Next, a thin film 15' such as a Si ₃ N ₄ film or SiO ₂ film is formed again to cover the thin film 15 such as the Si ₃ N ₄ film or SiO ₂ film, and the electrode extraction window is
Form smaller than the window. Furthermore, as shown in FIG. 1, a p-type electrode 18 is formed using a photoresist technique or the like so that it does not extend outside the p-n junction surface.
Next, after depositing the metal 19 for the n-type electrode, the metal in the region located below the plateau-like GaAs 13' is removed by photoresist, alignment technology, etc., and then, for example, the capacitance ratio H ₂ SO ₄ :H ₂ O ₂ The substrate 11 is removed using a solution of :H ₂ O=3:1:1 or a solution of H ₃ PO ₄ :H ₂ O ₂ :CH ₃ OH=10:10:50. By cutting the wafer produced as described above into pellets, a semiconductor device having the structure according to the present invention shown in the figure can be obtained.

In order to reduce avalanche multiplication noise, it is necessary to set the conductivity type of the light absorption region so that the carrier with a higher ionization rate becomes a decimal carrier.
Since it is known that the ionization rate of holes on the GaAs (100) plane is higher than that of electrons, the conductivity type of the GaAs layer 13' serving as the light absorption region was set to be n type. Furthermore, when carriers are generated due to optical excitation in the avalanche region (high electric field region), the generated electrons and holes contribute to multiplication and it is not possible to reduce the noise, so light is input from the substrate side so that the light is absorbed in the low electric field region. The GaAs substrate 11 located under the convex portion of the GaAs layer 13' layer is made of the same material (has the same forbidden band width) as the semiconductor layer 13' which becomes the light absorption region, so absorption in this region is excluded. removed for. moreover
The concentration and thickness of the GaAs layer 13' were determined so that the depletion layer would sufficiently expand before breakdown and absorb light effectively.

Next, the excellent characteristics of the device according to the example shown in the figure and the reason for the improved characteristics will be explained. As mentioned ^above _, the thickness ^{of the Al} ₀ . ₂ Ga ₀ . There is a pn junction at a depth of 0.2 μm from the plateau-like GaAs surface, and the plateau-like surface diameter
The dark current of a semiconductor device with a surface diameter of 200μφ and a surface diameter of Zn diffusion part 17 of 250μφ is extremely small, less than a few tens of pA, and the breakdown characteristic is also extremely steep, the breakdown voltage is approximately 100V, and the avalanche multiplication factor is
It showed an extremely high value of more than 10 ³ times. These excellent properties can be understood for the following reasons. In other words, the breakdown voltage of the pn junction 17a formed in the plateau-like GaAs layer 13' is always
Since it is lower than that of the pn junction 17b made in the Al _0.2 Ga _0.8 As layer _{14 ,} breakdown occurs only in the pn junction 17a made in the crystal. because
The forbidden band width of _{the Al 0.2 Ga 0.8} As layer ₁₄ is larger than that of _the GaAs layer _{13 ;}
This is because the impurity concentration in the GaAs layer 13 is lower than that in the GaAs layer 13, and the Zn concentration near the pn junction 17b is lower than that near the pn junction 17a in the GaAs layer 13'. Therefore, p-n junction 17
Even if a high voltage is applied to a, no breakdown occurs in the pn junction 17b, and the pn junction exposed on the crystal surface in the Al _0.2 Ga _0.8 As layer ₁₄ also reaches the breakdown voltage of the pn junction 17a _. It is stable. That is, the pn formed in _the Al _0.2 Ga _0.8 As layer ₁₄
The joint 17b has an extremely good so-called guard ring structure. It is clear from the above description of the manufacturing method that the advantage of the present invention is that it is extremely simple in terms of manufacturing technology. In other words, GaAs becomes an avalanche region through a single diffusion process.
It has the advantage of simultaneously obtaining a pn junction in _{the layer 13' and a pn junction in the Al 0.2 Ga 0.8} As layer that functions as _a guard ring, improving device reliability and reducing manufacturing costs due to process simplification. A reduction is made.

In this embodiment, the structure is such that the light enters from the GaAs substrate 11 side, but from the opposite side, i.e.
It is also possible to adopt a structure in which light enters from the Zn diffusion region 16 side. In this case, the p-type electrode 18 shown in the above embodiment is coated with a plateau shape using photoresist technology.
A hole having a diameter less than the diameter of the top of the GaAs 13' is provided to serve as an entrance window. In such a structure, the step of partially removing the GaAs substrate 11 and the step of providing an opening in the n-type electrode 19 can be omitted, simplifying the process and reducing manufacturing costs.

The embodiments of the semiconductor device made of GaAs-AlGaAs have been described above, but the present invention also applies to other semiconductor materials such as InGaAsP-InP, InGaAs-InP,
It is clear that this method has a guard ring effect on all semiconductor devices that use materials such as InGaAs-GaAs and operate under reverse bias, and it goes without saying that this method can also be applied to other compound semiconductor crystals.

[Brief explanation of the drawing]

The figure is a schematic cross-sectional view showing one embodiment of the present invention.
11 is a GaAs substrate having an n ⁺ type (100) plane; 12
is n ⁺ type Al _{0.2 Ga 0.8 As} layer, 13 and 13' are _n type
GaAs _layer , _{14 is n-type Al 0.2 Ga 0.8} As layer, 15 and 1
5' is a thin film such as SiO ₂ film or Si ₃ N ₄ film, and 16 is a thin film such as SiO 2 film or Si 3 N 4 film.
Zn diffusion layer, 17, 17a and 17b are pn junction surfaces,
18 is a p-type electrode, 19 is an n-type electrode, and 20 is an etched surface of the substrate.

Claims (1)

[Claims] 1 exhibiting a first conductivity type and having a convex region
and a semiconductor layer provided on the surface of the first semiconductor layer on the side where the convex region is present so as to encompass the convex region, and having an impurity concentration lower than the impurity concentration of the first semiconductor layer. and further has a forbidden band width larger than that of the first semiconductor layer and the first semiconductor layer.
a second semiconductor layer having the same conductivity type as the semiconductor layer; and a second semiconductor layer having a larger area than the convex region;
and a region exhibiting a second conductivity type extending from the surface of the semiconductor layer to the inside of the convex region.