JPS6243938A - Line diagnosing device - Google Patents

Abstract

PURPOSE:To generate an abnormal state and an abnormal sequence on a protocol simply by providing the synchronizing inspection circuit of a transmission data and a reception data flowing to an interface, a frame data processing circuit and a sending circuit of the sending data or the reception data. CONSTITUTION:When a sending data is inputted from a DTE and a synchronizing inspection circuit 6 takes frame synchronization, the result is subjected to CRC check by a CRC checker 9, then the data is transferred to a processing circuit 7 and stored in a memory 10. Then the data stored in the memory 10 is sent to a DCE via a transmission circuit 8 normally. In conducting the protocol test, etc., a processor 11 applies the data deletion, insertion and change to send the result from the transmission circuit 8 to the DCE or the data is not sent to the DCE. The processing along with the test condition above is applied and the system is used for the test of various protocols as a line diagnosing device. Further, as to a reception data from the DCE, the device functions similarly.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a line diagnostic device used for protocol testing, communication fault testing, etc. in data communication equipment.

(Prior art) Conventionally, "
A signal that is located between a modem and a communication control device or a modem and a data terminal device in a communication system that communicates using an independent synchronization method based on the ``interface between a modem and a communication control device and a data terminal device,'' and that flows through that interface. [See Figure 3 (a) and (b)] The line diagnostic equipment is connected to each device at the communication control equipment or data terminal equipment (hereinafter referred to as DTE) and modem (hereinafter referred to as DEC).
If any disturbance is caused to the signal flowing through the interface between the CRT and the CRT, it monitors the signal and displays it on the screen of a cathode ray tube (hereinafter referred to as CRT) or captures it into memory.

Figure 4 shows the configuration of a conventional line diagnostic device.
Each frame is received by a framing circuit 2 for synchronizing the transmitted data and received data taken in from the interface unit 1 inserted between the TE and the DCE, and is stored in the data capture memory 3. This frame data is transferred to a CRT with built-in video RAM.
By transmitting the signals on the line to the control circuit 4 and displaying them on the screen of the CRT 5, the contents can be monitored or used for protocol tests, etc. This operation is simply shown in the diagram. It will look like Figure 5.

(Problem to be Solved by the Invention) However, when performing a protocol test by connecting data communication devices face-to-face, the test can be easily performed by generating a normal protocol sequence, but an abnormal protocol sequence There was a problem in that it was not possible to conduct a test with this occurring.

The present invention has been made to solve such problems, and an object of the present invention is to provide a line diagnostic device that can easily generate abnormal states and abnormal sequences in the protocol.

(Means for Solving the Problem) The present invention includes a synchronization verification circuit for transmission data and reception data flowing through an interface, a frame data processing circuit, and a transmission circuit for transmission data or reception data.

(Function) Transmit data from the DTE and receive data from the DCE are passed through a synchronization verification circuit to detect frames, store the data in memory, and delete or delete the data.
It is possible to perform processing such as insertion, modification, deletion of frames, new additions, partial modifications, unprocessed relaying, etc., and send them to the DCE as transmission data and to the DTE as reception data. By transmitting data to the DCE after deleting the entire frame, partially changing the frame, or delaying the received data by a certain period of time, or by transmitting the received data that has undergone similar processing to the DTE, it is possible to improve the protocol sequence. Abnormal conditions can easily occur.

(Embodiment) FIG. 1 shows the configuration of an embodiment of the present invention.
A synchronization verification circuit 6 and a processing circuit 7 are included in the processing system for the transmission data signal from E and the processing system for the reception data signal from DCE.
A transmission circuit 8 is inserted, and the transmission data signal or the reception data signal can be processed.

In this embodiment configured in this way, when transmission data is input from the DTE and frame synchronization is established in the synchronization verification circuit 6, the CRC check is performed by the CRC checker 9, and then
The data is transferred to the processing circuit 7 and stored in the memory 10. The data stored in the memory 10 is normally sent to the DCE via the transmitting circuit 8, but when performing a protocol test or the like, the data is deleted, inserted, changed, etc. by the processor 11 and sent from the transmitting circuit 8 to the DCE. It performs processing in accordance with test conditions, such as sending data to the DCE or not sending data to the DCE, and can be used as a line diagnostic device for various protocol tests.

Note that the same function applies to data received from the DCE.

Further, the present invention can be applied not only to frame synchronization but also to a system using character synchronization code SYN.

(Effect of the invention) As explained above, according to the present invention, DTE and DCE
This has the advantage that it is possible to perform frame-level processing on signals flowing through the interface between the frame and the frame, delete frames, change data within the frame, etc.

[Brief explanation of the drawing]

FIG. 1 is a schematic block diagram of an embodiment of the present invention, FIG. 2 is a signal processing system diagram in the present invention, and FIG. 3(a) is a DTE
Figure 3 (b) is a diagram showing the connection system between DT and DCE.
A system diagram when a line diagnostic device is connected between E and DCE, Figure 4 is a schematic block diagram of a conventional line diagnostic device, and Figure 5 is a schematic block diagram of a conventional line diagnostic device.
The figure is a signal processing system diagram in a conventional line diagnostic device. 6...Time 1 (I) verification circuit, 7...processing circuit, 8...
Transmission circuit. Figure 2

Claims (1)

[Claims] Transmission signal element timing in a line diagnostic device that is located between a modem and a communication control device or a modem and a data terminal device in a communication system that communicates using an independent synchronization method, and connects each device with a signal flowing through the interface. synchronization verification means for receiving the frame while synchronizing with the data transmitted from the data terminal device by using the data terminal device, or receiving the frame while synchronizing with the data received from the modem by using the received signal element timing; a processing means for storing data etc. in a memory and performing processing such as deletion, insertion, modification, etc. on the data etc. stored in the memory; 1. A line diagnostic device comprising: sending means for sending the data or time fill in the memory to the data terminal device as received data according to received signal element timing.