JPS624359A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To reduce effect owing to the narrow channel effect and to provide a high-quality image without black lines while attaining better transfer, by increasing sequentially the channel width of horizontal register steps along the charge injecting direction, in the direction far away from the vertical register. CONSTITUTION:The odd number rows of vertical CCD registers 42 and the even number rows of vertical registers 43 of the image pickup region are connected to a two-line horizontal CCD register consisting of a first step of a horizontal CCD register 44, a horizontal shift gate electrode 5 and a second step of a horizontal CCD register 45. In the image pickup region, the registers 42, 43 has a forked structure, each having pixels attached, as shown in the rectangles. As a unit R-G-B-G, arrays are repeatedly formed. Following the vertical final transfer electrode 3, switching transfer electrodes 17, 18 are provided. In the horizontal register region, as compared with the channel width d1 of the horizontal transfer storage electrode 4 of the first step of the horizontal CCD register, the channel width d2 of the second step of horizontal transfer storage electrodes 6-1, 6-2 is enlarged more, preventing the bad transfer owing to the narrow channel effect.

Description

[Detailed description of the invention] [Technical field of invention] The present invention relates to a solid-state imaging device ζ2.

[Technical background of the invention and its problems]

For example, in COD solid-state imaging devices with high resolution or colorization, horizontal C
It is effective to make the OD register 2-wire or 3-wire.

FIG. 4 shows an example of the configuration of a COD solid-state imaging device having a two-line horizontal register 41. As shown in FIG. The signal charges transferred from the vertical registers 42 and 43 in the odd and even columns are transferred to the first and second horizontal registers 744 and 45, respectively, and then read out as signals. Here, the signal charges transferred to the second horizontal register 45 are once accumulated in the first horizontal register 44 and then transferred by the horizontal shift gate 46. However, this transfer tends to become incomplete transfer mode (1) due to the narrow channel effect caused by changes in the width of the channel that is the transfer path. deteriorates.

[Purpose of the invention]

The present invention addresses the above-mentioned problem and provides a solid-state imaging device that can perform transfer at the horizontal shift gate portion 46 favorably and suppress the occurrence of the black line described above.

[Summary of the invention]

The gist of the present invention is to gradually increase the channel width of the horizontal register along the charge injection direction in the direction away from the vertical register.

〔Effect of the invention〕

According to the present invention, the influence of the narrow channel effect is reduced, and a high-quality screen without black lines can be obtained with good transfer.

[Embodiments of the invention]

FIG. 1 is a plan view of a semiconductor substrate of an embodiment of a straight color solid-state imaging device, and FIG. 2(b) is a cross-sectional view thereof.

More specifically, the vertical COD registers 42 . of odd columns in the imaging area. The vertical COD registers 43 in even-numbered columns are the horizontal COD registers I in 1 stage of WIJ, and the horizontal shift gate electrodes 5.
A two-line horizontal C consisting of a second stage horizontal CCD register 45
Connected to OD register. In the imaging area, the vertical COD registers 42 and 43 have a bifurcated configuration, each of which has a pixel indicated by a vertical COD register (;1). An array is formed with the vertical final transfer electrode 3. (pV) of the vertical CCD register on the pixel, followed by switching transfer electrodes 17 (OGI), 18 (OG2).In the ON period of the lot, the red color [几〕pixel.

The signal of the blue pixel (CB) passes through, and the signal of the green (CG) pixel passes during the ON period of DaG.

Therefore, beyond that, two channels are combined into one, and the horizontal transfer storage electrode 4 (two channels) is formed by separating the first layer poly.

A portion of the horizontal register basically has a two-layer transfer electrode configuration. , in the first stage horizontal CCD register, the extended portion of the horizontal transfer storage electrode 4, the horizontal transfer storage electrode 7-1.7-2.7-3 (1"t), is the first layer poly S
t, horizontal inversion layer barrier electrode 8-1.8-3 (, mH
981 is formed from the third layer. Then, a horizontal shift gate 46 is formed on the lower side. Here, a channel stopper 10 with a higher concentration than the substrate is selectively formed by diffusion (or ion implantation), and a or B that passes through the extension part of the storage electrode 4 of the first horizontal register from the window part.
The signal is transferred to the second stage horizontal shift gate. This transfer is performed by the horizontal shift gate electrode 5 (
HG) is ON. Therefore, when this is OFF, the G signal is stopped by the first stage register.几、B signal is filtered (taking into account that it is a signal with a lower level than the second stage, d, - is large) is placed in the second stage. C
: Horizontal transfer storage electrode 6-1.6-2 (OH*) made of the corresponding first layer poly 8+, the horizontal transfer barrier electrode 8-1.8-2, horizontal transfer storage electrode 8
i? -1, 7-2, 7-3.
4 As mentioned above, compared to the channel width d of the horizontal transfer storage electrode 4 of the first stage horizontal CCD register, the channel width d of the horizontal transfer storage electrode 6-1, 6-2 of the second stage is
, is widened, transfer failures due to narrow channel effects are prevented, and high image quality is achieved. Figure 2 shows people - ゛A', B
-B' cross section is shown. Also, since the structure is the same as that of Muni, C
-σ cross section is omitted.

FIG. 3 is a timing diagram of each electrode. The figure shows the injection of the JB times signal and the G signal into the horizontal register, and the subsequent horizontal transfer period.

That is, in this example, the pixels are read out one stage at a time from the bottom of the pixel array f through the horizontal register.

Note that the channel width of the storage electrode for injection may be increased for each stage of the horizontal register, but as shown in FIG. It is convenient for efficiency to make the areas equal.

Although the above example shows a two-stage configuration, a three-stage configuration is also effective.

[Brief explanation of drawings]

FIG. 1 is a plan view of an embodiment of the present invention, FIG. 2 is a sectional view thereof, and FIG. 3 is a timing diagram. Figures J&4 are plan views of the conventional example. In fig. l... Vertical CCD channel 2... Field part (S; 0□) 3... Vertical final transfer electrode (second layer board! J81) 4...
・Horizontal transfer Straehle electrode (first layer poly old) 5...Horizontal shift gate electrode (first layer poly 8+) 6-1.6-
2...Horizontal transfer storage 1! Bridge (first layer poly 8+)
? -1.7-2.7-3...Horizontal transfer storage electrode (first layer polySt) 8-1.8-2...Horizontal transfer barrier electrode j (third layer PO98+) 9-1. 9-2...Horizontal transfer barrier electrode (
3rd layer bo! J 81) 10... Channel stopper layer 11... Silicon oxide film 12... Protection, 1i film 13... P-type silicon substrate 14.16... Storage channel layer 15... Barrier channel layer 17 ...Switching transfer electrode (second layer board 98i) 18
...Switching Transfer Electrode (3rd Layer Po98i) Patent Attorneys Kensuke Norichika and Kikuo Dotakehana Figure 1 - Figure 2 Figure 3

Claims (1)

[Claims] A solid-state imaging device equipped with a double-line horizontal register, characterized in that the width of a transfer channel of a charge injection part is gradually increased in the direction of signal charge transfer from a vertical register between the horizontal registers.