JPH0419752B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state imaging device using a charge transfer device.

Solid-state imaging devices are characterized by their small size, light weight, low power consumption, and high reliability, and because they do not have to worry about burn-in unlike image pickup tubes, they have been researched and developed in a wide range of fields in recent years.

FIG. 1 is a schematic diagram of the so-called interline transfer type solid-state imaging device described above, and includes a vertical shift register group 10 consisting of a plurality of rows of charge transfer devices, and a vertical shift register group 10 arranged adjacent to one side of each vertical shift register. The horizontal shift register 12 is electrically coupled to one end of each vertical shift register, and a charge detection section 13 is provided at one end of the horizontal shift register 12.

Figure 2 shows the vertical position of the solid-state imaging device shown in Figure 1.
It is an enlarged view of the coupling area 14 between the CCD register group 10 and the horizontal CCD register 12, and the channel area 20 of the vertical CCD register 10 is connected to the vertical charge transfer electrodes 21, 22 and horizontally from the vertical CCD register 10.
It is covered with a vertical transfer gate electrode 23 that controls the transfer of signal charges to the CCD register 12. Further, the channel area 24 of the horizontal CCD register 12 has horizontal charge transfer electrodes 25, 26, 27, 2.
It is covered by 8.29. These electrodes are made of two layers of polysilicon. Horizontal charge transfer electrodes 22, 25, 2 indicated by dashed lines in the figure
7 and 29 are the first layer of polysilicon, and the horizontal charge transfer electrodes 21, 23, 26, and 28 shown by broken lines are formed of the second layer of polysilicon. horizontal
The CCD register is a two-phase drive embedded CCD. The horizontal charge transfer electrodes in the storage region are formed from the first layer of polysilicon, and the horizontal charge transfer electrodes in the barrier region are formed from the second layer of polysilicon. The same clock pulse is applied to horizontal charge transfer electrodes 26, 27, 28 and 29, respectively.
Further, in the figure, the vertical CCD register 10 and the horizontal CCD register 12 are electrically coupled by covering the end region 30 of the channel region 20 with a part of the horizontal charge transfer electrode 27.

FIG. 3 schematically shows a cross section of the bonding region shown in FIG. 2 along the line -'. The above-mentioned vertical charge transfer electrodes 21 and 22, vertical transfer gate electrode 23, and horizontal charge transfer electrode 27 are formed on the main surface of the semiconductor substrate 31 with an insulating layer 32 in between. Further, a buried channel layer 33 having a conductivity type opposite to that of the substrate semiconductor is formed under each of the above electrodes, and a channel stop layer doped with an impurity of a conductivity type opposite to that of the buried channel layer 33 is formed outside the channel region. A region 34 is formed. Further, the main surface of the semiconductor is shielded from light by, for example, a metal layer 35. In the figure, area 36 is vertical.
A region 30 of FIG. 2 is shown electrically coupling the vertical CCD register and the horizontal CCD register covered by the horizontal charge transfer electrode 27 in a part of the channel region 20 of the CCD register, and the region 37 is a horizontal shift register. shows the channel area.

In the operation of the solid-state imaging device having such a structure, as shown in FIG. 1, signal charges accumulated in the photoelectric conversion element group 11 according to the amount of incident light are transferred to the vertical shift register group 10 corresponding to each frame period or field period of the video signal. After being read out, the signals are sequentially transferred downward in parallel within the vertical shift register group 10 every horizontal scanning period (1H) of the video signal.
The signal charge transferred to the end of the vertical shift register group 10 is transferred horizontally every horizontal scanning period (1H) when the vertical transfer gate electrode 23 is turned on.
Injected into CCD register 12 in parallel. horizontal
The signal charges sent to the CCD register 12 are sequentially transferred in the horizontal direction while the signal charges are transferred from the vertical CCD register group 10 in the next cycle.
The charge detection unit 13 outputs the signal to the outside as a video signal.

In such conventional solid-state imaging devices, undesirable phenomena in imaging operation have been observed, such as when a high-brightness object is imaged, such as a horizontal line-like false signal appearing in front of the image. This phenomenon also causes color shift or color shading when the solid-state imaging device is applied to a single-chip color camera.

The above phenomenon occurs in the vertical direction shown in Fig. 2 or 3.
This is due to the structure of the coupling area between the CCD register and the horizontal CCD register. Figures 4a, b, and c schematically show the potential distribution in each part of the cross-sectional view of the coupling region shown in Figure 3 in order to explain the above phenomenon. Transfer electrode 2
1, 22 and the horizontal charge transfer electrode 27 are in the on state,
The potential distribution at the time when the vertical transfer gate electrode 23 turns off is shown, and FIG. 4c shows the potential distribution at the time when only the horizontal charge transfer electrode 27 changes from the above state to the off state. Further, FIG. 5 is a diagram showing the relationship between the width of the channel region and the channel potential in this region. From now on, Fig. 2, Fig. 3, Fig. 4
The above phenomenon will be explained using FIG.

First, in FIG. 4a, the area 36 shown in FIG.
The channel area _V of is the channel potential _H of area 37
This is because the channel width W _V of the area 30 shown in FIG. 2 is smaller than the width W _H of the channel area 24 of the horizontal CCD register. That is, in FIG. 5, the channel potential in the region having the channel width W _H is _H , but the channel potential _V in the region having the channel width W _V becomes smaller than the channel potential _H due to the narrow channel effect. Therefore, in FIG. 4a, the channel area 37 of the horizontal CCD register _is
- When a signal charge at a level lower than _V is transferred, the signal charge does not enter the region 36, and efficient transfer is performed. However, as shown in figure b, the level of the signal charge is higher than the above potential difference.
When the signal charge becomes large enough to exceed _H − _V , a portion of the signal charge enters the region 36 . Furthermore, when the horizontal charge transfer electrode 27 is turned off as shown in FIG. injected into. The false signal charge injected into the well 41 is again injected into the horizontal CCD register at the timing when the vertical transfer gate electrode 23 turns on, and behaves as if it were a real signal charge. This was a cause of the generation of false signals on the horizontal line when imaging a high-brightness object as described above.

An object of the present invention is to provide a high-quality solid-state imaging device that eliminates the above-mentioned drawbacks.

According to the present invention, a plurality of columns of vertical CCD (charge-coupled device) registers for vertically transferring signal charges from each arrayed photoelectric conversion element group and one end of the vertical CCD registers are provided. In the solid-state imaging device, the solid-state imaging device includes a two-phase drive horizontal CCD register including an accumulation region covered with a first-layer electrode and a barrier region covered with a second-layer electrode. The channel region covered by the final electrode of the vertical CCD resistor and the barrier region of the horizontal CCD resistor are adjacent to each other, and this barrier region and the storage region paired with this barrier region are adjacent to each other, and the barrier region and the storage region paired with this barrier region are
It is wider than the barrier area and the storage area of the CCD register, and this wide part enters the channel area, and the width of this channel area is wider than the horizontal area.
A solid-state imaging device is obtained which is characterized in that the width is narrower than the width of the channel region of the CCD register and is narrow enough to produce a narrow channel effect.

Next, embodiments of the present invention will be described using the drawings.

The basic configuration of one embodiment of the present invention is similar to the first embodiment of the conventional example.
It is almost the same as the figure. FIG. 6 shows a coupling area 1 between the vertical CCD register group 10 and the horizontal CCD register 12 shown in FIG. 1 in the solid-state imaging device according to the present invention.
4, and corresponds to FIG. 2 of the conventional example. Further, in this figure, the same numbers as in FIG. 2 indicate the same components. The channel region 20 of the vertical CCD register 10 is connected to the vertical charge transfer electrode 6
1, 62 and horizontal from vertical CCD register 10
It is covered with a vertical transfer gate electrode 63 that controls the transfer of signal charges to the CCD register 12. Further, the channel region 24 of the horizontal CCD register 12 is covered with horizontal charge transfer electrodes 64-69. These electrodes are made of two layers of polysilicon. In the figure, horizontal charge transfer electrodes 61, 63, 65, 67, and 69 indicated by dashed lines are the first
The horizontal charge transfer electrodes 62, 64, 66, and 68 shown by broken lines are formed of the second layer of polysilicon. The horizontal CCD register is a two-phase driven embedded CCD consisting of a storage region and a barrier region. The horizontal charge transfer electrode in the storage region is formed of the first layer of polysilicon (65,
67, 69), the horizontal charge transfer electrode in the barrier region is formed of the second layer of polysilicon (64,
66, 68). Horizontal charge transfer electrodes 64, 65, 6
6 and 67, and 68 and 69 are paired electrodes, to which the same clock pulse is applied. Furthermore, in the same figure, by covering the end regions 70 and 71 of the channel region 20 of the vertical CCD register with a part of the horizontal charge transfer electrodes 67 and 66, the vertical
CCD register 10 and horizontal CCD register 12 are electrically coupled. At this time, the vertical transfer gate 63, which is the final electrode of the vertical CCD register 10, and the horizontal charge transfer electrode 66, which is the barrier region of the horizontal CCD register 10, are adjacent to each other. FIG. 7a schematically shows a cross section taken along the bonding region-' line shown in FIG. 6, and corresponds to FIG. 3 of the conventional example. The above-mentioned vertical charge transfer electrode 62, vertical transfer gate electrode 63, and horizontal charge transfer electrode 66 are formed on the main surface of the semiconductor substrate 31 via the insulating layer 32.
(barrier region) and 67 (storage region) are formed. A buried channel layer 33 having a conductivity type opposite to that of the substrate semiconductor is formed under each of the above electrodes. An impurity ion implantation layer 72 having a conductivity type opposite to that of the buried channel layer is formed on the surface of the buried channel layer 33 in the barrier region, and the channel potential is lower than that in the accumulation region. Outside the channel region is a channel stop region 34 doped with impurities of the same conductivity type as the semiconductor substrate 31.
is formed.

The operation of the solid-state imaging device having such a structure is similar to the conventional example shown in FIGS. 1 to 3. Here the seventh
The charge transfer pattern in the horizontal CCD register will be explained using Figures b and c. FIGS. 7b and 7c schematically show the potential distribution of the bonding region shown in FIG. 7a. FIG. 7b shows the potential distribution when the vertical charge transfer electrode 62 is in the on state, the vertical transfer gate electrode 63 is in the off state, and the horizontal charge transfer electrodes 66 and 67 are in the on state. is accumulated in. FIG. 7c shows the potential distribution when the horizontal charge transfer electrodes 66 and 67 change from the on state to the off state from the state shown in FIG. 7b.
Since the same pulse is always applied to the horizontal charge transfer electrodes 66 and 67, the channel potential of region 71 is always smaller than the channel potential of region 70. Therefore, even when the horizontal charge transfer electrodes 66 and 67 are in the off state, the region 71 exists as an electrical barrier between the storage region of the horizontal CCD register and the vertical CCD register, and the signal charge is transferred horizontally. There is no movement from the CCD register to the vertical CCD register. Therefore, the solid-state imaging device according to the present invention can completely prevent the generation of horizontal line-like false signals even when a high-brightness object is imaged. Furthermore, in the solid-state imaging device according to the present invention, the channel width _W'V of the channel area 20 of the vertical CCD register is
The size can be determined by subtracting the allowance for misalignment from the channel length of the resistor barrier area and storage area. In contrast, in the conventional solid-state imaging device shown in FIG. 2, the channel width _WV of the channel area 20 of the vertical CCD register can only be made equal to the channel length of the storage area of the horizontal CCD register minus the allowance for misalignment. . As a result, in the solid-state imaging device of the present invention, the channel width of the vertical CCD register can be increased, and the charge transfer efficiency from the vertical CCD register to the horizontal CCD register can be improved.

In addition, the channel area 20 of the vertical CCD register
Among them, the channel potentials φ _B and φ _V of the regions 71 and 70 covered by the horizontal charge transfer electrodes 66 and 67 are the channel potentials φ _H of the region 73 of the horizontal CCD register.
It's getting shallower. Therefore, if the amount of transferred charge is small and the charge is not accumulated to a depth shallower than φ _V , the charge is accumulated only in the region 73, and the horizontal CCD
The effective channel area of the resistor maintains a straight shape with no irregularities. As a result, even when the amount of charge is small, the transfer distance does not become effectively long, and the transfer efficiency of the horizontal CCD register is high.

Note that although the present invention has been described here using an image pickup device using an interline transfer method, it can be similarly implemented using an image pickup device using a frame transfer method.

[Brief explanation of drawings]

FIG. 1 is a schematic diagram of an imaging device using an interline transfer method, and FIG. 2 is an enlarged view of a coupling area of a vertical shift register and a horizontal shift register in FIG. 1, showing a conventional example. Figure 3 is -' of Figure 2.
4a, b, and c are schematic diagrams of the potential distribution in FIG. 3, FIG. 5 is a diagram showing the channel width dependence of channel potential, and FIG. 6 is a vertical shift register in FIG. The structure according to the invention is shown in an enlarged view of the coupling area of a horizontal shift register. Figure 7a is a sectional view taken along the line -' in Figure 6;
FIGS. 7b and 7c are schematic potential distribution diagrams in FIG. 7a. 10... Vertical CCD register, 11... Photoelectric conversion element, 12... Horizontal CCD register, 64, 6
6, 68...Horizontal charge transfer electrode (barrier region), 6
5, 67, 69...Horizontal charge transfer electrode (storage region).

Claims (1)

[Claims] 1 Multiple rows of vertical CCDs to vertically transfer signal charges from each arrayed photoelectric conversion element group
(charge-coupled device) resistor, an accumulation region provided corresponding to one end of this vertical CCD resistor, covered by the first layer electrode, and a barrier region covered by the second layer electrode. A solid-state imaging device equipped with a two-phase drive horizontal CCD register consisting of a channel region covered with a final electrode of the vertical CCD register and a barrier region of the horizontal CCD register are adjacent to each other, and The storage area paired with this barrier area is wider than the barrier area and storage area of other horizontal CCD registers and enters the channel area at this part, and the width of this channel area is wider than the channel of the horizontal CCD register. A solid-state imaging device characterized in that the width is narrower than the width of a region and is narrow enough to produce a narrow channel effect.