JPS6242410B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an equalizing amplifier circuit for compensating for line loss in a communication system, for example, where the line loss expressed in decibels is proportional to √(f=frequency).

Line loss generally varies with frequency f as shown in Figure 1.
The loss at the same frequency increases as the length of the line increases. In FIG. 1, the parameters indicate the length of the line, l ₁ > l ₂ > l ₃ . In this manner, as the line length increases, the loss in the low frequency range increases and the inclination of the slope leading to the high frequency range increases. In order to equalize such line loss, conventionally, a configuration shown in FIG. 2 has been used. That is, the input side of the amplifier 11 is connected to the input terminal 13 through the resistor 12, the input side of the amplifier 11 is grounded through the resistor 14 and further through the variable resistor 15, and the capacitor 16 is connected in parallel with the resistor 14. , an equalized output is obtained from an output terminal 17 connected to the output side of the amplifier 11.
In this way, a CR circuit network that compensates only the frequency characteristics is provided before the amplifier 11, a diode is used as the variable resistor 15, and the bias voltage of the diode is controlled by the output of the equalized output peak value detection circuit. By changing the AC resistance r ₁ (the resistance value of the resistor 15) and changing the zero point in the transfer function of the circuit that compensates for the frequency characteristics, the √ approximation characteristics were realized.

In this circuit, let the resistance values of the resistors 12 and 14 be R ₁ and R ₂ , the capacitance of the capacitor 16 be C ₁ , the input voltage of the input terminal 13 be Vi, and the voltage on the input side of the amplifier 11 be V ₀ , the transfer function of this circuit is as follows.

However, S is a complex frequency, S=σ+jω (ω is an angular frequency, σ is a real number), the zero point is S=-r ₁ +R ₂ /CR ₂ r ₁ , and the pole is S=-1/CR ₂ . This pole is canceled by the fixed zero provided in the feedback loop of the amplifier circuit, and only the zero point can be made variable.If the gain frequency characteristic of the equalization circuit is approximated by a polygonal line, the polygonal line will appear as shown in Figure 3. A characteristic can be obtained that can be approximated by a polygonal line in which the gain is constant below the frequency f _z and the gain increases by 20 dB/day gate (6 dB/octave) as the frequency _f increases above f z.By controlling r ₁ , the bending point f _z , the magnitude of the constant gain changes. In this way, the circuit shown in Figure 2 obtains approximate characteristics only by controlling the zero point, so as the gain in the low frequency range increases,
It is not possible to increase the inclination of the slope reaching the high frequency range, and it is difficult to obtain good equalization characteristics over a wide frequency range for various lines with different line lengths.

As shown in FIG. 4, a conventional equalization amplifier circuit includes a collector resistor 21 between the collector of a transistor 18 whose base terminal is input and a power supply terminal 19.
An emitter resistor 22 is connected between the emitter of the transistor 18 and the ground, a variable capacitance diode 23 is connected in parallel with the emitter resistor 22, and the diode 23 is controlled by the control voltage of the terminal 24 to Some moved their positions. In this circuit, if the frequency characteristics of the gain to be achieved are to be greatly changed, it is necessary to widen the variation range of the variable pole, and for that purpose, it is necessary to increase the variation range of the control voltage of the variable capacitance diode 23. It is difficult to generate such widely varying control voltages within an integrated circuit.

In order to eliminate these drawbacks, this invention makes it possible to approximate the √ characteristic well with a small number of external elements by configuring it as an integrated circuit.In other words, it is possible to obtain good characteristics with a small number of parts. The aim is to make it possible to change the characteristics over a wide range by varying the control voltage of several hundred mV.

According to the present invention, a differential amplifier circuit to which an input signal is supplied is constructed, and a √ characteristic is obtained by the emitter AC resistance of a pair of differential transistors of the differential amplifier circuit and a capacitor connected between the emitters. The overall current of the differential amplifier circuit is controlled by one switching current of the current switching circuit to move the pole of the circuit and thereby control the gain in the high frequency range.

FIG. 5 shows an embodiment of the present invention, in which transistors 31 and 32 form a differential amplifier circuit.
That is, resistors 33 and 34 are connected between the collectors of transistors 31 and 32 and power supply terminal 19, and their emitters are connected to each other through resistors 35 and 36 and to each other through a capacitor 37. The collector of the transistor 38 is connected to the connection point between the resistors 35 and 36, the emitters of the transistor 38 and the transistor 39 are grounded through a constant current source 41 to form a current switching circuit, and the collector of the transistor 39 is connected to the power supply terminal 19. Connecting.
The bases of the transistors 31 and 32 serve as a pair of input terminals 42 and 43, the collectors serve as a pair of output terminals 44 and 45, the base of the transistor 39 serves as a gain control voltage terminal 46, and the base of the transistor 38 serves as a reference voltage terminal 47, respectively. Ru.

Transistor 3 of the differential amplifier circuit in the circuit shown in Figure 5
When one half of the first side is removed, it becomes as shown in FIG. 6. From the equivalent circuit of transistor 31, this sixth
The circuit shown in the figure can be written as shown in Figure 7. The input voltage Vi of the input terminal 42 is applied across the series circuit of the base-emitter junction operating resistor 51 of the transistor 31 and the resistor 35, and the voltage V across the base-emitter junction operating resistor 51 is applied to the transistor 31.
A current source 5 whose product gmv is the transconductance gm of
2 is connected in series with a resistor 35, and a collector resistor 33 is connected to both ends thereof. Let the respective resistance values of the collector resistor 33, the emitter resistor 35, and the base-emitter junction operating resistance 51 be R _L , R _E , and rπ,
Assuming that the capacitance of the capacitor 37' is twice that of the capacitor 37, 2C ₂ , the output voltage of the output terminal 44 is V ₀ , and the parallel impedance of the resistor 35 and capacitor 37' is R _E ', the following equation is obtained from FIG. holds true.

r ₂ =1/gm is the emitter AC resistance of the transistor 31.

becomes. Substituting equation (3) into equation (2), we get Since FIG. 5 constitutes a differential amplifier circuit, a gain twice as high as that of the circuit shown in FIG. 6 can be obtained. Therefore, the input/output transfer function of the circuit shown in Figure 5 is is given by From equation (5), the circuit of this embodiment has a fixed zero point S=-1/2C ₂ R _E (6) and a variable pole S=-R _E +r ₂ /2C ₂ R _E ·r ₂ (7).

The gain in the low frequency region of the circuit shown in Figure 6 is:
Since the impedance of the capacitor 37' becomes significantly high, R _E '=R _E in equation (2), and V ₀ /Vi=R _L /r ₂ +R _E (8). When the potential relationship between the control voltage Vc of the terminal 46 and the reference voltage Vr of the terminal 47 is changed, the eighth
As shown in curve 53 in the figure, the emitter AC resistance r ₂ changes, and the pole position moves accordingly.
As shown in 4, the frequency of the corresponding bending point moves. The position of the zero point is constant, and the frequency of the corresponding bending point is constant, as shown by line 55.
However, this is the case when R _E =500Ω, C ₂ =50p, and I=1mA. I is a constant current value of the current source 41. Vc is
When the potential is higher than Vr, Vc-Vr>0, and when Vc is lower than Vr, Vc-Vr<0. In general, the gain frequency characteristic of a transfer function with zero point S = -a ₀ (but a ₀ > 0) is the 9th gain frequency characteristic when the frequency axis is on a logarithmic scale.
As shown by the dotted line in the figure, the gain increases with frequency f, and the gain at ω (=2πf) = a ₀ is ω =
When the gain increases by 3 dB from the gain at 0 and ω >> a ₀ , the slope becomes 20 dB/decade (6 dB/decade).
octave). Therefore, if this characteristic is approximated by a straight line, it can be approximated by a broken line having a breaking point at ω=a ₀ , as shown by the solid line in the figure. The gain frequency characteristic of a transfer function having a pole S=-b ₀ (but b ₀ >0) can also be approximated by a polygonal line, as shown in FIG. 10, as in the case of FIG. However, the breaking point is ω=
b ₀ and the slope slope is negative.

In the circuit of this invention, the variable pole [formula (7)] is always located at a position higher than the fixed zero point [formula (6)] by a factor of (r ₂ +R _E )/r ₂ on the real axis. Therefore, basically the first
As shown in Figure 1, the gain is constant below the breaking point corresponding to the zero point, increases with frequency from the breaking point corresponding to the zero point to the breaking point corresponding to the pole, and is constant above the breaking point corresponding to the pole. The gain frequency characteristic has a polygonal line approximation characteristic.

By changing the relationship between the reference voltage Vr and the control voltage Vc, the emitter AC resistance r ₂ can be changed to control the characteristics as shown in FIG. 12. Here, R _L = 1KΩ, R _E = 500Ω, C ₂ =
50pF, I=1mA. By controlling Vc-Vr in this way, it is possible to approximate the frequency characteristics according to the line loss. To perform this control automatically, the peak values of the outputs of the output terminals 44 and 45 are detected, and the control voltage Vc of the terminal 46 is determined based on the output.
is controlled so that the peak value of the output is constant.

In this way, in this invention, the transfer function has a zero point and a pole, and the position of the pole and the gain in the low frequency range are changed together by varying the emitter AC resistance r ₂ , so that r ₂ can be reduced. Accordingly, it is possible to increase the gain in the low frequency range and increase the inclination of the slope leading to the high frequency range, resulting in characteristics that can be applied to equalization of various lines with different line lengths, as shown in Figure 2. Approximation characteristics can be improved better than conventional ones. Furthermore, by constructing the circuit as a semiconductor integrated circuit and externally attaching a few elements such as the capacitor 37, it is possible to construct the circuit with a reduced number of parts. Moreover, since the gain is controlled by controlling the current distribution of the current switching circuit,
Even if the variation range of the control voltage Vc is relatively small, the gain can be significantly controlled.

Furthermore, in order to improve the approximation of compensation for line loss characteristics, this example circuit is connected in multiple stages,
This becomes possible easily by providing a plurality of fixed zero points and variable poles.

FIG. 13 shows a second embodiment of the present invention, in which transistors 56 and 57 are added to the first embodiment shown in FIG. The emitters of transistors 56 and 57 are connected to resistors 58 and 57, respectively.
59, and the connection point of resistors 58 and 59 is connected to the collector of transistor 39. Here, the current distribution ratio of the current switching circuit formed by the transistors 38 and 39 is set to x, and the constant current source 41
When x·I (0≦x≦1) of the current value I flows through the transistor 38, the transistor 39
(1-x)·I flows. According to the configuration of the second embodiment, even if x changes due to the potential relationship between the gain control signal input Vc and the reference voltage Vr, the signal inputs V ₁ and V ₂
In a balanced state, when the current in the transistor 38 changes, the current flowing through the transistors 56 and 57 changes according to the change, and the current flowing through the transistors 31 and 32 is
Currents (1-x) and I/2 flow through the resistors 33 and 34, and the potentials Vc and Vr of the terminals 46 and 47 flow through the resistors 33 and 34, respectively.
I/2 flows regardless of the relationship. Therefore, based on the principle described in the first embodiment, the transistors 31, 3
Even if the gain of the differential amplifier circuit formed by 2 changes and the output amplitude changes, the center level of the amplitude of the output signal is always maintained at a constant value. Further, in the first embodiment, when the current flowing through the transistor 38 decreases and the emitter AC resistance r ₂ increases, (8)
As understood from the equation, there is a risk that the gain in the low frequency region will decrease too much. However, in the second embodiment, the decrease in the minimum gain in the low frequency region can be suppressed by the gains of the transistors 56 and 57. In FIG. 13, the added transistors 56, 5
The resistance value of the resistor connected to each emitter of 7 is R.
_E ', and the emitter AC resistance is r ₂ ' (=1/g _n '), the voltage gain A _V of this circuit in the low frequency range is 2R _L /r ₂ +R _E > A _V > 2R _L /r ₂ ′+R _E ′(9), which increases the degree of freedom in gain setting in the low frequency range and reduces equalization deviation(9)
r ₂ and r ₂ ′ in the equation are is given by Here, k is Boltzmann's constant, T is the absolute temperature, and q is the charge of the electron.

As explained above, according to the present invention, the capacitance that directly connects the emitters of two transistors forming the differential amplifier circuit and the emitter resistor realize the √ characteristic, and by controlling the circuit current of the differential amplifier circuit. Since the gain is obtained according to the line length, the circuit is simple and has the advantage of having a small number of elements, and the characteristics can be significantly controlled with a small control signal. Furthermore, by connecting this circuit in multiple stages, more accurate √ approximation characteristics can be easily realized. Furthermore, in the second embodiment, since the center level of the amplitude of the output signal is always constant, waveform distortion is small, and design for DC coupling is easy, making it easy to handle within an integrated circuit. √ By shorting the capacitance for characteristic compensation, like optical fiber cable, √
It is also applicable to lines that do not have a characteristic line loss.

[Brief explanation of the drawing]

Figure 1 is a schematic diagram of line loss characteristics with √ characteristics when the frequency axis is expressed logarithmically, Figure 2 is a connection diagram showing a conventional equalization amplifier circuit, Figure 3 is its equalization characteristic diagram, and Figure 4 FIG. 5 is a connection diagram showing another conventional equalization amplifier circuit, FIG. 5 is a connection diagram showing an example of the equalization amplifier circuit according to the present invention, and FIG. 6 is a diagram showing a part thereof.
Fig. 7 is an equivalent circuit diagram of the circuit shown in Fig. 6, and Fig. 8 shows the change in emitter AC resistance _r2 with respect to the control voltage Vc.
A diagram showing the movement state of the poles and the corresponding bending point frequencies,
Figure 9 is a diagram showing general characteristics with zero points on the real axis,
FIG. 10 is a diagram showing general characteristics with a pole on the real axis, FIG. 11 is a diagram showing an example of the characteristics of the equalizing amplifier circuit according to the present invention, and FIG. 12 is a diagram showing a specific example thereof.
FIG. 13 is a connection diagram showing another embodiment of the equalization amplifier circuit of the present invention.

Claims (1)

[Claims] 1. The collectors of the first and second transistors are connected to the first and second resistors, respectively, and to a pair of output terminals, and the emitters of the first and second transistors are connected to each other through a capacitor. Third,
They are connected to each other via a fourth resistor, and their bases are connected to a pair of input terminals to form a differential amplifier circuit, and one switching current path of the current switching circuit that distributes the constant current of the constant current source is the above-mentioned one. A control terminal is provided that is connected to the connection point of the third and fourth resistors and controls the distribution ratio for the current switching circuit, and the current of the differential amplifier circuit is controlled by the control signal of the control terminal. By moving the pole position of the circuit and changing the gain in the low frequency region at the same time, it is possible to increase the slope leading to the high frequency region in the gain frequency characteristic as the gain in the low frequency region increases. An equalization amplifier circuit designed like this.