JPS6241440Y2 - - Google Patents

Info

Publication number
JPS6241440Y2
JPS6241440Y2 JP1982055471U JP5547182U JPS6241440Y2 JP S6241440 Y2 JPS6241440 Y2 JP S6241440Y2 JP 1982055471 U JP1982055471 U JP 1982055471U JP 5547182 U JP5547182 U JP 5547182U JP S6241440 Y2 JPS6241440 Y2 JP S6241440Y2
Authority
JP
Japan
Prior art keywords
eprom
plastic
ceramic
transparent
packages
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1982055471U
Other languages
Japanese (ja)
Other versions
JPS58159697U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5547182U priority Critical patent/JPS58159697U/en
Publication of JPS58159697U publication Critical patent/JPS58159697U/en
Application granted granted Critical
Publication of JPS6241440Y2 publication Critical patent/JPS6241440Y2/ja
Granted legal-status Critical Current

Links

Description

【考案の詳細な説明】 (a) 考案の技術分野 本考案はEPROM(記憶情報の書き込み・消去
の可能な読み出し専用メモリ装置)のパツケージ
構造に関する。
[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to a package structure of an EPROM (a read-only memory device in which stored information can be written and erased).

(b) 従来技術と問題点 通常、EPROMは半導体素子から形成され、半
導体メモリ装置として知られているが、これは
IC又はLSIと称されている半導体装置の一品種で
ある。このようなIC、LSIなどの素子を封入する
半導体パツケージ(容器)は、大別してセラミツ
ク型と合成樹脂(プラスチツク)型とがあり、セ
ラミツク型は高価であるが、高信頼度を必要とす
るICに使用され、一般品は安価に作成できるプ
ラスチツク型が使用されている。しかしながら、
技術の進歩に伴つてIC素子としての信頼もを高
くなり、厳重な封止の必要なく、そのまゝプラス
チツクに封入しても充分に高い信頼性が得られる
ようになつてきた。そのため、最近はプラスチツ
ク型パツケージが増加の一途をたどつている。
(b) Prior art and problems EPROM is usually formed from semiconductor elements and is known as a semiconductor memory device, but this
It is a type of semiconductor device called IC or LSI. Semiconductor packages (containers) that enclose devices such as ICs and LSIs can be roughly divided into ceramic type and synthetic resin (plastic) type. Ceramic type is expensive, but it is suitable for ICs that require high reliability. Plastic molds are used for general products because they can be made at low cost. however,
As technology advances, their reliability as IC elements has also increased, and it has become possible to obtain sufficiently high reliability even when they are encapsulated in plastic without the need for strict sealing. Therefore, the number of plastic packages has been increasing steadily recently.

EPROMのパツケージにおいても、従前よりセ
ラミツク型パツケージが用いられており、信頼性
は高いが高価な点が欠点である。したがつて、他
の論理回路素子、RAM(ランダムアクセスメモ
リ)やROMなどと同じくプラスチツク型パツケ
ージが望まれるが、現在使用されているプラスチ
ツク材料はすべて黒色又は暗褐色などの遮光性で
あるから、半導体素子に外部より紫外線を照射し
て消去することが困難で、止むなくEPROMはセ
ラミツク型パツケージのみに限られている。
Ceramic packages have traditionally been used for EPROM packages, and although they are highly reliable, they are expensive. Therefore, like other logic circuit elements, RAM (random access memory), ROM, etc., a plastic package is desired, but all the plastic materials currently in use are black or dark brown and have light-shielding properties. It is difficult to erase semiconductor devices by irradiating them with ultraviolet light from the outside, so EPROMs are inevitably limited to ceramic packages.

第1図はセラミツク型パツケージに封入した
EPROMの外観図を示しており、1はセラミツク
基体(アルミナ材料)、2はリード端子、3は金
属板に取り囲まれた透明ガラス窓で、ガラス窓3
から強い紫外線を照射して、メモリの消去が行わ
れる。しかしながら、セラミツク型パツケージは
上記のように高価であり、他のIC、LSIがプラス
チツク型に封入されてコストダウンが行われて
も、EPROMは安価にすることが出来ない。
Figure 1 shows the product sealed in a ceramic type package.
This shows an external view of the EPROM. 1 is a ceramic substrate (alumina material), 2 is a lead terminal, and 3 is a transparent glass window surrounded by a metal plate.
The memory is erased by irradiating it with strong ultraviolet light. However, ceramic type packages are expensive as mentioned above, and even if other ICs and LSIs are encapsulated in plastic molds to reduce costs, EPROMs cannot be made cheaper.

又、セラミツク型パツケージは、セラミツク中
に含まれる微量の放射性元素の放射線によるメモ
リの喪失(ソフトエラー)を発生することがあ
り、又外部雑音(電磁波)による影響を防止出来
ない欠点がある。
Furthermore, ceramic type packages have the disadvantage that memory loss (soft errors) may occur due to trace amounts of radiation from radioactive elements contained in the ceramic, and the effects of external noise (electromagnetic waves) cannot be prevented.

(c) 考案の目的 本考案は、このような問題点を解消せしめ、
EPROMのコストを低下させると供に、ソフトエ
ラー発生防止と外部雑音(電磁波)に対するシー
ルド効果を同時に達成することが目的である。
(c) Purpose of the invention The invention aims to solve these problems,
The purpose is to reduce the cost of EPROM and simultaneously achieve the effect of preventing soft errors from occurring and shielding against external noise (electromagnetic waves).

(d) 考案の構成 かかる本考案の目的は、透明プラスチツクによ
り成型され、かつ内部に封入したEPROM素子の
メモリ情報の消去に必要な透光窓を除く外面が、
導電性で且つ遮光性の塗装を施す構造を有するパ
ツケージによつて達成される。
(d) Structure of the invention The object of the invention is to make the outer surface of the EPROM element molded from transparent plastic, excluding the transparent window necessary for erasing the memory information of the internally sealed EPROM element,
This is achieved by a package having a structure coated with a conductive and light-blocking coating.

(e) 考案の実施例 以下、図面を参照して詳細に説明する。(e) Example of implementation of the idea A detailed description will be given below with reference to the drawings.

従来よりトランジスタ、IC、LSIを封入してい
るプラスチツク材料は、熱硬化性樹脂と熱可塑性
樹脂の二種類があり、透明プラスチツクは熱可塑
性のものが多いが、本考案はそれに拘わるもので
はない。要するに、透明なプラスチツクを材料と
して、高温に加熱しモールド金型に注入して固化
させる構造である。
Conventionally, there are two types of plastic materials used to encapsulate transistors, ICs, and LSIs: thermosetting resins and thermoplastic resins, and transparent plastics are often thermoplastic, but the present invention is not limited to these. In short, it is made of transparent plastic that is heated to high temperatures and then injected into a mold to solidify.

しかる後、透光窓部分のみマスクし、導電性塗
装を施す。第2図はこのようにして、形成した本
考案にかゝるEPROMパツケージの外観図で、1
1は塗装された透明プラスチツク、13は透光
窓、12はリード端子を示している。
After that, only the transparent window portion is masked and conductive coating is applied. Figure 2 is an external view of the EPROM package according to the present invention formed in this way.
1 is a painted transparent plastic, 13 is a transparent window, and 12 is a lead terminal.

導電性塗装を施す方法としては、例えばアルミ
ニウム膜を蒸着させる方法があり、その場合には
リード端子2の周囲部分をマスクして蒸着し、リ
ード端子2との短絡を避ける必要がある。一方、
このような導電塗料で外面を被覆すると、これを
シールドさせて、内部のEPROMへの外部雑音
(電磁波)の影響を除去できる利点がある。
As a method for applying conductive coating, there is, for example, a method of vapor depositing an aluminum film. In this case, it is necessary to mask the surrounding area of the lead terminal 2 during vapor deposition to avoid a short circuit with the lead terminal 2. on the other hand,
Coating the outer surface with such a conductive paint has the advantage of shielding it and eliminating the influence of external noise (electromagnetic waves) on the internal EPROM.

又、プラスチツク封入は前記のようにソフトエ
ラーをすくなくすることが出来、前記のように外
部雑音(電磁波)の影響も防止出来信頼性が向上
する。
In addition, plastic encapsulation can reduce soft errors as described above, and prevent the influence of external noise (electromagnetic waves) as described above, thereby improving reliability.

一方、プラスチツク封止は高価なセラミツクパ
ツケージを使用する必要がないことは勿論、多数
個を同時にモールド金型で注入・整形するため、
作業工数が極めて少なくなり、材料費と工数を併
せて数100円程度もコストダウンさせることがで
きる。
On the other hand, plastic sealing does not require the use of expensive ceramic packages, and it is possible to inject and shape many pieces at the same time using a mold.
The number of man-hours required is extremely reduced, and the combined cost of materials and man-hours can be reduced by several hundred yen.

(f) 考案の効果 したがつて、本考案によれば、EPROMが極め
て安価に得られると共に、ソフトエラー及び外部
雑音(電磁波)の影響をを減少することが出来る
等の利点があり、その効果は非常に大きいもので
ある。
(f) Effects of the invention Therefore, according to the invention, EPROM can be obtained at a very low cost, and the effects of soft errors and external noise (electromagnetic waves) can be reduced. is very large.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のEPROMパツケージ、第2図は
本考案にかゝるEPROMパツケージである。図
中、1はセラミツク基体、2,12はリード端
子、3はガラス窓、13は透光窓を示している。
FIG. 1 shows a conventional EPROM package, and FIG. 2 shows an EPROM package according to the present invention. In the figure, 1 is a ceramic substrate, 2 and 12 are lead terminals, 3 is a glass window, and 13 is a transparent window.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 透明な合成樹脂により成型され、且つ内部に封
入したEPROM素子のメモリ情報の消去に必要な
透光窓を除く外面が、導電性で且つ遮光性の塗装
を施されてなることを特徴とするEPROMパツケ
ージ。
An EPROM that is molded from a transparent synthetic resin and whose outer surface, except for a transparent window necessary for erasing memory information of the EPROM element sealed inside, is coated with a conductive and light-shielding coating. Packaging.
JP5547182U 1982-04-15 1982-04-15 EPROM package Granted JPS58159697U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5547182U JPS58159697U (en) 1982-04-15 1982-04-15 EPROM package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5547182U JPS58159697U (en) 1982-04-15 1982-04-15 EPROM package

Publications (2)

Publication Number Publication Date
JPS58159697U JPS58159697U (en) 1983-10-24
JPS6241440Y2 true JPS6241440Y2 (en) 1987-10-23

Family

ID=30066050

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5547182U Granted JPS58159697U (en) 1982-04-15 1982-04-15 EPROM package

Country Status (1)

Country Link
JP (1) JPS58159697U (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2562803B2 (en) * 1992-03-05 1996-12-11 東芝硝子株式会社 Window glass for EP-ROM package

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5219077A (en) * 1975-08-01 1977-01-14 Owens Illinois Inc Lead frame assembly
JPS5676572A (en) * 1979-11-26 1981-06-24 Nippon Texas Instr Kk Data-erasing method for ic of involatile type semiconductor memory
JPS5732656A (en) * 1980-08-05 1982-02-22 Fujitsu Ltd Semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5219077A (en) * 1975-08-01 1977-01-14 Owens Illinois Inc Lead frame assembly
JPS5676572A (en) * 1979-11-26 1981-06-24 Nippon Texas Instr Kk Data-erasing method for ic of involatile type semiconductor memory
JPS5732656A (en) * 1980-08-05 1982-02-22 Fujitsu Ltd Semiconductor device

Also Published As

Publication number Publication date
JPS58159697U (en) 1983-10-24

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