JPS6240851A - Multivalue qam demodulating circuit - Google Patents

Multivalue qam demodulating circuit

Info

Publication number
JPS6240851A
JPS6240851A JP60181246A JP18124685A JPS6240851A JP S6240851 A JPS6240851 A JP S6240851A JP 60181246 A JP60181246 A JP 60181246A JP 18124685 A JP18124685 A JP 18124685A JP S6240851 A JPS6240851 A JP S6240851A
Authority
JP
Japan
Prior art keywords
phase
carrier wave
error
circuit
phase shifter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60181246A
Other languages
Japanese (ja)
Inventor
Yoshihiro Nozue
好洋 野末
Masayuki Onuki
政幸 大貫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP60181246A priority Critical patent/JPS6240851A/en
Publication of JPS6240851A publication Critical patent/JPS6240851A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the deterioration in an error rate by shifting one phase of a carrier wave by a control signal obtained from a reproducing data and an error signal, and making it coincide with a phase of a carrier wave of a transmission side. CONSTITUTION:A phase of a carrier wave of a reception side is made to coincide with a phase of a carrier wave of a transmission side by controlling a phase-shifting quantity of a variable phase shifter 12 by an output corresponding to one calculation result of I2+epsilon1 or I1+epsilon2 from reproducing data signals I1, I2 which have been applied to a controlling circuit 11 from data reproducing discriminators 6, 7, and error signals epsilon1, epsilon2. Even if a phase of a carrier wave of a transmission side is shifted by 90 deg. or more, the follow-up can be executed with a high accuracy in the reception side.

Description

【発明の詳細な説明】 〔概要〕 多値(JAM復調回路において、直交検波器に加えられ
るほぼ直交する搬送波の一方の位相を、データ再生識別
器よりの誤差信号と再生データから得られた制御信号で
制御された可変移相器で移相して、送信側直交変調器に
加えられるほぼ直交する搬送波に一致させる様にした。
[Detailed Description of the Invention] [Summary] In a multi-value (JAM demodulation circuit), one phase of substantially orthogonal carrier waves applied to a quadrature detector is controlled using an error signal from a data reproduction discriminator and reproduction data. The phase was shifted by a variable phase shifter controlled by a signal to match the nearly orthogonal carrier wave applied to the transmitting side quadrature modulator.

これにより、受信側で抽出した再生データの誤り率の劣
化がほぼなくなる。
This substantially eliminates deterioration in the error rate of reproduced data extracted on the receiving side.

〔産業上の利用分野〕[Industrial application field]

本発明はディジタル無線装置に使用する多値OAH復調
回路の改良に関するものである。
The present invention relates to an improvement of a multilevel OAH demodulation circuit used in a digital radio device.

多値01M波を直交検波する為に直交検波器に供給する
搬送波の位相を、送信側の直交変調器に加える搬送波の
位相に一致させるのは測定器の精度等の点から難しい。
It is difficult to match the phase of the carrier wave supplied to the quadrature detector for quadrature detection of the multilevel 01M wave with the phase of the carrier wave applied to the quadrature modulator on the transmitting side due to the accuracy of the measuring instrument.

一方、伝送効率を向上さセる為に640AM、 256
0AMと変調方式の多値化が進むと、上記の位相が一致
しない事よって直交干渉が増加して復調されたデータの
誤り率が劣化するので、誤り率の劣化のない多値(IA
M復調回路が必要である。
On the other hand, in order to improve transmission efficiency, 640AM, 256
As 0AM and multilevel modulation methods progress, orthogonal interference increases due to the above-mentioned phase mismatch, and the error rate of demodulated data deteriorates.
M demodulation circuit is required.

〔従来の技術] 第3図は従来例のブロック1図を、第4[xlは第3図
の動作説明図を示す。
[Prior Art] FIG. 3 shows a block 1 diagram of a conventional example, and 4th [xl] shows an operation explanatory diagram of FIG. 3.

第3図におい−C1例えば中間周波数帯に変換された多
値〇へ門波がハイブリット回路1で分割されて直交検波
器2.3に加えられる。
In FIG. 3, -C1, for example, a multivalued gate wave converted to an intermediate frequency band is divided by a hybrid circuit 1 and applied to a quadrature detector 2.3.

ここには、電圧制御発振器(以上VCOと省略する)1
0の出力が90度バイブリソ1′回路9で直交搬送波に
変換さねで加えられているので、多(l!1Ifl A
 M波は検波されてベースハンl(8号が抽出され、低
域]fflffl過小フィルタで帯域制限又は高周波成
分が除去された後、データ再仕識別器6.7で再生デー
タIと誤差信号εが取出される。
Here, a voltage controlled oscillator (hereinafter abbreviated as VCO) 1
Since the output of 0 is converted into an orthogonal carrier wave by the 90 degree vibrator 1' circuit 9, multi(l!1Ifl A
The M wave is detected and the base Han l (No. 8 is extracted, low frequency) fffffl is used to limit the band or remove the high frequency component using an under-filter. taken out.

ここで、誤差信号εは本来のレベルよりも高いか、低い
かを1.0で示す信号である。
Here, the error signal ε is a signal that indicates whether it is higher or lower than the original level by 1.0.

前音は端子OUT用及び0UT−2より送出されるが、
lji 1fの内の第1ビツト11及びI!と後者は駆
動回路8に+JI+えらねで、([、■ε、)−(1,
■ε2)の演算(ここで、■は排他的論理和を示す)が
行われるが、ごの結末は送信側と受信側の1最送波の位
相誤差を示すので、この回路8から位相誤ス・にり・t
 It、、゛づる電圧がνC010に送出され、これが
0になる様にνCOの位相が制御される。
The front sound is sent from the terminal OUT and 0UT-2, but
The first bit 11 of lji 1f and I! and the latter is applied to the drive circuit 8 with +JI+elane, ([,■ε,)-(1,
■ ε2) calculation (here, ■ indicates exclusive OR) is performed, but since the result shows the phase error of the single most transmitted wave on the transmitting side and the receiving side, the phase error is calculated from this circuit 8. S・Niri・t
A voltage of It, .

面、演算を実行Jる回路は1.とB2及び12.とε、
とをイれぞれ排他的論理和を取ったものを積分して直流
分を取出し、差動増幅器で差を11y、れば、1、い。
The circuit that executes the calculation is 1. and B2 and 12. and ε,
Then, the DC component is obtained by integrating the exclusive OR of and, and the difference is 11y using a differential amplifier.

例えば、第4図(alの左側に示す様に送信側の搬送波
(A、+1で示1)と受信側の搬送波(A”。
For example, as shown on the left side of FIG.

■3′)がそれぞれ直交し7、送(a側と受信側で直交
軸がθだ+)ずれているときは、駆動回路8により同図
(alの右側に示す様にAとA“及びBと[3“とが一
致Jる様に矢印の方向に制御され、送受化側の搬送波の
直交軸は一敗する。
■3') are orthogonal to each other 7, and when the sending (the orthogonal axes on the a side and the receiving side are θ+), the drive circuit 8 Control is performed in the direction of the arrow so that B and [3'' coincide with each other, and the orthogonal axes of the carrier waves on the transmitting and receiving sides are completely defeated.

しかし、第4図(blに示す様に送信側の搬送波は直交
しているが、受信側が直交セずAとAo1BとB′の間
の角度がθ3.θ2と異なる肋は、小さいカーの角が0
となってBとB1を−・致さ一ロても、AとAoの角度
がθ1−θ2になり1:だ誤差が残る(第4図の中央の
図)。
However, as shown in Figure 4 (bl), the carrier waves on the transmitting side are orthogonal, but the carrier waves on the receiving side are not orthogonal. is 0
Even if B and B1 match, the angle between A and Ao will be θ1 - θ2, and an error of 1: will remain (center diagram in Figure 4).

そこで、八゛がΔに近づき、BとB1が離れて四ユ■ε
I)と(1,G)B2)の値が等しくなった所で差が0
となるので制御は停止する。
Then, 8゛ approaches Δ, B and B1 move away, and 4゛■ε
The difference is 0 when the values of I) and (1, G)B2) are equal.
Therefore, control stops.

即ら、第4図fhlの左側の様に最終的には両方が釣合
った半分づつの誤差%(θ1−θ2.)の所で安定して
停止する。
That is, as shown on the left side of FIG. 4, fhl, both of them are finally stabilized and stopped at half the error percentage (.theta.1-.theta.2.).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記で詳細に説明した様に、受信側の搬送波と送信側の
搬送波との間に位相誤差が残るので、誤り率が劣化する
と云う問題点がある。
As explained in detail above, there is a problem that the error rate deteriorates because a phase error remains between the carrier wave on the receiving side and the carrier wave on the transmitting side.

〔問題点を解決する為の手段〕[Means for solving problems]

上記の問題点は、搬送波の位相を移相させる可変移相器
12と、再生データと誤差信号を用いて該搬送波の位相
を送信側搬送波の位相に一致させる様に、該可変移相器
を制御する制御回路11とを設けた本発明の多値QAM
復調回路により解決される。
The above problem is solved by the variable phase shifter 12 that shifts the phase of the carrier wave, and the variable phase shifter 12 that shifts the phase of the carrier wave so that the phase of the carrier wave matches the phase of the transmitting side carrier wave using reproduced data and an error signal. The multi-level QAM of the present invention is provided with a control circuit 11 for controlling
This problem is solved by a demodulation circuit.

〔作用〕[Effect]

本発明は、データ再z1識別i!it6.7よりの再生
データと誤差信号から制御回路11で得られた制御信月
で、直交検波器2.3番こ加えられるほぼ90度の位相
差を持った搬送波の一力の位相4可変移相器12で移相
して、送信側の搬送波の位相と一致させる様にした。そ
こで、誤り率の劣化がほぼなくなる。
The present invention provides data rez1 identification i! With the control signal obtained by the control circuit 11 from the reproduced data and error signal from IT6.7, the phase of the carrier wave with a phase difference of approximately 90 degrees is added to the quadrature detector No. 2.3. The phase is shifted by a phase shifter 12 to match the phase of the carrier wave on the transmitting side. Therefore, the deterioration of the error rate is almost eliminated.

〔実施例〕〔Example〕

以下図示実施例により本発明の内容を具体的に説明する
。尚、企図を通して同一符号は同一対象物を示す。
The contents of the present invention will be specifically explained below with reference to illustrated embodiments. Note that the same reference numerals refer to the same objects throughout the plan.

第1図は本発明の実施例のブロック図で、第2図は第1
図の動作説明図を示す。向、第1図の点線の部分が本発
明で付加された部分を示す。
FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention.
The operation explanatory diagram of the figure is shown. The dotted line portion in FIG. 1 indicates the portion added according to the present invention.

第1図において、データ再生識別器6と7より制御回路
11に加えられたI、、  +1.  B1.B2から
1.■ε1又はI、■ε、のうち、どららか(例えばl
、(Dε2とする)の演算結果に対応する出力で可変移
相器12の移相量を制御して、受信側の搬送波の位相を
送信側の搬送波のイη相に一致させるが、これは次の様
に行われる。即ち、 送受信側の搬送波の位相状態が第2図左側の図(第4図
(blの右側の図と同じ)の様な時、制御回路11から
の制御信号で可変移相器12が制御されて例えばBoを
Bに一致させて釣合いを崩すと、上記と同じ<A、!=
A’の間に位相誤差があるので矢印の方向に動いてA′
が八 に近づき、B1と13  とが離れて同し位相誤
差の所で止まる(第2図の中央)。そこで、制御回路1
2よりの制御で再度釣合いを崩−υば誤差信号は0に近
すき、第2図右側の図の様にAとA’、BとBoが一致
した所で制御は停止し、受信側の搬送波の位相は送信側
の位相と一致する。
In FIG. 1, I, . B1. B2 to 1. Which one of ■ε1 or I, ■ε (for example, l
, (denoted as Dε2) controls the phase shift amount of the variable phase shifter 12 to match the phase of the carrier wave on the receiving side with the phase η of the carrier wave on the transmitting side. It is done as follows. That is, when the phase state of the carrier waves on the transmitting and receiving sides is as shown in the diagram on the left side of FIG. 2 (same as the diagram on the right side of FIG. For example, if we make Bo match B and break the balance, we get the same <A, != as above.
Since there is a phase error between A', it moves in the direction of the arrow and A'
approaches 8, B1 and 13 separate and stop at the same phase error (center of Figure 2). Therefore, control circuit 1
If the balance is broken again by control from 2, the error signal approaches 0, and as shown on the right side of Figure 2, control stops when A and A' and B and Bo match, and the receiving side The phase of the carrier wave matches the phase of the transmitting side.

尚、制御回路11は(1,■ε2)の演剪を行う排他的
論理和回路III とこの回路の出力から直流部を取出
す積分回路112と緩衝増幅器113で、可変移相器1
2は例えば70MIIz又は140M1lzの搬送波の
移送を数度ていど移相さセる移相器でよいので、簡単な
構成で実現できる。
The control circuit 11 includes an exclusive OR circuit III that performs a calculation of (1, ε2), an integration circuit 112 that extracts a DC part from the output of this circuit, and a buffer amplifier 113, and a variable phase shifter 1.
2 may be a phase shifter that shifts the phase of a carrier wave of, for example, 70 MIIz or 140 M1lz by several degrees, so it can be realized with a simple configuration.

〔発明の効果〕〔Effect of the invention〕

以」二詳細に説明した様に、送信側の直交変調器に加え
られる搬送波の位相が90度よりもずれていても受信側
で精度よく追随する事ができるので誤り率の劣化がほぼ
な(なると云う効果がある。
As explained in detail below, even if the phase of the carrier wave applied to the quadrature modulator on the transmitting side is shifted by more than 90 degrees, it can be followed accurately on the receiving side, so there is almost no deterioration in the error rate ( There is an effect that.

第3図は従来例のブロック図、 第4図は第3図の動作説明図を示す。Figure 3 is a block diagram of the conventional example. FIG. 4 shows an explanatory diagram of the operation of FIG. 3.

図において、 11は制御回路、 12は可変移相器を示す。In the figure, 11 is a control circuit; 12 indicates a variable phase shifter.

Lu 筐Lu box

Claims (1)

【特許請求の範囲】 電圧制御発振器(10)からの搬送波を用いて多値QA
M波を直交検波して得られたベースバンド信号から、デ
ータ再生識別器(6、7)で再生データと誤差信号とを
抽出する際に、 該搬送波の位相を移相させる可変移相器(12)と、該
再生データと誤差信号を用いて該搬送波の位相を送信側
搬送波の位相に一致させる様に該可変移相器を制御する
制御回路(11)とを設けた事を特徴とする多値QAM
復調回路。
[Claims] Multi-level QA using a carrier wave from a voltage controlled oscillator (10)
When the data reproduction discriminator (6, 7) extracts reproduced data and error signals from the baseband signal obtained by quadrature detection of the M wave, a variable phase shifter ( 12), and a control circuit (11) that controls the variable phase shifter so that the phase of the carrier wave matches the phase of the transmitting carrier wave using the reproduced data and the error signal. Multilevel QAM
Demodulation circuit.
JP60181246A 1985-08-19 1985-08-19 Multivalue qam demodulating circuit Pending JPS6240851A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60181246A JPS6240851A (en) 1985-08-19 1985-08-19 Multivalue qam demodulating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60181246A JPS6240851A (en) 1985-08-19 1985-08-19 Multivalue qam demodulating circuit

Publications (1)

Publication Number Publication Date
JPS6240851A true JPS6240851A (en) 1987-02-21

Family

ID=16097348

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60181246A Pending JPS6240851A (en) 1985-08-19 1985-08-19 Multivalue qam demodulating circuit

Country Status (1)

Country Link
JP (1) JPS6240851A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01221973A (en) * 1988-03-01 1989-09-05 Fujitsu Ltd Facsimile equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01221973A (en) * 1988-03-01 1989-09-05 Fujitsu Ltd Facsimile equipment

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